Patents by Inventor Yoji Nagano
Yoji Nagano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9362522Abstract: An object is to improve productivity related to a laser light irradiation step in a bonding technique of substrates using glass frit. A highly airtight sealing structure or a highly airtight light-emitting device, which can be manufactured with high productivity, is provided. When a glass layer by melting glass frit or a sintered body by sintering glass frit is irradiated with laser light, in order to increase the efficiency, a light-absorbing material is attached to a surface of the glass layer. The laser light irradiation is performed on the light-absorbing material and the glass layer. The substrates are fixed with the glass layer therebetween.Type: GrantFiled: October 22, 2013Date of Patent: June 7, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shuji Fukai, Yusuke Kubota, Mika Jikumaru, Takeshi Nishi, Akihisa Shimomura, Yoji Nagano, Daiki Nakamura
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Patent number: 8941017Abstract: An electronic apparatus includes: a substrate which has a step portion in an edge portion; an electronic component which is bonded to a surface of the substrate inward of the step portion of the substrate; and a cap member which is bonded to the step portion so as to seal the electronic component, wherein a wall surface of the step portion is formed to be inclined from the step portion toward an electronic component bonding region or to be perpendicular to the step portion.Type: GrantFiled: January 5, 2011Date of Patent: January 27, 2015Assignee: Seiko Epson CorporationInventor: Yoji Nagano
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Patent number: 8895407Abstract: A manufacturing method of an SOI substrate which possesses a base substrate having low heat resistance and a very thin semiconductor layer having high planarity is demonstrated. The method includes: implanting hydrogen ions into a semiconductor substrate to form an ion implantation layer; bonding the semiconductor substrate and a base substrate such as a glass substrate, placing a bonding layer therebetween; heating the substrates bonded to each other to separate the semiconductor substrate from the base substrate, leaving a thin semiconductor layer over the base substrate; irradiating the surface of the thin semiconductor layer with laser light to improve the planarity and recover the crystallinity of the thin semiconductor layer; and thinning the thin semiconductor layer. This method allows the formation of an SOI substrate which has a single-crystalline semiconductor layer with a thickness of 100 nm or less over a base substrate.Type: GrantFiled: September 27, 2010Date of Patent: November 25, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Miyairi, Akihisa Shimomura, Tatsuya Mizoi, Eiji Higa, Yoji Nagano
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Patent number: 8772129Abstract: A manufacturing method of an SOI substrate which possesses a base substrate having low heat resistance and a very thin semiconductor layer having high planarity is demonstrated. The method includes: implanting hydrogen ions into a semiconductor substrate to form an ion implantation layer; bonding the semiconductor substrate and a base substrate such as a glass substrate, placing a bonding layer therebetween; heating the substrates bonded to each other to separate the semiconductor substrate from the base substrate, leaving a thin semiconductor layer over the base substrate; irradiating the surface of the thin semiconductor layer with laser light to improve the planarity and recover the crystallinity of the thin semiconductor layer; and thinning the thin semiconductor layer. This method allows the formation of an SOI substrate which has a single-crystalline semiconductor layer with a thickness of 100 nm or less over a base substrate.Type: GrantFiled: September 27, 2010Date of Patent: July 8, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Miyairi, Akihisa Shimomura, Tatsuya Mizoi, Eiji Higa, Yoji Nagano
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Publication number: 20140116614Abstract: An object is to improve productivity related to a laser light irradiation step in a bonding technique of substrates using glass frit. A highly airtight sealing structure or a highly airtight light-emitting device, which can be manufactured with high productivity, is provided. When a glass layer by melting glass frit or a sintered body by sintering glass frit is irradiated with laser light, in order to increase the efficiency, a light-absorbing material is attached to a surface of the glass layer. The laser light irradiation is performed on the light-absorbing material and the glass layer. The substrates are fixed with the glass layer therebetween.Type: ApplicationFiled: October 22, 2013Publication date: May 1, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shuji Fukai, Yusuke Kubota, Mika Jikumaru, Takeshi Nishi, Akihisa Shimomura, Yoji Nagano, Daiki Nakamura
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Metal paste for sealing, hermetic sealing method for piezoelectric element, and piezoelectric device
Patent number: 8558433Abstract: The present invention is a metal paste for sealing comprising a metal powder and an organic solvent characterized in that the metal powder is one or more kinds of metal powders selected from a gold powder, a silver powder, a platinum powder and a palladium powder which has a purity of 99.9% by weight or more and an average particle size of 0.1 ?m to 1.0 ?m and that the metal powder is contained in a ratio of 85 to 93% by weight and the organic solvent is contained in a ratio of 5 to 15% by weight. As a sealing method using this metal paste, there is a method of applying and drying a metal paste, sintering it at 80 to 300° C. to form a metal powder sintered body and after that pressurizing the base member and the cap member while heating the metal powder sintered body.Type: GrantFiled: April 23, 2012Date of Patent: October 15, 2013Assignees: Tanaka Kikinzoku Kogyo K.K., Seiko Epson CorporationInventors: Toshinori Ogashiwa, Masayuki Miyairi, Yoji Nagano -
Metal paste for sealing, hermetic sealing method for piezoelectric element, and piezoelectric device
Patent number: 8505804Abstract: The present invention is a metal paste for sealing comprising a metal powder and an organic solvent characterized in that the metal powder is one or more kinds of metal powders selected from a gold powder, a silver powder, a platinum powder and a palladium powder which has a purity of 99.9% by weight or more and an average particle size of 0.1 ?m to 1.0 ?m and that the metal powder is contained in a ratio of 85 to 93% by weight and the organic solvent is contained in a ratio of 5 to 15% by weight. This metal paste preferably contains an additive such as a surfactant in accordance with the application method. As a sealing method using this metal paste, there is a method of applying and drying a metal paste, sintering it at 80 to 300° C. to form a metal powder sintered body and after that pressurizing the base member and the cap member while heating the metal powder sintered body.Type: GrantFiled: March 18, 2008Date of Patent: August 13, 2013Assignees: Tanaka Kikinzoku Kogyo K.K., Seiko Epson CorporationInventors: Toshinori Ogashiwa, Masayuki Miyairi, Yoji Nagano -
Patent number: 8344599Abstract: A quartz crystal device includes a crystal resonator element and a package including a plurality of components. The plurality of components are bonded using a metal paste sealing material containing a metallic particle having an average particle size from 0.1 to 1.0 ?m, an organic solvent, and a resin material in proportions of from 88 to 93 percent by weight, from 5 to 15 percent by weight, and from 0.01 to 4.0 percent by weight, respectively, to hermetically seal the crystal resonator element in the package.Type: GrantFiled: October 13, 2011Date of Patent: January 1, 2013Assignee: Seiko Epson CorporationInventors: Yoji Nagano, Tatsuya Anzai, Hideo Tanaya
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Patent number: 8193068Abstract: To provide an SOI substrate with an SOI layer that can be put into practical use, even when a substrate with a low allowable temperature limit such as a glass substrate is used, and to provide a semiconductor substrate formed using such an SOI substrate. In order to bond a single-crystalline semiconductor substrate to a base substrate such as a glass substrate, a silicon oxide film formed by CVD with organic silane as a source material is used as a bonding layer, for example. Accordingly, an SOL substrate with a strong bond portion can be formed even when a substrate with an allowable temperature limit of less than or equal to 700° C. such as a glass substrate is used. A semiconductor layer separated from the single-crystalline semiconductor substrate is irradiated with a laser beam so that the surface of the semiconductor layer is planarized and the crystallinity thereof is recovered.Type: GrantFiled: February 2, 2011Date of Patent: June 5, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Eiji Higa, Yoji Nagano, Tatsuya Mizoi, Akihisa Shimomura
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Publication number: 20120025673Abstract: A quartz crystal device includes a crystal resonator element and a package including a plurality of components. The plurality of components are bonded using a metal paste sealing material containing a metallic particle having an average particle size from 0.1 to 1.0 ?m, an organic solvent, and a resin material in proportions of from 88 to 93 percent by weight, from 5 to 15 percent by weight, and from 0.01 to 4.0 percent by weight, respectively, to hermetically seal the crystal resonator element in the package.Type: ApplicationFiled: October 13, 2011Publication date: February 2, 2012Applicant: SEIKO EPSON CORPORATIONInventors: Yoji NAGANO, Tatsuya Anzai, Hideo Tanaya
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Patent number: 8069549Abstract: A quartz crystal device includes a crystal resonator element and a package including a plurality of components. The plurality of components are bonded using a metal paste sealing material containing a metallic particle having an average particle size from 0.1 to 1.0 ?m, an organic solvent, and a resin material in proportions of from 88 to 93 percent by weight from 5 to 15 percent by weight, and from 0.01 to 4.0 percent by weight, respectively, to hermetically seal the crystal resonator element in the package.Type: GrantFiled: March 19, 2008Date of Patent: December 6, 2011Assignee: Seiko Epson CorporationInventors: Yoji Nagano, Tatsuya Anzai, Hideo Tanaya
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Publication number: 20110174533Abstract: An electronic apparatus includes: a substrate which has a step portion in an edge portion; an electronic component which is bonded to a surface of the substrate inward of the step portion of the substrate; and a cap member which is bonded to the step portion so as to seal the electronic component, wherein a wall surface of the step portion is formed to be inclined from the step portion toward an electronic component bonding region or to be perpendicular to the step portion.Type: ApplicationFiled: January 5, 2011Publication date: July 21, 2011Applicant: SEIKO EPSON CORPORATIONInventor: Yoji NAGANO
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Publication number: 20110136320Abstract: To provide an SOI substrate with an SOI layer that can be put into practical use, even when a substrate with a low allowable temperature limit such as a glass substrate is used, and to provide a semiconductor substrate formed using such an SOI substrate. In order to bond a single-crystalline semiconductor substrate to a base substrate such as a glass substrate, a silicon oxide film formed by CVD with organic silane as a source material is used as a bonding layer, for example. Accordingly, an SOL substrate with a strong bond portion can be formed even when a substrate with an allowable temperature limit of less than or equal to 700° C. such as a glass substrate is used. A semiconductor layer separated from the single-crystalline semiconductor substrate is irradiated with a laser beam so that the surface of the semiconductor layer is planarized and the crystallinity thereof is recovered.Type: ApplicationFiled: February 2, 2011Publication date: June 9, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Eiji HIGA, Yoji NAGANO, Tatsuya MIZOI, Akihisa SHIMOMURA
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Patent number: 7928635Abstract: A package for electronic component includes: a rectangular package body, a lid hermetically sealing the package body, an electrode pad provided in the package body, a mounting terminal provided at least near four corners of a bottom surface of the package body and having a bump on a mounting surface, and a plurality of coupling electrodes electrically coupling the pad to the mounting terminal.Type: GrantFiled: January 5, 2009Date of Patent: April 19, 2011Assignee: Epson Toyocom CorporationInventors: Yoji Nagano, Hideo Tanaya, Tatsuya Anzai
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Publication number: 20110076837Abstract: A manufacturing method of an SOI substrate which possesses a base substrate having low heat resistance and a very thin semiconductor layer having high planarity is demonstrated. The method includes: implanting hydrogen ions into a semiconductor substrate to form an ion implantation layer; bonding the semiconductor substrate and a base substrate such as a glass substrate, placing a bonding layer therebetween; heating the substrates bonded to each other to separate the semiconductor substrate from the base substrate, leaving a thin semiconductor layer over the base substrate; irradiating the surface of the thin semiconductor layer with laser light to improve the planarity and recover the crystallinity of the thin semiconductor layer; and thinning the thin semiconductor layer. This method allows the formation of an SOI substrate which has a single-crystalline semiconductor layer with a thickness of 100 nm or less over a base substrate.Type: ApplicationFiled: September 27, 2010Publication date: March 31, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hidekazu MIYAIRI, Akihisa SHIMOMURA, Tatsuya MIZOI, Eiji HIGA, Yoji NAGANO
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Patent number: 7897476Abstract: To provide an SOI substrate with an SOI layer that can be put into practical use, even when a substrate with a low allowable temperature limit such as a glass substrate is used, and to provide a semiconductor substrate formed using such an SOI substrate. In order to bond a single-crystalline semiconductor substrate to a base substrate such as a glass substrate, a silicon oxide film formed by CVD with organic silane as a source material is used as a bonding layer, for example. Accordingly, an SOI substrate with a strong bond portion can be formed even when a substrate with an allowable temperature limit of less than or equal to 700° C. such as a glass substrate is used. A semiconductor layer separated from the single-crystalline semiconductor substrate is irradiated with a laser beam so that the surface of the semiconductor layer is planarized and the crystallinity thereof is recovered.Type: GrantFiled: March 31, 2008Date of Patent: March 1, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Eiji Higa, Yoji Nagano, Tatsuya Mizoi, Akihisa Shimomura
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Patent number: 7820524Abstract: A manufacturing method of an SOI substrate which possesses a base substrate having low heat resistance and a very thin semiconductor layer having high planarity is demonstrated. The method includes: implanting hydrogen ions into a semiconductor substrate to form an ion implantation layer; bonding the semiconductor substrate and a base substrate such as a glass substrate, placing a bonding layer therebetween; heating the substrates bonded to each other to separate the semiconductor substrate from the base substrate, leaving a thin semiconductor layer over the base substrate; irradiating the surface of the thin semiconductor layer with laser light to improve the planarity and recover the crystallinity of the thin semiconductor layer; and thinning the thin semiconductor layer. This method allows the formation of an SOI substrate which has a single-crystalline semiconductor layer with a thickness of 100 nm or less over a base substrate.Type: GrantFiled: March 28, 2008Date of Patent: October 26, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hidekazu Miyairi, Akihisa Shimomura, Tatsuya Mizoi, Eiji Higa, Yoji Nagano
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Publication number: 20100173472Abstract: A method for manufacturing an SOI substrate and a method for manufacturing a semiconductor device, in each of which peeling of a single crystal semiconductor layer from an end portion due to laser irradiation is suppressed, are provided. A fragile region is formed in a single crystal semiconductor substrate by irradiating the single crystal semiconductor substrate with an accelerated ion, the single crystal semiconductor substrate is bonded to a base substrate with an insulating layer interposed therebetween, a single crystal semiconductor layer is formed over the base substrate with the insulating layer interposed therebetween by splitting the single crystal semiconductor substrate at the fragile region, an end portion of the single crystal semiconductor layer is removed, and a surface of the single crystal semiconductor layer whose end portion has been removed is irradiated with a laser beam.Type: ApplicationFiled: December 29, 2009Publication date: July 8, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Yoji NAGANO
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METAL PASTE FOR SEALING, HERMETIC SEALING METHOD FOR PIEZOELECTRIC ELEMENT, AND PIEZOELECTRIC DEVICE
Publication number: 20090309459Abstract: The present invention is a metal paste for sealing comprising a metal powder and an organic solvent characterized in that the metal powder is one or more kinds of metal powders selected from a gold powder, a silver powder, a platinum powder and a palladium powder which has a purity of 99.9% by weight or more and an average particle size of 0.1 ?m to 1.0 ?m and that the metal powder is contained in a ratio of 85 to 93% by weight and the organic solvent is contained in a ratio of 5 to 15% by weight. This metal paste preferably contains an additive such as a surfactant in accordance with the application method. As a sealing method using this metal paste, there is a method of applying and drying a metal paste, sintering it at 80 to 300° C. to form a metal powder sintered body and after that pressurizing the base member and the cap member while heating the metal powder sintered body.Type: ApplicationFiled: March 18, 2008Publication date: December 17, 2009Inventors: Toshinori Ogashiwa, Masayuki Miyairi, Yoji Nagano -
Publication number: 20090174291Abstract: A package for electronic component includes: a rectangular package body, a lid hermetically sealing the package body, an electrode pad provided in the package body, a mounting terminal provided at least near four corners of a bottom surface of the package body and having a bump on a mounting surface, and a plurality of coupling electrodes electrically coupling the pad to the mounting terminal.Type: ApplicationFiled: January 5, 2009Publication date: July 9, 2009Applicant: Epson Toyocom CorporationInventors: Yoji NAGANO, Hideo TANAYA, Tatsuya ANZAI