Abstract: Organic photoelectronic devices and image sensors including the organic photoelectronic devices, include a first light-transmitting electrode at a side where light enters, a second light-transmitting electrode opposite to the first light-transmitting electrode, an active layer between the first and second light-transmitting electrodes, and an ultraviolet (UV) ray blocking layer on the first light-transmitting electrode, wherein the ultraviolet (UV) ray blocking layer includes at least one metal oxide having a light transmittance of less than or equal to about 75% for light of less than or equal to about 380 nm.

Abstract: A structure includes a silicon substrate, a plurality of silicon rods on the silicon substrate, a silicon layer on the plurality of silicon rods, and a GaN substrate on the silicon layer.

Abstract: A method of manufacturing a semiconductor device using a metal oxide includes forming a metal oxide layer on a substrate, forming an amorphous semiconductor layer on the metal oxide layer, and forming a polycrystalline semiconductor layer by crystallizing the amorphous semiconductor layer using the metal oxide layer.

Abstract: A method of manufacturing a semiconductor device using a metal oxide includes forming a metal oxide layer on a substrate, forming an amorphous semiconductor layer on the metal oxide layer, and forming a polycrystalline semiconductor layer by crystallizing the amorphous semiconductor layer using the metal oxide layer.

Abstract: A structure includes a silicon substrate, a plurality of silicon rods on the silicon substrate, a silicon layer on the plurality of silicon rods, and a GaN substrate on the silicon layer.

Abstract: A method of transferring graphene includes forming a sacrificial layer and a graphene layer sequentially on a first substrate, bonding the graphene layer to a target layer, and removing the sacrificial layer using a laser and separating the first substrate from the graphene layer.

Abstract: A structure includes a silicon substrate, a plurality of silicon rods on the silicon substrate, a silicon layer on the plurality of silicon rods, and a GaN substrate on the silicon layer.

Abstract: An electrode structure, a GaN-based semiconductor device including the electrode structure, and methods of manufacturing the same, may include a GaN-based semiconductor layer and an electrode structure on the GaN-based semiconductor layer. The electrode structure may include an electrode element including a conductive material and a diffusion layer between the electrode element and the GaN-based semiconductor layer. The diffusion layer may include a material which is an n-type dopant with respect to the GaN-based semiconductor layer, and the diffusion layer may contact the GaN-based semiconductor layer. A region of the GaN-based semiconductor layer contacting the diffusion layer may be doped with the n-type dopant. The material of the diffusion layer may comprise a Group 4 element.

Abstract: A method for forming a selective ohmic contact for a Group III-nitride heterojunction structured device may include forming a conductive layer and a capping layer on an epitaxial substrate including at least one Group III-nitride heterojunction layer and having a defined ohmic contact region, the capping layer being formed on the conductive layer or between the conductive layer and the Group III-nitride heterojunction layer in one of the ohmic contact region and non-ohmic contact region, and applying at least one of a laser annealing process and an induction annealing process on the substrate at a temperature of less than or equal to about 750° C. to complete the selective ohmic contact in the ohmic contact region.

Abstract: The disclosed mold includes recessed parts which have a shape corresponding to embossed portions of the barrier rib to be fabricated, and protruding parts which have a shape corresponding to depressed portions of the barrier rib to be fabricated, protrude adjacent to the recessed parts, and are tapered. The protruding parts and the recessed parts are arranged at regular intervals. It is possible to simply fabricate the two-layered barrier rib for inkjet application through a single embossing process at low cost using the mold for fabricating the barrier rib of the present invention.

Abstract: A method of transferring graphene includes forming a sacrificial layer and a graphene layer sequentially on a first substrate, bonding the graphene layer to a target layer, and removing the sacrificial layer using a laser and separating the first substrate from the graphene layer.

Abstract: Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory device may include a substrate and a plurality of semiconductor pillars on the substrate. A plurality of control gate electrodes may be stacked on the substrate and intersecting the plurality of semiconductor pillars. A plurality of dummy electrodes may be stacked adjacent to the plurality of control gate electrodes on the substrate, the plurality of dummy electrodes being spaced apart from the plurality of control gate electrodes. A plurality of via plugs may be connected to the plurality of control gate electrodes. A plurality of wordlines may be on the plurality of via plugs. Each of the plurality of via plugs may penetrate a corresponding one of the plurality of control gate electrodes and at least one of the plurality of dummy electrodes.

Abstract: A method of manufacturing a semiconductor device using a metal oxide includes forming a metal oxide layer on a substrate, forming an amorphous semiconductor layer on the metal oxide layer, and forming a polycrystalline semiconductor layer by crystallizing the amorphous semiconductor layer using the metal oxide layer.

Abstract: A structure includes a silicon substrate, a plurality of silicon rods on the silicon substrate, a silicon layer on the plurality of silicon rods, and a GaN substrate on the silicon layer.

Abstract: A method for forming a selective ohmic contact for a Group III-nitride heterojunction structured device may include forming a conductive layer and a capping layer on an epitaxial substrate including at least one Group III-nitride heterojunction layer and having a defined ohmic contact region, the capping layer being formed on the conductive layer or between the conductive layer and the Group III-nitride heterojunction layer in one of the ohmic contact region and non-ohmic contact region, and applying at least one of a laser annealing process and an induction annealing process on the substrate at a temperature of less than or equal to about 750° C. to complete the selective ohmic contact in the ohmic contact region.

Abstract: An electrode structure, a GaN-based semiconductor device including the electrode structure, and methods of manufacturing the same, may include a GaN-based semiconductor layer and an electrode structure on the GaN-based semiconductor layer. The electrode structure may include an electrode element including a conductive material and a diffusion layer between the electrode element and the GaN-based semiconductor layer. The diffusion layer may include a material which is an n-type dopant with respect to the GaN-based semiconductor layer, and the diffusion layer may contact the GaN-based semiconductor layer. A region of the GaN-based semiconductor layer contacting the diffusion layer may be doped with the n-type dopant. The material of the diffusion layer may comprise a Group 4 element.

Abstract: The disclosed mold includes recessed parts which have a shape corresponding to embossed portions of the barrier rib to be fabricated, and protruding parts which have a shape corresponding to depressed portions of the barrier rib to be fabricated, protrude adjacent to the recessed parts, and are tapered. The protruding parts and the recessed parts are arranged at regular intervals. It is possible to simply fabricate the two-layered barrier rib for inkjet application through a single embossing process at low cost using the mold for fabricating the barrier rib of the present invention.

Abstract: A solar cell including: a semiconductor substrate, a passivation film disposed on a side of the semiconductor substrate, a protective layer disposed on a side of the passivation film opposite the semiconductor substrate, and an electrode disposed on a side of the protective layer opposite the passivation film, wherein the electrode includes a product of a conductive paste including glass frit and a conductive material, and wherein the protective layer includes a material having an absolute value of a Gibb's free energy which is less than an absolute value of a Gibb's free energy of each component of the glass frit.

Abstract: Example methods may provide a thin film etching method. Example thin film etching methods may include forming a Ga—In—Zn—O film on a substrate, forming a mask layer covering a portion of the Ga—In—Zn—O film, and etching the Ga—In—Zn—O film using the mask layer as an etch barrier, wherein an etching gas used in the etching includes chlorine. The etching gas may further include an alkane (CnH2n+2) and H2 gas. The chlorine gas may be, for example, Cl2, BCl3, and/or CCl3, and the alkane gas may be, for example, CH4.

Abstract: Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory device may include a substrate and a plurality of semiconductor pillars on the substrate. A plurality of control gate electrodes may be stacked on the substrate and intersecting the plurality of semiconductor pillars. A plurality of dummy electrodes may be stacked adjacent to the plurality of control gate electrodes on the substrate, the plurality of dummy electrodes being spaced apart from the plurality of control gate electrodes. A plurality of via plugs may be connected to the plurality of control gate electrodes. A plurality of wordlines may be on the plurality of via plugs. Each of the plurality of via plugs may penetrate a corresponding one of the plurality of control gate electrodes and at least one of the plurality of dummy electrodes.