Patents by Inventor Yoo Rim CHA

Yoo Rim CHA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11183462
    Abstract: A substrate having an electronic component embedded therein includes a core structure including a first insulating body and a plurality of core wiring layers disposed on or in the first insulating body, and having a cavity penetrating at least a portion of the first insulating body in a thickness direction of the substrate and including a stopper layer as a bottom surface of the cavity, and an electronic component disposed in the cavity and attached to the stopper layer, and a surface of the stopper layer connected to the electronic component has a composite including at least two among a metal material, an inorganic particle, a filler, and an insulating resin.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: November 23, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Mi Sun Hwang, Dae Jung Byun, Chang Hwa Park, Sang Ho Jeong, Jun Hyeong Jang, Ki Ho Na, Je Sang Park, Yong Duk Lee, Yoo Rim Cha, Yeo Il Park
  • Publication number: 20210327832
    Abstract: A semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, and an inductance sensing part having a coil form and electrically connected to the semiconductor chip.
    Type: Application
    Filed: June 24, 2021
    Publication date: October 21, 2021
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoo Rim CHA, Joo Hwan JUNG, Jung Chul GONG, Yong Ho BAEK, Young Sik HUR
  • Patent number: 11075175
    Abstract: A semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, and an inductance sensing part having a coil form and electrically connected to the semiconductor chip.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: July 27, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoo Rim Cha, Joo Hwan Jung, Jung Chul Gong, Yong Ho Baek, Young Sik Hur
  • Publication number: 20210193609
    Abstract: An electronic component embedded substrate includes a core structure including a first insulating body and core wiring layers and having a cavity and having a stopper layer disposed as a bottom surface; an electronic component disposed in the cavity and attached to the stopper layer; and a build-up structure including a second insulating body covering at least a portion each of the core structure and the electronic component and filling at least a portion of the cavity, and build-up wiring layers wherein the stopper layer has a first region in which a portion of one surface is exposed from the first insulating body and a second region in which the other portion of one surface is covered with the first insulating body, and a surface roughness of one surface of the stopper layer in the first region is greater than that of the stopper layer in the second region.
    Type: Application
    Filed: February 28, 2020
    Publication date: June 24, 2021
    Inventors: Mi Sun Hwang, Dae Jung Byun, Chang Hwa Park, Sang Ho Jeong, Jun Hyeong Jang, Ki Ho Na, Je Sang Park, Yong Duk Lee, Yoo Rim Cha, Yeo Il Park
  • Publication number: 20210183784
    Abstract: A substrate having an electronic component embedded therein includes a core structure including a first insulating body and a plurality of core wiring layers disposed on or in the first insulating body, and having a cavity penetrating at least a portion of the first insulating body in a thickness direction of the substrate and including a stopper layer as a bottom surface of the cavity, and an electronic component disposed in the cavity and attached to the stopper layer, and a surface of the stopper layer connected to the electronic component has a composite including at least two among a metal material, an inorganic particle, a filler, and an insulating resin.
    Type: Application
    Filed: March 5, 2020
    Publication date: June 17, 2021
    Inventors: Mi Sun HWANG, Dae Jung BYUN, Chang Hwa PARK, Sang Ho JEONG, Jun Hyeong JANG, Ki Ho NA, Je Sang PARK, Yong Duk LEE, Yoo Rim CHA, Yeo Il PARK
  • Patent number: 10833070
    Abstract: A fan-out semiconductor package module that is easily manufactured includes a first connection member including a wiring layer, a first passive component mounted on the first connection member, a first encapsulation portion encapsulating at least a portion of the first connection member and the first passive component, a semiconductor chip having an active surface with a connection pad disposed thereon and an inactive surface opposing the active surface and disposed in a first through-hole penetrating through the first connection member and the first encapsulation portion, a second encapsulation portion covering at least a portion of the semiconductor chip and encapsulating at least a portion of the first encapsulation portion and the first connection member, and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad and the first passive component.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: November 10, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Chul Gong, Yong Ho Baek, Young Sik Hur, Joo Hwan Jung, Yoo Rim Cha
  • Publication number: 20200051933
    Abstract: A semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, and an inductance sensing part having a coil form and electrically connected to the semiconductor chip.
    Type: Application
    Filed: February 26, 2019
    Publication date: February 13, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoo Rim CHA, Joo Hwan JUNG, Jung Chul GONG, Yong Ho BAEK, Young Sik HUR
  • Publication number: 20190273079
    Abstract: A fan-out semiconductor package module that is easily manufactured includes a first connection member including a wiring layer, a first passive component mounted on the first connection member, a first encapsulation portion encapsulating at least a portion of the first connection member and the first passive component, a semiconductor chip having an active surface with a connection pad disposed thereon and an inactive surface opposing the active surface and disposed in a first through-hole penetrating through the first connection member and the first encapsulation portion, a second encapsulation portion covering at least a portion of the semiconductor chip and encapsulating at least a portion of the first encapsulation portion and the first connection member, and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad and the first passive component.
    Type: Application
    Filed: August 21, 2018
    Publication date: September 5, 2019
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Chul GONG, Yong Ho BAEK, Young Sik HUR, Joo Hwan JUNG, Yoo Rim CHA
  • Patent number: 10403562
    Abstract: A fan-out semiconductor package module includes: a structure including a wiring member including wiring patterns, one or more first passive components disposed on the wiring member and electrically connected to the wiring pattern, and a first encapsulant encapsulating at least portions of each of the one or more first passive components, and having a first through-hole penetrating through the wiring member and the first encapsulant; a semiconductor chip disposed in the first through-hole of the structure and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; a second encapsulant encapsulating at least portions of the semiconductor chip and filling at least portions of the first through-hole; and a connection member disposed on the structure and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads and the wiring patterns.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: September 3, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong Ho Baek, Joo Hwan Jung, Yoo Rim Cha, Young Sik Hur, Jung Chul Gong
  • Publication number: 20190131212
    Abstract: A fan-out semiconductor package module includes: a structure including a wiring member including wiring patterns, one or more first passive components disposed on the wiring member and electrically connected to the wiring pattern, and a first encapsulant encapsulating at least portions of each of the one or more first passive components, and having a first through-hole penetrating through the wiring member and the first encapsulant; a semiconductor chip disposed in the first through-hole of the structure and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; a second encapsulant encapsulating at least portions of the semiconductor chip and filling at least portions of the first through-hole; and a connection member disposed on the structure and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads and the wiring patterns.
    Type: Application
    Filed: April 2, 2018
    Publication date: May 2, 2019
    Inventors: Yong Ho BAEK, Joo Hwan JUNG, Yoo Rim CHA, Young Sik HUR, Jung Chul GONG