Patents by Inventor Yorito Sakano

Yorito Sakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190273883
    Abstract: An increase in memory capacity is suppressed in a solid-state imaging element that performs correlated double sampling processing. A pixel circuit sequentially generates each of a predetermined reset level and a plurality of signal levels corresponding to the exposure amount. An analog-to-digital converter converts a predetermined reset level into digital data and outputs the data as reset data, converts each of the plurality of pieces of signal data into digital data, and outputs the data as signal data. An arithmetic circuit holds a difference between the reset data and the signal data output first, as held data in a memory, and then adds the held data and the signal data output second and subsequent times together and causes the memory to hold the added data as new held data.
    Type: Application
    Filed: October 10, 2017
    Publication date: September 5, 2019
    Inventors: MASAKI SAKAKIBARA, YORITO SAKANO, SATOKO IIDA
  • Patent number: 10319777
    Abstract: A pixel circuit includes a floating diffusion layer of a first conductivity-type between a drain/source of a second conductivity-type and a source/drain of the second conductivity-type. The source/drain and the drain/source touch the floating diffusion layer. A cathode of a photoelectric converter is electrically connected to the floating diffusion layer. An anode of the photoelectric converter touches the cathode. The cathode is of the first conductivity-type and the anode is of the second conductivity-type.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: June 11, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Yorito Sakano
  • Patent number: 10306166
    Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: May 28, 2019
    Assignee: Sony Corporation
    Inventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota
  • Publication number: 20190157323
    Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.
    Type: Application
    Filed: March 20, 2018
    Publication date: May 23, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI
  • Patent number: 10277848
    Abstract: The present technology relates to a solid-state imaging device, a method of driving the solid-state imaging device, and an electronic apparatus by which pixels can be read effectively. The solid-state imaging device includes a readout unit that performs a common-source operation or a source follower operation with respect to pixels to read a signal for each column. According to a level of illumination, the readout unit performs a common-source readout operation to reset a floating diffusion region and read an electric charge transferred from a photoelectric transducer and held in the floating diffusion region, and performs a source follower readout operation to reset the floating diffusion region and read the electric charge transferred from the photoelectric transducer and held in the floating diffusion region. The present technology is applicable to a solid-state imaging device such as a CMOS image sensor.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: April 30, 2019
    Assignee: Sony Corporation
    Inventors: Masaki Sakakibara, Yorito Sakano
  • Publication number: 20190098236
    Abstract: The present disclosure relates to a solid-state image pickup device and an electronic apparatus that enable the performance of a logarithmic sensor in a solar-cell mode to improve. After Signal (S) is read, a P-phase signal (N) is read in a conducted state in which RST is ON, and a P-phase signal (N?) is read in a non-conducted state in which the RST is OFF. Thus, in a case where sufficient incident light illuminance is provided (Bright), S?N being the difference with respect to the P phase acquired in the conducted state in which the RST is ON, is selected and output. In a case where capacitance is insufficiently charged in a low-illuminance condition in which the incident light is less in amount (Dark), S?N? being the difference with respect to the P phase acquired in the conducted state in which the RST is OFF, is selected and output. The present disclosure can be applied to, for example, a CMOS solid-state image pickup device used for an image pickup device, such as a camera.
    Type: Application
    Filed: July 15, 2016
    Publication date: March 28, 2019
    Inventors: YOSHIAKI TASHIRO, YORITO SAKANO
  • Publication number: 20190019820
    Abstract: The present disclosure relates to a solid-state imaging device and an electronic apparatus which allow reduction of optical crosstalk. In an example of B of FIG. 5, a charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. In an example of C of FIG. 5, a charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a half (one side) of a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. By placing the charge storage unit (capacitance element) formed in the substrate in the foregoing manner between PDs which are first photoelectric conversion units, it is possible to allow the capacitance element to function as a shield pair against crosstalk between the PDs in a unit pixel.
    Type: Application
    Filed: January 13, 2017
    Publication date: January 17, 2019
    Inventors: MASAAKI TAKIZAWA, YASUSHI TATESHITA, TAKAHIRO TOYOSHIMA, TAKUYA TOYOFUKU, YORITO SAKANO, MOTONOBU TORII
  • Publication number: 20180241955
    Abstract: The present technology relates to a solid-state imaging device, a method for driving the solid-state imaging device, and an electronic apparatus, the solid-state imaging device being capable of expanding the dynamic range without deteriorating the image quality. The solid-state imaging device includes a pixel array section having a plurality of unit pixels and a drive section. Each of the unit pixels includes a first photoelectric conversion section, a second photoelectric conversion section which is less sensitive than the first photoelectric conversion section, a charge storage section configured to store charges generated by the second photoelectric conversion section, a charge-voltage conversion section, a first transfer gate section configured to transfer charges from the first photoelectric conversion section, and a second transfer gate section configured to combine the potential of the charge-voltage conversion section with the potential of the charge storage section.
    Type: Application
    Filed: March 3, 2016
    Publication date: August 23, 2018
    Inventors: Yorito SAKANO, Isao HIROTA, Motonobu TORII, Masaaki TAKIZAWA, Junichiro AZAMI, Motohashi YUICHI, Atsushi SUZUKI
  • Publication number: 20180048836
    Abstract: The present technology relates to a solid-state imaging device, a driving method, and an electronic apparatus capable of obtaining a high-quality image more easily. The solid-state imaging device includes a pixel array region in which a plurality of pixels that photoelectrically converts incident light is provided. A first pixel group and a second pixel group having different output characteristics are provided in the pixel array region, and the second pixel group is arranged in a position displaced from the first pixel group in a horizontal direction and in a vertical direction by half a pixel. By arranging the first pixel group and the second pixel group in this manner, deterioration in resolution of an image obtained by photographing may be minimized, and a high-quality image may be obtained more easily. The present technology is applicable to the solid-state imaging device.
    Type: Application
    Filed: March 4, 2016
    Publication date: February 15, 2018
    Inventors: Yorito SAKANO, Hiroki UI
  • Publication number: 20180033809
    Abstract: The present technology relates to a solid-state image sensing device and an electronic device capable of reducing noises. The solid-state image sensing device includes: a photoelectric conversion unit; a charge holding unit for holding charges transferred from the photoelectric conversion unit; a first transfer transistor for transferring charges from the photoelectric conversion unit to the charge holding unit; and a light blocking part including a first light blocking part and a second light blocking part, in which the first light blocking part is arranged between a second surface opposite to a first surface as a light receiving surface of the photoelectric conversion unit and the charge holding unit, and covers the second surface, and is formed with a first opening, and the second light blocking part surrounds the side surface of the photoelectric conversion unit. The present technology is applicable to solid-state image sensing devices of backside irradiation type, for example.
    Type: Application
    Filed: February 12, 2016
    Publication date: February 1, 2018
    Inventors: Hiroshi TAYANAKA, Kentaro AKIYAMA, Yorito SAKANO, Takashi OINOUE, Yoshiya HAGIMOTO, Yusuke MATSUMURA, Naoyuki SATO, Yuki MIYANAMI, Yoichi UEDA, Ryosuke MATSUMOTO
  • Publication number: 20170359537
    Abstract: An imaging apparatus with logarithmic characteristics includes: a photodiode that receives light; a well tap unit that fixes the potential of an N-type region of the photodiode; and a resetting unit that resets the photodiode, a P-type region of the photodiode outputting a voltage signal equivalent to a photocurrent subjected to logarithmic compression. The first potential to be supplied to the well tap unit is made lower than the second potential to be supplied to the resetting unit, so that the capacitance formed with the PN junction of the photodiode is charged when the resetting unit performs a reset operation. The present technology can be applied to unit pixels having logarithmic characteristics.
    Type: Application
    Filed: November 27, 2015
    Publication date: December 14, 2017
    Inventors: Yorito SAKANO, Tsutomu IMOTO, Hideo NOMURA, Yoshiaki TASHIRO, Toshiyuki NISHIHARA, Muriel COHEN, Frederick BRADY
  • Publication number: 20170353683
    Abstract: The present technology relates to a solid-state imaging device, a method of driving the solid-state imaging device, and an electronic apparatus by which pixels can be read effectively. The solid-state imaging device includes a readout unit that performs a common-source operation or a source follower operation with respect to pixels to read a signal for each column. According to a level of illumination, the readout unit performs a common-source readout operation to reset a floating diffusion region and read an electric charge transferred from a photoelectric transducer and held in the floating diffusion region, and performs a source follower readout operation to reset the floating diffusion region and read the electric charge transferred from the photoelectric transducer and held in the floating diffusion region. The present technology is applicable to a solid-state imaging device such as a CMOS image sensor.
    Type: Application
    Filed: January 4, 2016
    Publication date: December 7, 2017
    Inventors: Masaki SAKAKIBARA, Yorito SAKANO
  • Publication number: 20170318250
    Abstract: The present technology relates to an imaging device, a driving method, and an electronic apparatus capable of more quickly acquiring a high-quality image. In a pixel of a solid-state imaging device, a photoelectric conversion unit that performs a photoelectric conversion of incident light is disposed. An electric charge/voltage converting unit converts electric charge acquired by the photoelectric conversion unit into a voltage signal. A signal comparator compares a supplied reference signal with the voltage signal acquired by the electric charge/voltage converting unit and outputs a result of the comparison. A storage unit adaptively changes the conversion efficiency of the electric charge/voltage converting unit on the basis of a control signal acquired on the basis of a result of the comparison output from the signal comparator. The present technology can be applied to a solid-state imaging device.
    Type: Application
    Filed: October 23, 2015
    Publication date: November 2, 2017
    Inventors: MASAKI SAKAKIBARA, YORITO SAKANO
  • Publication number: 20170309671
    Abstract: A pixel circuit includes a floating diffusion layer of a first conductivity-type between a drain/source of a second conductivity-type and a source/drain of the second conductivity-type. The source/drain and the drain/source touch the floating diffusion layer. A cathode of a photoelectric converter is electrically connected to the floating diffusion layer. An anode of the photoelectric converter touches the cathode. The cathode is of the first conductivity-type and the anode is of the second conductivity-type.
    Type: Application
    Filed: June 26, 2017
    Publication date: October 26, 2017
    Inventor: Yorito SAKANO
  • Patent number: 9769406
    Abstract: A photoelectric conversion element that generates charges according to a light quantity of incident light and accumulates the charges in the inside thereof, a transfer transistor (TRG) that transfers the charges accumulated by the photoelectric conversion element, a first charge voltage conversion section that converts the charges transferred by the transfer transistor (TRG) into a voltage, and a substrate electrode of a MOS capacitor (a region of a second charge voltage conversion section facing a gate electrode) that connects the first charge voltage conversion section via a connection transistor (FDG). The gate electrode of the MOS capacitor is applied with a voltage that is different in a read period of the voltage signal converted by the first charge voltage conversion section and in a period other than the read period. The present disclosure can also be applied to a CMOS image sensor or the like.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: September 19, 2017
    Assignee: Sony Corporation
    Inventor: Yorito Sakano
  • Patent number: 9749557
    Abstract: A CMOS image sensor has an image array as a matrix of unit pixels each including at least a photodiode, a memory for holding a charge stored in the photodiode, a floating diffusion region for converting the charge in the memory into a voltage, a first transfer gate for transferring the charge from the photodiode to the memory, a second transfer gate for transferring the charge from the memory to the floating diffusion region, and a resetting transistor for resetting the charge in the floating diffusion region. The unit pixels are driven to set the potential of a potential barrier at a boundary between the memory and the floating diffusion region to a potential such that a charge overflowing the memory is transferred to the floating diffusion region, when the first transfer gate is turned on. The CMOS image sensor operates in a global shutter mode for capturing moving images.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: August 29, 2017
    Assignee: SONY CORPORATION
    Inventors: Yusuke Oike, Yorito Sakano, Keiji Mabuchi
  • Publication number: 20170237916
    Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.
    Type: Application
    Filed: May 3, 2017
    Publication date: August 17, 2017
    Inventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota
  • Patent number: 9721981
    Abstract: A pixel circuit includes a floating diffusion layer of a first conductivity-type between a drain/source of a second conductivity-type and a source/drain of the second conductivity-type. The source/drain and the drain/source touch the floating diffusion layer. A cathode of a photoelectric converter is electrically connected to the floating diffusion layer. An anode of the photoelectric converter touches the cathode. The cathode is of the first conductivity-type and the anode is of the second conductivity-type.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: August 1, 2017
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Yorito Sakano
  • Patent number: 9711559
    Abstract: A solid-state imaging device includes a photoelectric conversion section configured to generate photocharges and a transfer gate that transfers the photocharges to a semiconductor region. A method for driving a unit pixel includes a step of accumulating photocharges in a photoelectric conversion section and a step of accumulating the photocharges in a semiconductor region. A method of forming a solid-state imaging device includes implanting ions into a well layer through an opening in a mask, implanting additional ions into the well layer through an opening in another mask, and implanting other ions into the well layer through an opening in yet another mask. An electronic device includes the solid-state imaging device.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: July 18, 2017
    Assignee: SONY CORPORATION
    Inventors: Yorito Sakano, Keiji Mabuchi, Takashi Machida
  • Patent number: 9661194
    Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: May 23, 2017
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota