Patents by Inventor Yoshiaki Sugizaki

Yoshiaki Sugizaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170062667
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a semiconductor layer including a light emitting layer; and a phosphor layer provided on the semiconductor layer. The phosphor layer includes a plurality of phosphors, ?0.05<A×(AR)+B×(Np)+C<0.05 being satisfied for ?0.149055?(3×0.011797)?constant A??0.149055+(3×0.011797), ?0.000192?(3×0.00002461)?constant B??0.000192+(3×0.00002461), and 0.0818492?(3×0.005708)?constant C?0.0818492+(3×0.005708). AR is a ratio of a thickness of the phosphor layer to a width of the phosphor layer, and Np is a number of the plurality of phosphors.
    Type: Application
    Filed: March 4, 2016
    Publication date: March 2, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yosuke AKIMOTO, Akihiro Kojima, Miyoko Shimada, Hideyuki Tomizawa, Hideto Furuyama, Yoshiaki Sugizaki
  • Publication number: 20170054065
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a semiconductor layer including a first semiconductor layer, a second semiconductor layer, a light emitting layer, a first surface, and a second surface; an n-side electrode including a first n-side electrode and a second n-side electrode; a first contact unit; a second contact unit; an n-side interconnect unit; a p-side electrode; and an insulating film. The insulating film includes a first insulating portion, a second insulating portion, a third insulating portion, and a fourth insulating portion.
    Type: Application
    Filed: March 3, 2016
    Publication date: February 23, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki TOMIZAWA, Akihiro KOJIMA, Miyoko SHIMADA, Yosuke AKIMOTO, Hideto FURUYAMA, Yoshiaki SUGIZAKI
  • Patent number: 9566815
    Abstract: According to one embodiment, a first conveying path to form a conveying path from the sheet supply portion toward the ejector, a reader arranged on the first conveying path to read an image on a surface of the sheet, an erasure to erase the image on the sheet formed with image erasable material, a switching portion arranged on the first conveying path at a downstream side of the reader in a sheet conveying direction to switch the sheet conveying direction to a direction of the ejector or a direction of the erasure, and a second conveying path having the erasure which, at a position where the switching portion is arranged, branches from the first conveying path at the downstream side of the reader and merges with the first conveying path at a meeting point between the sheet supply portion and the reader.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: February 14, 2017
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventors: Ken Iguchi, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Kikuo Mizutani, Hiroyuki Taki, Hiroyuki Tsuchihashi, Chiaki Iizuka
  • Patent number: 9559279
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a semiconductor layer including a first semiconductor layer, a second semiconductor layer, a light emitting layer, a first surface, and a second surface; an n-side electrode including a first n-side electrode and a second n-side electrode; a first contact unit; a second contact unit; an n-side interconnect unit; a p-side electrode; and an insulating film. The insulating film includes a first insulating portion, a second insulating portion, a third insulating portion, and a fourth insulating portion.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: January 31, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Tomizawa, Akihiro Kojima, Miyoko Shimada, Yosuke Akimoto, Hideto Furuyama, Yoshiaki Sugizaki
  • Patent number: 9539842
    Abstract: An image erasing method, according to an embodiment, includes the steps of supplying a sheet from a sheet supply section and conveying the sheet from the sheet supply section on a first conveying path. The method further includes controlling, based on a selected mode, the first conveying path, a reader, a second conveying path, an erasing unit, and a switching section. When the selected mode is an erasing mode, the sheet is conveyed on the first conveying path without being read by the reader, conveyed on the second conveying path where the image is erased by the erasing unit, and then conveyed to a discharge tray. When the selected mode is a reading mode, the sheet is conveyed on the first conveying path where the surface of the sheet is read by the reader, and then conveyed to the discharge tray without being conveyed on the second conveying path.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: January 10, 2017
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventors: Ken Iguchi, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Kikuo Mizutani, Hiroyuki Taki, Hiroyuki Tsuchihashi, Chiaki Iizuka
  • Patent number: 9496471
    Abstract: A semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first interconnection section, a second interconnection section, and a varistor film. The semiconductor layer includes a light emitting layer. The first electrode is provided in a emitting region on the second surface. The second electrode is provided in a non-emitting region on the second surface. The first interconnection section is provided on the first electrode and electrically connected to the first electrode. The second interconnection section is provided on the second electrode and on the first electrode and electrically connected to the second electrode. The varistor film is provided in contact with the first electrode and the second interconnection section between the first electrode and the second interconnection section.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: November 15, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Akimoto, Yoshiaki Sugizaki, Hideyuki Tomizawa, Masanobu Ando, Akihiro Kojima, Gen Watari, Naoya Ushiyama, Tetsuro Komatsu, Miyoko Shimada, Hideto Furuyama
  • Patent number: 9478722
    Abstract: A method for manufacturing a light emitting device includes forming a multilayer body including a light emitting layer so that a first surface thereof is adjacent to a first surface side of a translucent substrate. A dielectric film on a second surface side opposite to the first surface of the multilayer body is formed having first and second openings on a p-side electrode and an n-side electrode. A seed metal on the dielectric film and an exposed surface of the first and second openings form a p-side metal interconnect layer and an n-side metal interconnect layer separating the seed metal into a p-side seed metal and an n-side seed metal by removing a part of the seed metal. A resin is formed in a space from which the seed metal is removed.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: October 25, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki Sugizaki, Hideki Shibata, Masayuki Ishikawa, Hideo Tamura, Tetsuro Komatsu, Akihiro Kojima
  • Publication number: 20160268478
    Abstract: According to one embodiment, the p-side electrode is provided on the second semiconductor layer. The insulating film is provided on the p-side electrode. The n-side electrode includes a first portion, a second portion, and a third portion. The first portion is provided on a side face of the first semiconductor layer. The second portion is provided in the first n-side region. The third portion overlaps the p-side electrode via the insulating film and connects the first portion and the second portion to each other.
    Type: Application
    Filed: August 19, 2015
    Publication date: September 15, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki TOMIZAWA, Akihiro KOJIMA, Miyoko SHIMADA, Yosuke AKIMOTO, Hideto FURUYAMA, Yoshiaki SUGIZAKI
  • Patent number: 9444013
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, an insulating film, a p-side interconnection section, an n-side interconnection section, a phosphor layer, and a metal film. The semiconductor layer is formed on a substrate which is then removed. The p-side interconnection section is provided on the insulating film and electrically connected to the p-side electrode. The n-side interconnection section is provided on the insulating film and electrically connected to the n-side electrode. The phosphor layer is provided on the first surface and includes a step portion continued to the side surface of the semiconductor layer. The metal film is provided on the side surface of the semiconductor layer and a side surface of the step portion of the phosphor layer.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: September 13, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Miyoko Shimada, Akihiro Kojima, Yosuke Akimoto, Hideto Furuyama, Hideyuki Tomizawa, Yoshiaki Sugizaki
  • Patent number: 9419192
    Abstract: According to one embodiment, a composite resin includes a resin component; and a plurality of first powder bodies dispersed in the resin component. Each of the first powder bodies has a nonlinear current-voltage characteristic having a decreasing resistance as a voltage increases. The first powder body is a polycrystalline powder body including a plurality of primary particles bound via a grain boundary. A component different from a major component of the primary particles exists in a higher concentration in the grain boundary than in an interior of the primary particles.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: August 16, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Sugizaki, Akihiro Kojima, Hideto Furuyama
  • Publication number: 20160218095
    Abstract: According to one embodiment, a composite resin includes a resin component; a plurality of first powder bodies dispersed in the resin component, and having a nonlinear current-voltage characteristic having a decreasing resistance as a voltage increases; and a plurality of second powder bodies dispersed in the resin component, and having electrical conductivity. The plurality of first powder bodies is a polycrystalline powder body including a plurality of primary particles bound via a grain boundary, a component different from a main component of the plurality of primary particles being present. A work function of the plurality of second powder bodies is not more than a work function of the plurality of primary particles.
    Type: Application
    Filed: September 4, 2015
    Publication date: July 28, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoshiaki SUGIZAKI
  • Publication number: 20160159130
    Abstract: An image erasing method, according to an embodiment, includes the steps of supplying a sheet from a sheet supply section and conveying the sheet from the sheet supply section on a first conveying path. The method further includes controlling, based on a selected mode, the first conveying path, a reader, a second conveying path, an erasing unit, and a switching section. When the selected mode is an erasing mode, the sheet is conveyed on the first conveying path without being read by the reader, conveyed on the second conveying path where the image is erased by the erasing unit, and then conveyed to a discharge tray. When the selected mode is a reading mode, the sheet is conveyed on the first conveying path where the surface of the sheet is read by the reader, and then conveyed to the discharge tray without being conveyed on the second conveying path.
    Type: Application
    Filed: February 11, 2016
    Publication date: June 9, 2016
    Inventors: Ken Iguchi, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Kikuo Mizutani, Hiroyuki Taki, Hiroyuki Tsuchihashi, Chiaki IIzuka
  • Publication number: 20160159129
    Abstract: According to one embodiment, an image erasing apparatus includes a sheet supply section, a discharge tray, a first conveying path, a reader, a second conveying path, an erasing unit and a switching section. A controller controls the first conveying path, the reader, the second conveying path, the erasing unit and the switching section depending on a selected mode. When the selected mode is an erasing mode, the sheet is conveyed on the first conveying path without being read by the reader, conveyed on the second conveying path where the image is erased by the erasing unit, and then conveyed to the discharge tray. When the selected mode is a reading mode, the sheet is conveyed on the first conveying path where the surface of the sheet is read by the reader, and then conveyed to the discharge tray without being conveyed on the second conveying path.
    Type: Application
    Filed: February 11, 2016
    Publication date: June 9, 2016
    Inventors: Ken Iguchi, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Kikuo Mizutani, Hiroyuki Taki, Hiroyuki Tsuchihashi, Chiaki IIzuka
  • Patent number: 9312457
    Abstract: According to one embodiment, a light emitting device includes a first base section, a light emitting section, and a first wiring section. The light emitting section is embedded on a first surface side of the first base section. The light emitting section includes a light emitting element. The first wiring section is provided on the first surface of the first base section. The first wiring section is connected to the light emitting element.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: April 12, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Akimoto, Akihiro Kojima, Miyoko Shimada, Hideto Furuyama, Yoshiaki Sugizaki
  • Patent number: 9306141
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer including a first surface, a second surface opposite to the first surface, and a light emitting layer; a p-side electrode provided on the second surface of the semiconductor layer in a region including the light emitting layer; an n-side electrode provided on the second surface of the semiconductor layer in a region not including the light emitting layer; an insulating film being more flexible than the semiconductor layer, the insulating film provided on the second surface and a side surface of the semiconductor layer, and the insulating film having a first opening reaching the p-side electrode and a second opening reaching the n-side electrode; a p-side interconnection layer provided on the insulating film and connected to the p-side electrode; and an n-side interconnection layer provided on the insulating film and connected to the n-side electrode.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: April 5, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Hamasaki, Akihiro Kojima, Yoshiaki Sugizaki
  • Patent number: 9302492
    Abstract: According to one embodiment, a first conveying path to form a conveying path from the sheet supply portion toward the ejector, a reader arranged on the first conveying path to read an image on a surface of the sheet, an erasure to erase the image on the sheet formed with image erasable material, a switching portion arranged on the first conveying path at a downstream side of the reader in a sheet conveying direction to switch the sheet conveying direction to a direction of the ejector or a direction of the erasure, and a second conveying path having the erasure which, at a position where the switching portion is arranged, branches from the first conveying path at the downstream side of the reader and merges with the first conveying path at a meeting point between the sheet supply portion and the reader.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: April 5, 2016
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
    Inventors: Ken Iguchi, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Kikuo Mizutani, Hiroyuki Taki, Hiroyuki Tsuchihashi, Chiaki Iizuka
  • Patent number: 9302493
    Abstract: According to one embodiment, a first conveying path to form a conveying path from the sheet supply portion toward the ejector, a reader arranged on the first conveying path to read an image on a surface of the sheet, an erasure to erase the image on the sheet formed with image erasable material, a switching portion arranged on the first conveying path at a downstream side of the reader in a sheet conveying direction to switch the sheet conveying direction to a direction of the ejector or a direction of the erasure, and a second conveying path having the erasure which, at a position where the switching portion is arranged, branches from the first conveying path at the downstream side of the reader and merges with the first conveying path at a meeting point between the sheet supply portion and the reader.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: April 5, 2016
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
    Inventors: Ken Iguchi, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Kikuo Mizutani, Hiroyuki Taki, Hiroyuki Tsuchihashi, Chiaki Iizuka
  • Publication number: 20160079485
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a light-emitting element including a light-emitting layer; a first transparent body provided on the light-emitting element; a phosphor scattered in the first transparent body and emitting a light of a different wavelength from a radiated light of the light-emitting layer; and a second transparent body including a first transparent portion and a second transparent portion. The first transparent portion is surrounded by the first transparent body in an area on the light-emitting element. The second transparent portion is provided on the first transparent body and the first transparent portion. The second transparent portion includes an inclined portion provided on the first transparent portion. The inclined portion is inclined with respect to a first direction orthogonal to the light-emitting layer.
    Type: Application
    Filed: March 6, 2015
    Publication date: March 17, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yosuke AKIMOTO, Akihiro Kojima, Miyoko Shimada, Hideyuki Tomizawa, Yoshiaki Sugizaki, Hideto Furuyama
  • Publication number: 20160072013
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked body, a first electrode, a second electrode, a first interconnection section, a second interconnection section, an insulating layer, a first transmissive layer, a first reflection film, and a second transmissive layer. The stacked body includes a first layer having a rough surface, a second layer, and a light emitting layer. The first transmissive layer is provided on a side of the stacked body. The first reflection film is provided between the first transmissive layer and the insulating layer. The second transmissive layer is provided on the rough surface of the first layer and on the first transmissive layer, and includes a plurality of particles. Surface roughness of a surface on the second transmissive layer side of the first transmissive layer is smaller than surface roughness of the rough surface of the first layer.
    Type: Application
    Filed: March 6, 2015
    Publication date: March 10, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoshiaki SUGIZAKI
  • Publication number: 20160027982
    Abstract: A method for manufacturing a light emitting device includes forming a multilayer body including a light emitting layer so that a first surface thereof is adjacent to a first surface side of a translucent substrate. A dielectric film on a second surface side opposite to the first surface of the multilayer body is formed having first and second openings on a p-side electrode and an n-side electrode. A seed metal on the dielectric film and an exposed surface of the first and second openings form a p-side metal interconnect layer and an n-side metal interconnect layer separating the seed metal into a p-side seed metal and an n-side seed metal by removing a part of the seed metal. A resin is formed in a space from which the seed metal is removed.
    Type: Application
    Filed: October 5, 2015
    Publication date: January 28, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki SUGIZAKI, Hideki SHIBATA, Masayuki ISHIKAWA, Hideo TAMURA, Tetsuro KOMATSU, Akihiro KOJIMA