Patents by Inventor Yoshihiko Fukumoto
Yoshihiko Fukumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8471301Abstract: A device includes a plurality of photoelectric conversion regions, an interlayer insulating film arranged on the plurality of photoelectric conversion regions, a protective insulating film that is arranged in contact with the interlayer insulating film and has a refractive index different from that of the interlayer insulating film, recesses arranged in a light-receiving surface of each of the plurality of photoelectric conversion regions, and embedded regions embedded in the recesses. When a wavelength of incident light to each of the plurality of photoelectric conversion regions is denoted by ? and a refractive index of the embedded regions is denoted by n, a depth d of the recesses is represented by an expression d??/4n.Type: GrantFiled: December 8, 2010Date of Patent: June 25, 2013Assignee: Canon Kabushiki KaishaInventors: Masanori Kudo, Yoshiyuki Hayashi, Kazuhiro Saito, Taro Kato, Yoshihiko Fukumoto
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Patent number: 8063926Abstract: The present invention has an object to reduce a thickness of a protecting film having a small thermal conductivity. A thermal head includes: a plurality of heat generating resistors formed via an insulating layer; a driver circuit unit for driving the plurality of heat generating resistors to generate a heat; a wiring for connecting the driver circuit unit to the plurality of heat generating resistors; a protecting film formed to cover the plurality of heat generating resistors, the driver circuit unit and the wiring, wherein the plurality of heat generating resistors, the driver circuit unit, the wiring 11 and the protecting film are formed on a substrate, and wherein a thermal conductor having a thermal conductivity larger than that of the protecting film is disposed on the protecting film, in opposition to each of the plurality of heat generating resistors.Type: GrantFiled: August 24, 2009Date of Patent: November 22, 2011Assignee: Canon Kabushiki KaishaInventor: Yoshihiko Fukumoto
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Patent number: 7990405Abstract: A thermal head is provided with increased contact pressure between a heat generating portion and a printing medium to increase printing quality with a low heat loss. The thermal head includes: a plurality of heat generating resistors formed via an insulating layer; a driver circuit unit for driving the plurality of heat generating resistors to generate a heat; a wiring for connecting the driver circuit unit to the plurality of heat generating resistors; a protecting film formed to cover the plurality of heat generating resistors, the driver circuit unit and the wiring. The plurality of heat generating resistors, the driver circuit unit, the wiring and the protecting film are formed on a substrate. A thermal insulating layer having a thermal conductivity smaller than 0.5 W/m·K and having a maximum thickness of larger than 10 ?m is provided between the heat generating resistor and the substrate.Type: GrantFiled: August 24, 2009Date of Patent: August 2, 2011Assignee: Canon Kabushiki KaishaInventor: Yoshihiko Fukumoto
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Publication number: 20110140219Abstract: A device includes a plurality of photoelectric conversion regions, an interlayer insulating film arranged on the plurality of photoelectric conversion regions, a protective insulating film that is arranged in contact with the interlayer insulating film and has a refractive index different from that of the interlayer insulating film, recesses arranged in a light-receiving surface of each of the plurality of photoelectric conversion regions, and embedded regions embedded in the recesses. When a wavelength of incident light to each of the plurality of photoelectric conversion regions is denoted by ? and a refractive index of the embedded regions is denoted by n, a depth d of the recesses is represented by an expression d??/4n.Type: ApplicationFiled: December 8, 2010Publication date: June 16, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Masanori Kudo, Yoshiyuki Hayashi, Kazuhiro Saito, Taro Kato, Yoshihiko Fukumoto
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Patent number: 7749790Abstract: A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element to a third semiconductor region of the second conductivity type. Moreover, the photoelectric conversion device comprises an isolation region for electrically isolating the second semiconductor region from a fourth semiconductor region of the second conductivity type adjacent to the second semiconductor region. Wiring for applying voltage to the gate electrode is arranged on the isolation region. Here, a fifth semiconductor region of the second conductivity type having an impurity concentration lower than that of the fourth semiconductor region is provided between the fourth semiconductor region and the isolation region.Type: GrantFiled: October 28, 2008Date of Patent: July 6, 2010Assignee: Canon Kabushiki KaishaInventors: Ken-ichiro Ura, Yoshihiko Fukumoto, Yuzo Kataoka
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Publication number: 20100053294Abstract: The present invention provides a thermal head with increased contact pressure between a heat generating portion and a printing medium to increase printing quality with a low heat loss. A thermal head includes: a plurality of heat generating resistors formed via an insulating layer; a driver circuit unit for driving the plurality of heat generating resistors to generate a heat; a wiring for connecting the driver circuit unit to the plurality of heat generating resistors; a protecting film formed to cover the plurality of heat generating resistors, the driver circuit unit and the wiring, wherein the plurality of heat generating resistors, the driver circuit unit, the wiring and the protecting film are formed on a substrate, and a thermal insulating layer having a thermal conductivity smaller than 0.5 W/m·K and having a maximum thickness of larger than 10 ?m is provided between the heat generating resistor and the substrate.Type: ApplicationFiled: August 24, 2009Publication date: March 4, 2010Applicant: CANON KABUSHIKI KAISHAInventor: Yoshihiko Fukumoto
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Publication number: 20100053296Abstract: The present invention has an object to reduce a thickness of a protecting film having a small thermal conductivity. A thermal head includes: a plurality of heat generating resistors formed via an insulating layer; a driver circuit unit for driving the plurality of heat generating resistors to generate a heat; a wiring for connecting the driver circuit unit to the plurality of heat generating resistors; a protecting film formed to cover the plurality of heat generating resistors, the driver circuit unit and the wiring, wherein the plurality of heat generating resistors, the driver circuit unit, the wiring 11 and the protecting film are formed on a substrate, and wherein a thermal conductor having a thermal conductivity larger than that of the protecting film is disposed on the protecting film, in opposition to each of the plurality of heat generating resistors.Type: ApplicationFiled: August 24, 2009Publication date: March 4, 2010Applicant: CANON KABUSHIKI KAISHAInventor: Yoshihiko Fukumoto
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Publication number: 20090053849Abstract: A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element to a third semiconductor region of the second conductivity type. Moreover, the photoelectric conversion device comprises an isolation region for electrically isolating the second semiconductor region from a fourth semiconductor region of the second conductivity type adjacent to the second semiconductor region. Wiring for applying voltage to the gate electrode is arranged on the isolation region. Here, a fifth semiconductor region of the second conductivity type having an impurity concentration lower than that of the fourth semiconductor region is provided between the fourth semiconductor region and the isolation region.Type: ApplicationFiled: October 28, 2008Publication date: February 26, 2009Applicant: CANON KABUSHISKI KAISHAInventors: Ken-ichiro Ura, Yoshihiko Fukumoto, Yuzo Kataoka
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Patent number: 7459760Abstract: A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element to a third semiconductor region of the second conductivity type. Moreover, the photoelectric conversion device comprises an isolation region for electrically isolating the second semiconductor region from a fourth semiconductor region of the second conductivity type adjacent to the second semiconductor region. Wiring for applying voltage to the gate electrode is arranged on the isolation region. Here, a fifth semiconductor region of the second conductivity type having an impurity concentration lower than that of the fourth semiconductor region is provided between the fourth semiconductor region and the isolation region.Type: GrantFiled: June 25, 2007Date of Patent: December 2, 2008Assignee: Canon Kabushiki KaishaInventors: Ken-ichiro Ura, Yoshihiko Fukumoto, Yuzo Kataoka
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Publication number: 20080094132Abstract: Between an analog circuit area 120 which includes circuits whose characteristics are degraded according to the level of noise contained in an input signal and a digital circuit area 130 which includes circuits that produce noise at such a level that the characteristics of the circuits in the analog circuit area 120 are caused to degrade, a digital circuit area 140 which only includes circuits that produce noise at such a level that the characteristics of the circuits in the analog circuit area 120 are not caused to degrade (or are caused to degrade within their acceptable limits) is located so as to prevent contact between the analog circuit area 120 and the digital circuit area 130.Type: ApplicationFiled: February 14, 2006Publication date: April 24, 2008Inventors: Takashi Kakemizu, Yoshihiko Fukumoto
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Publication number: 20080006892Abstract: A photoelectric conversion device comprises a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type serving as a photoelectric conversion element together with a part of the first semiconductor region; a gate electrode transferring electric carriers generated in the photoelectric conversion element to a third semiconductor region of the second conductivity type. Moreover, the photoelectric conversion device comprises an isolation region for electrically isolating the second semiconductor region from a fourth semiconductor region of the second conductivity type adjacent to the second semiconductor region. Wiring for applying voltage to the gate electrode is arranged on the isolation region. Here, a fifth semiconductor region of the second conductivity type having an impurity concentration lower than that of the fourth semiconductor region is provided between the fourth semiconductor region and the isolation region.Type: ApplicationFiled: June 25, 2007Publication date: January 10, 2008Applicant: CANON KABUSHIKI KAISHAInventors: Ken-Ichiro URA, Yoshihiko FUKUMOTO, Yuzo KATAOKA
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Patent number: 6743723Abstract: A fabrication method of semiconductor device comprising a step of forming an electroconductive material film on a substrate, a step of polishing the electroconductive material film, and a step of washing a polished surface of the electroconductive material film, wherein the washing step is a step of carrying out ultrasonic washing with a washing solution to which an ultrasonic wave is applied, prior to physical washing.Type: GrantFiled: October 28, 1999Date of Patent: June 1, 2004Assignee: Canon Kabushiki KaishaInventor: Yoshihiko Fukumoto
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Patent number: 6374384Abstract: The Reed-Solomon error-correcting circuit in accordance with a first invention is constructed so as to perform parallel operation by two-step pipelined processing in a syndrome generating circuit and an error-correcting circuit. The error-correcting circuit operates in synchronization with a clock with a period of 1/N the period of the received symbol clock, where N≧1, and N is an integer. Further, an error-locator-polynomial/error-evaluator-polynomial calculating circuit in the error-correcting circuit has a memory in which the syndrome is input and a Galois-field operations circuit that is connected to the memory. By these means, the Reed-Solomon error-correcting circuit in the present invention performs high-speed processing with small-scale hardware. Further, in an Euclid's algorithm that obtains an error-locator-polynomial, by performing Galois-field operations, from the syndrome equation S(z)=sk−1zk−1+sk−2zk−2+ . . .Type: GrantFiled: March 10, 1999Date of Patent: April 16, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuhiro Ohta, Toshihiko Fukuoka, Yoshihiko Fukumoto
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Publication number: 20020004302Abstract: A fabrication method of semiconductor device comprising a step of forming an electroconductive material film on a substrate, a step of polishing the electroconductive material film, and a step of washing a polished surface of the electroconductive material film, wherein the washing step is a step of carrying out ultrasonic washing with a washing solution to which an ultrasonic wave is applied, prior to physical washing.Type: ApplicationFiled: October 28, 1999Publication date: January 10, 2002Inventor: YOSHIHIKO FUKUMOTO
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Patent number: 6307264Abstract: A process for producing a semiconductor device comprises a step of polishing of a region of an electroconductive material serving as an electrode or a wiring line in an insulating layer formed on a semiconductor region, the region of the electroconductive material being electrically connected to the semiconductor region, wherein a region of another material is formed within the region of the electroconductive material to be polished. Also a semiconductor device having the region is provided. A process for producing an active matrix substrate comprises a step of polishing of picture element electrodes made of a metal provided on crossing portions of plural signal lines and plural scanning lines and a means for applying voltage to the picture elements, wherein a region of another material is formed within the region of the picture element electrode to be polished. An active matrix substrate has such picture element electrodes as mentioned above.Type: GrantFiled: September 16, 1996Date of Patent: October 23, 2001Assignee: Canon Kabushiki KaishaInventor: Yoshihiko Fukumoto
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Patent number: 6157429Abstract: A matrix substrate comprises a pixel region formed by arranging a plurality of pixel electrodes to a matrix, drive circuit regions for feeding said pixel electrodes with electric signals and sealing regions. The gaps separating the pixel electrodes are filled with insulation members of an insulating material to provide a continuous surface connecting those of the pixel electrodes and members of the material of the pixel electrodes and those of the material of the insulation members are arranged at least either in the drive circuit regions or in the sealing regions to provide a continuous surface there.Type: GrantFiled: October 17, 1997Date of Patent: December 5, 2000Assignee: Canon Kabushiki KaishaInventors: Mamoru Miyawaki, Katsumi Kurematsu, Osamu Koyama, Yoshihiko Fukumoto, Toru Nakazawa
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Patent number: 6122766Abstract: A syndrome calculation unit 101 forming a first pipeline stage, a Euclidean algorithm arithmetic operation/error value calculation unit 102 and a Chien search unit 103 together forming a second pipeline stage, and an error correction unit 105 forming a third pipeline stage are provided. The unit 102 implements, by iterative use of a single inverse element calculator, a single Galois multiplier, and a single Galois adder, the Euclidean algorithm arithmetic operation of finding an error locator polynomial .sigma.(z) and an error evaluator polynomial .omega.(z) from a syndrome polynomial S(z) and the calculation of finding an error value e.sub.u by dividing an error evaluation value .omega.(.alpha..sup.-ju) by an error locator polynomial differential value .sigma.'(.alpha..sup.-ju).Type: GrantFiled: October 16, 1997Date of Patent: September 19, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshihiko Fukuoka, Yoshihiko Fukumoto, Kazuhiro Ohta
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Patent number: 5933204Abstract: Disclosed herein is a method of producing a display device comprising a substrate and a plurality of conductive members provided on the substrate, said conductive members each having a substantially even surface and making up pixels, wherein the conductive members are smoothed by means of chemical mechanical polishing.Type: GrantFiled: June 27, 1996Date of Patent: August 3, 1999Assignee: Canon Kabushiki KaishaInventor: Yoshihiko Fukumoto
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Patent number: 5773355Abstract: A semiconductor substrate includes a semiconductor layer, where the density of an impurity is reduced by out diffusion, provided on an insulating layer. In a method for manufacturing such a semiconductor substrate, a semiconductor substrate including a high-density impurity layer at the side of its surface is bonded to another substrate having an insulating layer. Thereafter, the semiconductor substrate is removed, and the impurity density of the remaining high-density impurity layer is reduced by out diffusion.Type: GrantFiled: May 29, 1997Date of Patent: June 30, 1998Assignee: Canon Kabushiki KaishaInventors: Shunsuke Inoue, Mamoru Miyawaki, Yoshihiko Fukumoto
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Patent number: 5691794Abstract: A liquid crystal display device comprised of picture element electrodes provided on a first plane of a substrate and an opposed electrode placed opposedly to the picture element electrodes, between which a liquid crystal is carried, characterized in that in a region of the substrate corresponding to the picture element electrodes is formed a concave portion from the second plane opposite the first plane of the substrate, the region being light translucent, and the concave portion having a translucent material enclosed therein.Type: GrantFiled: January 31, 1994Date of Patent: November 25, 1997Assignee: Canon Kabushiki KaishaInventors: Junichi Hoshi, Shigetoshi Sugawa, Shunsuke Inoue, Osamu Hamamoto, Yoshihiko Fukumoto, Yutaka Genchi, Masaru Kamio, Mamoru Miyawaki