Patents by Inventor Yoshihiko Yagi

Yoshihiko Yagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040209283
    Abstract: The invention provides a method for detecting RNA polymerase activity in a continuous-read manner. Specifically, the invention provides a method for detecting the de novo polymerase activity of the Hepatitis C virus (HCV) polymerase, NS5B, in a continuous-read manner. The invention also provides a method of screening for modulators of RNA polymerase activity. More specifically, the invention provides a method of screening for modulators of HCV NS5B activity.
    Type: Application
    Filed: November 13, 2003
    Publication date: October 21, 2004
    Applicant: Pfizer Inc.
    Inventors: Yoshihiko Yagi, Michael P. Sheets, Peter A. Wells, John A. Shelly, Roger A. Poorman, Dennis E. Epps, Aric G. Morgan
  • Patent number: 6787922
    Abstract: A strengthening land is formed on a semiconductor chip-mounting board corresponding to a non-operating electrode on a semiconductor chip. The strengthening land and the non-operating electrode are bonded with each other, thereby improving a bonding strength between the semiconductor chip and the semiconductor chip-mounting board.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: September 7, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Otani, Yoshihiko Yagi, Kenichi Yamamoto
  • Publication number: 20040104469
    Abstract: To provide a card-type recording medium which is capable of increasing memory capacity and excellent in rigidity and shock resistance, and to provide a method for manufacturing the same. A card-type recording medium comprising a memory module 221, 222, 270 which is so constituted that a plurality of memory chips 15 are mounted on a memory board 21, 22, 70, 63, 65 is mounted on one surface of a base board 10, and an IC chip 13, 14, 60 for controlling operation of the plurality of memory chips is mounted on the other surface of the base board, with all housed in a package 30, 31.
    Type: Application
    Filed: April 1, 2003
    Publication date: June 3, 2004
    Inventors: Yoshihiko Yagi, Kazuhiro Uji, Michiro Yoshino, Kenichi Yamamoto
  • Patent number: 6651320
    Abstract: The present invention provides a method for mounting a semiconductor element to a circuit board and a semiconductor device whereby connection reliability and connection strength in bonding of the semiconductor element and circuit board are enhanced and a connection resistance value is stabilized low. An insulating adhesive is applied to an opposite face of a circuit board. The circuit board is then connected with a semiconductor element by a conductive adhesive and the insulating adhesive which are interposed between an electrode on the circuit board and the projecting electrode and set in the same process. The circuit board and semiconductor element are connected by the insulating adhesive in addition to the conductive adhesive, so that connection reliability and connection strength are high and a connection resistance value is stabilized low.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: November 25, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiko Yagi, Hiroyuki Otani
  • Publication number: 20030138993
    Abstract: A method for manufacturing a semiconductor device whereby semiconductor elements like semiconductor bare chips are mounted with high productivity on both surfaces of a circuit board while preventing the board from warping, and an apparatus for manufacturing a semiconductor device for faithfully embodying the manufacturing method. Semiconductor elements temporarily fixed on both surfaces of a circuit board are heated while being pressurized in directions to be each pressed against the board, whereby adhesive on both surfaces of the board is thermally set simultaneously and bumps on each semiconductor elements are press-bonded to their opposing board electrodes on the board to be electrically connected. Ultraviolet rays are irradiated to a circumference of mixed curing adhesive applied to at least one surface of the circuit board to form an ultraviolet curing part only on the circumference of the adhesive, thereby increasing strength for temporarily fixing the semiconductor elements to the circuit board.
    Type: Application
    Filed: December 26, 2002
    Publication date: July 24, 2003
    Applicant: Matsushita Elec Ind. Co., Ltd.
    Inventors: Koujiro Nakamura, Yoshihiko Yagi, Michiro Yoshino, Kazuto Nishida
  • Publication number: 20030116863
    Abstract: A strengthening land is formed on a semiconductor chip-mounting board correspondingly to a non-operating electrode on a semiconductor chip. The strengthening land and the non-operating electrode are bonded with each other, thereby to improve a bonding strength between the semiconductor chip and the semiconductor chip-mounting board.
    Type: Application
    Filed: February 11, 2003
    Publication date: June 26, 2003
    Inventors: Hiroyuki Otani, Yoshihiko Yagi, Kenichi Yamamoto
  • Patent number: 6566165
    Abstract: A strengthening land is formed on a semiconductor chip-mounting board corresponding to a non-operating electrode on a semiconductor chip. The strengthening land and the non-operating electrode are bonded with each other, thereby improving a bonding strength between the semiconductor chip and the semiconductor chip-mounting board.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: May 20, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Otani, Yoshihiko Yagi, Kenichi Yamamoto
  • Publication number: 20010005054
    Abstract: A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
    Type: Application
    Filed: January 25, 2001
    Publication date: June 28, 2001
    Inventors: Kazushi Higashi, Norihito Tsukahara, Takahiro Yonezawa, Yoshihiko Yagi, Yoshifumi Kitayama, Hiroyuki Otani
  • Patent number: 6207549
    Abstract: A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: March 27, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazushi Higashi, Norihito Tsukahara, Takahiro Yonezawa, Yoshihiko Yagi, Yoshifumi Kitayama, Hiroyuki Otani
  • Patent number: 6061248
    Abstract: A strengthening land is formed on a semiconductor chip-mounting board corresponding to a non-operating electrode on a semiconductor chip. The strengthening land and the non-operating electrode are bonded with each other, thereby to improving a bonding strength between the semiconductor chip and the semiconductor chip-mounting board.
    Type: Grant
    Filed: July 18, 1997
    Date of Patent: May 9, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyuki Otani, Yoshihiko Yagi, Kenichi Yamamoto
  • Patent number: 5686353
    Abstract: An electrode terminal (5) provided on a surface of a semiconductor chip (4) has a square shape in plane view. Further, the projecting apex portion (8a) of a bump (8) provided on the electrode terminal (5) orients to a corner portion (5a) of the electrode terminal (5). Hereupon, a gold ball (2a) formed by melting the lower end portion of a gold wire (2) supplied through a capillary (1) is joined to the electrode terminal (5), and then the capillary (1) is moved in the direction of a diagonal line of the square electrode (5). Thus, the main portion of the gold wire (2) is separated from the gold ball (2a) so that the bump (8) is formed.
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: November 11, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiko Yagi, Kazushi Higashi, Norihito Tsukahara, Koichi Kumagai, Takahiro Yonezawa