Patents by Inventor Yoshihiro Kawamura

Yoshihiro Kawamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10715678
    Abstract: Provided is a mobile terminal that communicates with a server that performs call control between an intercom disposed in a lobby of an apartment building and an indoor monitor. The server stores event information transmitted from the intercom, the indoor monitor, or a terminal apparatus connected to the server. The mobile terminal includes: a receiver that receives the event information from the server; and a display section that displays the event information in chronological order from an upper side to a lower side of a display apparatus and that scroll displays the event information.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: July 14, 2020
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Tsuyoshi Kawamura, Yoshihiro Shirakawa
  • Publication number: 20200191881
    Abstract: A ground fault detection device comprising a capacitor which serves as a flying capacitor, a switch group which switches between a V0-charging path, a Vcn-charging path, a Vcp-charging path and a charging voltage measurement path for the capacitor, and a controller which controls the switch group and calculates an insulation resistance based on V0, Vcn and Vcp, wherein V0 is a measured value on the V0-charging path, Vcn is a measured value on the Vcn-charging path, and Vcp is a measured value on the Vcp charging path, wherein, if Vcn can be considered as zero, the controller switches to the Vcp-charging path and performs measurement while keeping a charged state of the capacitor, wherein Vcp obtained after discharging the capacitor is subtracted from a measured value obtained from the measurement in order to calculate Vcn.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 18, 2020
    Applicant: Yazaki Corporation
    Inventor: Yoshihiro KAWAMURA
  • Patent number: 10664334
    Abstract: A robot, failure diagnosis system, failure diagnosis method, and recording medium that enable easy diagnosis of a failure of a robot are provided. In a robot 100, a failure diagnosis unit 150 diagnoses a failure of the robot 100, based on a spontaneous self motion made by the robot 100 independently of a predetermined target without interaction with the predetermined target.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: May 26, 2020
    Assignee: CASIO COMPUTER CO., LTD.
    Inventors: Toshihiko Otsuka, Hiroki Atsumi, Takahiro Tomida, Yoshihiro Kawamura
  • Publication number: 20200154016
    Abstract: A flexible wiring circuit board includes a first insulating layer, a wire disposed at one side in a thickness direction of the first insulating layer, a second insulating layer disposed at one side in the thickness direction of the wire, a shield layer disposed at one side in the thickness direction of the second insulating layer, and a third insulating layer disposed at one side in the thickness direction of the shield layer. The shield layer includes an electrically conductive layer and two barrier layers sandwiching the electrically conductive layer therebetween in the thickness direction. The electrically conductive layer is selected from a metal belonging to a group 11, and the fourth period and the fifth period in the periodic table, and the barrier layer is selected from a metal belonging to groups 4 to 10, and the fourth to the sixth periods in the periodic table.
    Type: Application
    Filed: April 25, 2018
    Publication date: May 14, 2020
    Applicant: NITTO DENKO CORPORATION
    Inventors: Hayato TAKAKURA, Yoshihiro KAWAMURA, Shuichi WAKAKI, Shusaku SHIBATA
  • Patent number: 10613156
    Abstract: A ground fault detection apparatus connected to an ungrounded battery supplying power via a step-up circuit to a load and calculating insulation resistance of a system provided with the battery to detect a ground fault includes a capacitor, a set of switches switching among a V0 measurement path, a Vcn measurement path, and a Vcp measurement path, a bypass resistor connected in parallel with the negative-electrode-side insulation resistance via a normally open switch, and a control unit configured to, when the insulation resistance is to be calculated based on a charge voltage measurement value of the capacitor in each of the measurement paths, in a case in which the charge voltage measurement value of the capacitor in the Vcn measurement path is regarded as 0, switch the normally open switch to a closed state and measure the charge voltage of the capacitor in the Vcn measurement path.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: April 7, 2020
    Assignee: YAZAKI CORPORATION
    Inventor: Yoshihiro Kawamura
  • Patent number: 10611243
    Abstract: A ground fault detection apparatus includes a control unit measuring fully charged voltage of a capacitor, a first switch and a first resistor connecting a positive electrode side of a battery to a positive-electrode-side end of the capacitor, a second switch and a second resistor connecting a negative electrode side of the battery to a negative-electrode-side end of the capacitor, a third switch connecting the positive-electrode-side end to ground, a fourth switch connecting the negative-electrode-side end ground, a positive-electrode-side termination resistor connecting the positive electrode side of the battery to the ground, and a negative-electrode-side termination resistor connecting the negative electrode side to ground. The control unit compares charge voltage of the capacitor measured while the first and fourth switches are turned on with charge voltage of the capacitor measured while the second and third switches are turned on.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: April 7, 2020
    Assignee: YAZAKI CORPORATION
    Inventor: Yoshihiro Kawamura
  • Publication number: 20200105656
    Abstract: An imaging element mounting board for mounting an imaging element has a wire region including a first insulating layer, a metal wire disposed at one side in a thickness direction of the first insulating layer, and a second insulating layer disposed at one side in the thickness direction of the metal wire. An equivalent elastic modulus of the wire region is 5 GPa or more and 55 GPa or less.
    Type: Application
    Filed: April 4, 2018
    Publication date: April 2, 2020
    Applicant: NITTO DENKO CORPORATION
    Inventors: Shusaku SHIBATA, Yoshihiro KAWAMURA, Hayato TAKAKURA, Takahiro TAKANO, Shuichi WAKAKI
  • Publication number: 20200077520
    Abstract: A mounted board includes a base insulating layer, a conductive pattern, and a cover insulating layer sequentially toward one side in a thickness direction. The entire lower surface of the base insulating layer is exposed downwardly. A total thickness of the base insulating layer and the cover insulating layer is 16 ?m or less. The base insulating layer contains an insulating material having a hygroscopic expansion coefficient of 15×10?6/% RH or less.
    Type: Application
    Filed: April 25, 2018
    Publication date: March 5, 2020
    Applicant: NITTO DENKO CORPORATION
    Inventors: Shusaku SHIBATA, Hayato TAKAKURA, Yoshihiro KAWAMURA, Shuichi WAKAKI
  • Publication number: 20200075474
    Abstract: A wiring circuit board includes a first insulating layer, a terminal, a second insulating layer disposed at one side in a thickness direction of the terminal, and a wire continuous to the terminal in a direction crossing the thickness direction. The first insulating layer has an opening portion passing through the first insulating layer in the thickness direction and having the opening cross-sectional area increasing as being closer to one side in the thickness direction. The terminal has a peripheral end portion and a solid portion. The peripheral end portion contacts with an inner side surface of the first insulating layer. The inner side surface forms the opening portion. The solid portion integrally disposed with the peripheral end portion at the inner side of the peripheral end portion. The peripheral end portion and the solid portion fill the entire opening portion.
    Type: Application
    Filed: April 23, 2018
    Publication date: March 5, 2020
    Applicant: NITTO DENKO CORPORATION
    Inventors: Hayato TAKAKURA, Shuichi WAKAKI, Shusaku SHIBATA, Yoshihiro KAWAMURA, Masaki ITO
  • Publication number: 20200064388
    Abstract: A ground fault detection apparatus is configured to be connected to an ungrounded battery for supplying power to a load via a step-up circuit and to detect ground fault by calculating an insulation resistance of a system provided with the battery, and includes a capacitor that operates as a flying capacitor, a set of switches that switch between a first voltage measurement path including the battery and the capacitor, a second voltage measurement path including the battery, the capacitor and a negative-electrode-side insulation resistor as an insulation resistor between a negative-electrode side of the battery and a ground, a third voltage measurement path including the battery, the capacitor and a positive-electrode-side insulation resistor as an insulation resistor between a positive-electrode side of the battery and the ground, and a capacitor charge voltage measurement path, and a pair of Form C contact relays that can reverse connection direction of the capacitor.
    Type: Application
    Filed: July 18, 2019
    Publication date: February 27, 2020
    Applicant: Yazaki Corporation
    Inventor: Yoshihiro Kawamura
  • Patent number: 10563454
    Abstract: A heat-ray-blocking fluororesin film includes a heat-ray-blocking metal oxide and a hydrotalcite-type compound represented by Chemical Formula [1], wherein the content of the hydrotalcite-based compound is 0.03 to 1.0 wt %. The heat-ray-blocking fluororesin can exhibit excellent heat-ray-blocking performance while keeping the properties inherent in fluororesin films such as mechanical properties, transparency and long-term weatherability and is transparent and can be used out of doors for a long period of time, wherein Mg2+1?a.Al3+a(OH?)2.ANn?a/n.cH2O where 0.2?a?0.35 and 0?c?1; ANn? indicates n-valent anion.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: February 18, 2020
    Assignees: Toray Advanced Film Co., Ltd., Toyo Ink SC Holdings Co., Ltd., Toyocolor Co., Ltd.
    Inventors: Kazuyuki Imaizumi, Yukio Noguchi, Atsushi Kimoto, Shinichi Tamura, Yoshihiro Kaneko, Takashi Horiguchi, Masayasu Kawamura
  • Publication number: 20200048455
    Abstract: Provided are a resin composition superior in moldability, and capable of yielding a cured product exhibiting a low elastic modulus even at a high temperature and no decrease in glass-transition temperature and having a favorable reflow resistance and heat resistance; and a semiconductor device encapsulated by such cured product. The resin composition is a heat-curable resin composition for semiconductor encapsulation, and contains: (A) an epoxy resin being solid at 25° C.; (B) an organopolysiloxane having, in one molecule, at least one cyclic imide group and at least one siloxane bond; (C) an inorganic filler; and (D) an anionic curing accelerator.
    Type: Application
    Filed: July 26, 2019
    Publication date: February 13, 2020
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Yoshihiro TSUTSUMI, Naoyuki KUSHIHARA, Yuki KUDO, Norifumi KAWAMURA, Yoshihira HAMAMOTO
  • Publication number: 20200048464
    Abstract: Provided are a resin composition capable of yielding a cured product exhibiting a superior heat resistance over a long period of time, and a superior reflow resistance due to a low water absorption rate even at a high temperature; and a semiconductor device encapsulated by such cured product. The resin composition is a heat-curable resin composition containing: (A) an organopolysiloxane having, in one molecule, at least one cyclic imide group and at least one siloxane bond; (B) an inorganic filler; and (C) a radical polymerization initiator. The semiconductor device is encapsulated by the cured product of such heat-curable resin composition.
    Type: Application
    Filed: July 26, 2019
    Publication date: February 13, 2020
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Yoshihiro TSUTSUMI, Naoyuki KUSHIHARA, Norifumi KAWAMURA, Yoshihira HAMAMOTO, Yuki KUDO
  • Publication number: 20200048454
    Abstract: Provided are a heat-curable resin composition for semiconductor encapsulation that is capable of yielding a cured product superior in tracking resistance and dielectric property, and has a favorable continuous moldability; and a semiconductor device encapsulated by a cured product of such resin composition. The heat-curable resin composition for semiconductor encapsulation contains: (A) an epoxy resin other than a silicone-modified epoxy resin, being solid at 25° C.; (B) a silicone-modified epoxy resin; (C) a cyclic imide compound having, in one molecule, at least one dimer acid backbone, at least one linear alkylene group having not less than 6 carbon atoms, at least one alkyl group having not less than 6 carbon atoms, and at least two cyclic imide groups; (D) an organic filler; and (E) an anionic curing accelerator.
    Type: Application
    Filed: July 3, 2019
    Publication date: February 13, 2020
    Applicant: Shin-Etsu Chemical Co., Ltd.
    Inventors: Yoshihiro TSUTSUMI, Naoyuki KUSHIHARA, Norifumi KAWAMURA, Yuki KUDO
  • Publication number: 20200018060
    Abstract: A booth includes a replaceable side wall that surrounds an internal space to be used by a user, and the side wall is provided with at least one entrance/exit door.
    Type: Application
    Filed: January 24, 2019
    Publication date: January 16, 2020
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Shu WATANABE, Akihide KAWAMURA, Kunichi YAMASHITA, Akira TAKAHASHI, Yoshihiro SHIBANAI
  • Publication number: 20190392762
    Abstract: A display device comprising: a first substrate; and a first TFT array and a second TFT array that are formed on the first substrate, wherein the first TFT array includes: a plurality of first gate lines extending in a first direction; and a plurality of first source lines extending in a second direction intersecting the first direction, the second TFT array includes: a plurality of second gate lines extending in one of the first direction and the second direction; and a plurality of second source lines extending in the other of the first direction and the second direction, and the first TFT array and the second TFT array are electrically isolated from each other, and disposed adjacent to each other in the first direction.
    Type: Application
    Filed: June 17, 2019
    Publication date: December 26, 2019
    Inventors: Tetsuya KAWAMURA, Yoshihiro IMAJO
  • Patent number: 10506724
    Abstract: An electronic circuit board includes a plurality of hard rigid board portions each of which has an insulating insulator and a conductive circuit pattern and electrically connects a mounted electronic component to the circuit pattern; and at least one soft flexible board portion which has an insulating insulator, has a conductive circuit pattern electrically connected to each of the circuit patterns of at least two rigid board portions among the plurality of rigid board portions, and is integrated with the rigid board portions which are electrically connected to the circuit pattern of the flexible board portion. The insulator of the flexible board portion is provided with a through-hole at a place where the circuit pattern of the flexible board portion is not stacked.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: December 10, 2019
    Assignee: YAZAKI CORPORATION
    Inventors: Masayuki Naohara, Tomohiro Sugiura, Yoshihiro Kawamura
  • Publication number: 20190310300
    Abstract: A ground fault detection apparatus includes a control unit, a detection capacitor, a positive-electrode-side first resistor connected to positive-electrode side of a high-voltage battery, a negative-electrode-side first resistor connected to negative-electrode side of the high-voltage battery, a positive-electrode-side second resistor where one end is grounded and voltage of another end is measured by the control unit, a negative-electrode-side second resistor having one end grounded, a positive-electrode-side C contact switch that switches connection destination of one end of the detection capacitor between a path including the positive-electrode-side first resistor and a path including the positive-electrode-side second resistor based on instruction from the control unit, a negative-electrode-side C contact switch that switches connection destination of another end of the detection capacitor between a path including the negative-electrode-side first resistor and a path including the negative-electrode-side
    Type: Application
    Filed: March 6, 2019
    Publication date: October 10, 2019
    Applicant: Yazaki Corporation
    Inventor: Yoshihiro KAWAMURA
  • Publication number: 20190308505
    Abstract: A ground fault detection apparatus includes a control unit, a detection capacitor, a positive-electrode-side first resistor connected to positive-electrode side of a high-voltage battery, a negative-electrode-side first resistor connected to negative-electrode side, a positive-electrode-side second resistor having one end grounded and another end, voltage of which being measured by the control unit, a negative-electrode-side second resistor having one end grounded, a positive-electrode-side C contact switch as a twin relay that alternatively switches connection destination of one end of the detection capacitor between a path including the positive-electrode-side first resistor and a path including the positive-electrode-side second resistor based on instruction from the control unit, and a negative-electrode-side C contact switch as a twin relay that alternatively switches connection destination of another end of the detection capacitor between a path including the negative-electrode-side first resistor and a
    Type: Application
    Filed: March 7, 2019
    Publication date: October 10, 2019
    Applicant: Yazaki Corporation
    Inventor: Yoshihiro KAWAMURA
  • Patent number: 10416223
    Abstract: Provided is a ground fault detection device including a detection capacitor, a positive electrode power supply side resistor, a negative electrode power supply side resistor, a positive electrode ground side resistor, a negative electrode ground side resistor, a positive electrode side twin relay selectively switching a connection point of one end of the detection capacitor; a negative electrode side twin relay selectively switching a connection point of the another end of the detection capacitor, and a controller controlling switching of the positive electrode side twin relay and the negative electrode side twin relay, and calculating an insulation resistance of the system provided with the high-voltage battery based on a charging voltage of the detection capacitor, and determines there is a possibility that a sticking fault has occurred.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: September 17, 2019
    Assignee: Yazaki Corporation
    Inventor: Yoshihiro Kawamura