Patents by Inventor Yoshihiro Kondo

Yoshihiro Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250149355
    Abstract: A substrate processing apparatus includes a substrate cleaning device; a chip cleaning device; a chip bonding device; a transfer section; a first substrate transfer arm; and a first frame transfer arm. The substrate cleaning device is configured to clean a substrate. The chip cleaning device is configured to clean chips in a state where the chips are attached to a frame via a tape. The chip bonding device is configured to bond the chips to the substrate. The first substrate transfer arm is configured to hold and transfer the substrate. The first frame transfer arm is configured to hold and transfer the frame together with the chips. The first substrate transfer arm transfers the substrate from the substrate cleaning device to the chip bonding device, and the first frame transfer arm transfers the chips together with the frame from the chip cleaning device to the chip bonding device.
    Type: Application
    Filed: January 27, 2022
    Publication date: May 8, 2025
    Inventors: Susumu HAYAKAWA, Junichi KITANO, Kenji SEKIGUCHI, Syuhei YONEZAWA, Yoshihiro KONDO
  • Patent number: 12280763
    Abstract: A power generation system includes an internal combustion engine, an electrical generator, and a power transmission mechanism. A method for controlling the system includes executing rotation speed control of driving the electrical generator by using electric power supplied from a battery, and matching a rotation speed of the electrical generator with a target rotation speed at the time of starting the power generation system. Output possible electric power of the battery and rotation speed of the electrical generator are acquired. A filtering process of reducing a component of a resonance frequency band of a spring-mass system including the engine, generator, and power transmission mechanism is executed on the rotation speed of the electrical generator. An upper limit torque of the electrical generator is calculated based on the filtered rotation speed and the output possible electric power. The rotation speed control is executed under a limitation of the upper limit torque.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: April 22, 2025
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Yoshihiro Terai, Tsukasa Ichiba, Kensaku Endo, Yoshihiro Kondo
  • Publication number: 20250115230
    Abstract: A power generation system includes an internal combustion engine, an electrical generator, and a power transmission mechanism. A method for controlling the system includes executing rotation speed control of driving the electrical generator by using electric power supplied from a battery, and matching a rotation speed of the electrical generator with a target rotation speed at the time of starting the power generation system. Output possible electric power of the battery and rotation speed of the electrical generator are acquired. A filtering process of reducing a component of a resonance frequency band of a spring-mass system including the engine, generator, and power transmission mechanism is executed on the rotation speed of the electrical generator. An upper limit torque of the electrical generator is calculated based on the filtered rotation speed and the output possible electric power. The rotation speed control is executed under a limitation of the upper limit torque.
    Type: Application
    Filed: April 1, 2022
    Publication date: April 10, 2025
    Inventors: Yoshihiro Terai, Tsukasa Ichiba Ichiba, Kensaku Endo, Yoshihiro Kondo
  • Publication number: 20250079166
    Abstract: Semiconductor devices and corresponding methods of manufacture are disclosed. The method includes forming a first device structure on a first substrate, a first laser liftoff layer on the first device structure, a protective layer on the first laser liftoff layer, and a second substrate on the protective layer. The method includes de-attaching, through applying radiation on the first laser liftoff layer, the protective layer from the first laser liftoff layer, with a first surface of the second substrate remaining in contact with a second surface of the protective layer. The protective layer is transparent to the radiation.
    Type: Application
    Filed: July 26, 2024
    Publication date: March 6, 2025
    Inventors: Panupong JAIPAN, Matthew BARON, Kandabara TAPILY, Ilseok SON, Arkalgud SITARAM, Yohei YAMASHITA, Yasutaka MIZOMOTO, Yoshihiro TSUTSUMI, Yoshihiro KONDO
  • Publication number: 20250054904
    Abstract: A method of processing a substrate that includes: forming an infrared (IR) absorbing separation layer over a first substrate; forming one or more layers over the IR absorbing separation layer; bonding the first substrate and a second substrate at a bonding interface between the one or more layers and the second substrate using a direct bonding technique to form a wafer stack; exposing the wafer stack to an infrared (IR) light irradiation to separate the first substrate from the one or more layers.
    Type: Application
    Filed: August 8, 2024
    Publication date: February 13, 2025
    Inventors: Panupong JAIPAN, Kevin RYAN, Ilseok SON, Arkalgud SITARAM, Yohei YAMASHITA, Yasutaka MIZOMOTO, Yoshihiro TSUTSUMI, Yoshihiro KONDO
  • Publication number: 20250022498
    Abstract: A first circuit outputs first information indicating presence/absence of a magnetic wall between two adjacent portions among portions of a magnetic body, and second information based on the combination of magnetization states of the two portions. A first storage circuit stores first bits corresponding to the portions. A most significant bit of the first bits has a value independent of a magnetization state of a corresponding one of the portions, and the first bits have a value based on the first information. A second storage circuit stores the second information. The second circuit causes the first storage circuit to output the first bits when a value of a least significant bit of the first bits matches a value of the second information, and otherwise third bits having inverse values of the first bits.
    Type: Application
    Filed: July 5, 2024
    Publication date: January 16, 2025
    Applicant: Kioxia Corporation
    Inventors: Shogo MUTO, Masanobu SHIRAKAWA, Hideki YAMADA, Ryo YAMAKI, Yoshihiro UEDA, Tsuyoshi KONDO
  • Patent number: 11693319
    Abstract: A method of processing a substrate, includes emitting light including vacuum ultraviolet light to a front surface of the substrate, which has a resist film formed thereon from a resist material for EUV lithography, before an exposure process in an interior of a processing container.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: July 4, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Keiichi Tanaka, Kosuke Yoshihara, Yoshihiro Kondo, Makoto Muramatsu, Teruhiko Kodama
  • Patent number: 11463004
    Abstract: A boost converter control method in one aspect of the present invention is the control method of the boost converter that boosts a voltage input from a power supply and supplies a boosted voltage to a load-side. The control method of the boost converter is securing an output electric power required according to an operation point of a motor connected to the load-side, calculating a lower limit voltage value at which the output voltage of the boost converter does not oscillate, setting a target output voltage of the boost converter to a value equal to or higher than the lower limit voltage, and controlling the boost converter so as to output a voltage according to the target output voltage.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: October 4, 2022
    Assignee: NISSAN MOTOR CO., LTD.
    Inventors: Kenichi Mori, Toshio Ouchi, Yoshihiro Kondo
  • Patent number: 11394333
    Abstract: A control method for a motor system, the motor system having a battery; a boost converter configured to increase DC voltage supplied by the battery; an inverter connected to the boost converter and configured to execute a conversion between DC power and AC power; and a motor generator connected to the inverter. The control method comprising: a limiting power determination step of determining a limiting power in response to an operating point of the motor generator such that an oscillation of a terminal voltage of the boost converter at a side of the inverter is suppressed; and a controlling step of controlling the operating point of the motor generator such that a passing power of the boost converter does not exceed the limiting power.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: July 19, 2022
    Assignee: NISSAN MOTOR CO., LTD.
    Inventors: Toshio Ouchi, Kenichi Mori, Yoshihiro Kondo
  • Publication number: 20220113628
    Abstract: A method of processing a substrate, includes emitting light including vacuum ultraviolet light to a front surface of the substrate, which has a resist film formed thereon from a resist material for EUV lithography, before an exposure process in an interior of a processing container.
    Type: Application
    Filed: October 8, 2021
    Publication date: April 14, 2022
    Inventors: Keiichi TANAKA, Kosuke YOSHIHARA, Yoshihiro KONDO, Makoto MURAMATSU, Teruhiko KODAMA
  • Publication number: 20210234490
    Abstract: A control method for a motor system, the motor system having a battery; a boost converter configured to increase DC voltage supplied by the battery; an inverter connected to the boost converter and configured to execute a conversion between DC power and AC power; and a motor generator connected to the inverter. The control method comprising: a limiting power determination step of determining a limiting power in response to an operating point of the motor generator such that an oscillation of a terminal voltage of the boost converter at a side of the inverter is suppressed; and a controlling step of controlling the operating point of the motor generator such that a passing power of the boost converter does not exceed the limiting power.
    Type: Application
    Filed: May 10, 2018
    Publication date: July 29, 2021
    Applicant: Nissan Motor Co., Ltd.
    Inventors: Toshio OUCHI, Kenichi MORI, Yoshihiro KONDO
  • Publication number: 20210036614
    Abstract: A boost converter control method in one aspect of the present invention is the control method of the boost converter that boosts a voltage input from a power supply and supplies a boosted voltage to a load-side. The control method of the boost converter is securing an output electric power required according to an operation point of a motor connected to the load-side, calculating a lower limit voltage value at which the output voltage of the boost converter does not oscillate, setting a target output voltage of the boost converter to a value equal to or higher than the lower limit voltage, and controlling the boost converter so as to output a voltage according to the target output voltage.
    Type: Application
    Filed: April 10, 2018
    Publication date: February 4, 2021
    Applicant: NISSAN MOTOR CO., LTD.
    Inventors: Kenichi MORI, Toshio OUCHI, Yoshihiro KONDO
  • Patent number: 10520831
    Abstract: A technique enabling a stable resist pattern forming process, when substrate processing apparatuses that perform a resist coating process separately from a developing process. A wafer having been heated after a resist coating process in a first substrate processing apparatus is also heated before an exposure process in a second substrate processing apparatus. Thus, even when amine in an atmosphere adheres to the wafer while it is being transported from the first substrate processing apparatus to the second substrate processing apparatus, the amine scatters by the heating process. At least one of a heating time and a heating temperature is adjusted based on a substrate rest time which includes a period of time between a time point at which a FOUP 10 is unloaded from the first substrate processing apparatus and a time point at which the FOUP 10 is loaded into the second substrate processing apparatus.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: December 31, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Masashi Enomoto, Yoshihiro Kondo
  • Publication number: 20180076066
    Abstract: A technique enabling a stable resist pattern forming process, when substrate processing apparatuses that perform a resist coating process separately from a developing process. A wafer having been heated after a resist coating process in a first substrate processing apparatus is also heated before an exposure process in a second substrate processing apparatus. Thus, even when amine in an atmosphere adheres to the wafer while it is being transported from the first substrate processing apparatus to the second substrate processing apparatus, the amine scatters by the heating process. At least one of a heating time and a heating temperature is adjusted based on a substrate rest time which includes a period of time between a time point at which a FOUP 10 is unloaded from the first substrate processing apparatus and a time point at which the FOUP 10 is loaded into the second substrate processing apparatus.
    Type: Application
    Filed: March 28, 2016
    Publication date: March 15, 2018
    Applicant: Tokyo Electron Limited
    Inventors: Masashi ENOMOTO, Yoshihiro KONDO
  • Patent number: 9858181
    Abstract: A memory module having different types of memory mounted together on a double-sided substrate has a first edge and opposite second edge and includes a plurality of memory controllers, a plurality of flash memories, and a plurality of second memories having a higher signal transmission rate than the flash memories. A socket terminal for connecting the double-sided substrate to a motherboard is formed on the front surface and the back surface of the double-sided substrate on the first edge side; the memory controllers are disposed on the second edge side; the second memories are disposed on the second edge side at positions opposite the positions at which the memory controllers are disposed; and the flash memories are disposed on at least the back surface thereof at positions that are closer to the first edge than are the positions at which the memory controllers and the second memories are disposed.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: January 2, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Uematsu, Satoshi Muraoka, Hiroshi Kakita, Akio Idei, Yusuke Fukumura, Satoru Watanabe, Takayuki Ono, Taishi Sumikura, Yuichi Fukuda, Takashi Miyagawa, Michinori Naito, Hideki Osaka, Masabumi Shibata, Hitoshi Ueno, Kazunori Nakajima, Yoshihiro Kondo
  • Patent number: 9751722
    Abstract: A delivery reel for an elongated sheet, having a disk-shaped flange member on which a sheet roll is positioned; an auxiliary core member of generally cylindrical shape split in the circumferential direction to enable expansion in diameter, and inserted into the inside diameter part of the sheet roll; a main core member fitted into the auxiliary core member which has been inserted into the sheet roll; and a stopper member attached to the circumferential edge of the flange member, and jutting toward the outside in the radial direction. The main core member has a plate spring. In a state in which the auxiliary core member has been inserted into the inside diameter part of the sheet roll, and the main core member has been fitted into the auxiliary core member, the plate spring presses the inside peripheral surface of the auxiliary core member toward the outside in the radial direction.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: September 5, 2017
    Assignee: FUJI SEAL INTERNATIONAL, INC.
    Inventors: Yasuyuki Kawauchi, Yoshihiro Kondo
  • Patent number: 9348378
    Abstract: The computer having a module board with semiconductor elements mounted on both sides thereof, a motherboard on which a plurality of units of the module board are mounted, and a rack cabinet on which a plurality of units of the motherboard are mounted includes a thermo-siphon that is thermally connected to the semiconductor elements mounted on one side of the module board, a metal plate that is thermally connected to the semiconductor elements mounted on one side of the module board, a thermally-conductive member that transfers the heat of the metal plate to the thermo-siphon in a situation where the heat of the semiconductor elements mounted on one side of the module board is transferred to the metal plate, and a pressing member that presses the thermo-siphon and the metal plate against the semiconductor elements mounted on the module board.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: May 24, 2016
    Assignee: HITACHI, LTD.
    Inventors: Yoshihiro Kondo, Takayuki Fujimoto, Fumio Takeda, Takeshi Kato
  • Publication number: 20160092351
    Abstract: A memory module having different types of memory mounted together on a double-sided substrate has a first edge and opposite second edge and includes a plurality of memory controllers, a plurality of flash memories, and a plurality of second memories having a higher signal transmission rate than the flash memories. A socket terminal for connecting the double-sided substrate to a motherboard is formed on the front surface and the back surface of the double-sided substrate on the first edge side; the memory controllers are disposed on the second edge side; the second memories are disposed on the second edge side at positions opposite the positions at which the memory controllers are disposed; and the flash memories are disposed on at least the back surface thereof at positions that are closer to the first edge than are the positions at which the memory controllers and the second memories are disposed.
    Type: Application
    Filed: June 20, 2013
    Publication date: March 31, 2016
    Inventors: Yutaka UEMATSU, Satoshi MURAOKA, Hiroshi KAKITA, Akio IDEI, Yusuke FUKUMURA, Satoru WATANABE, Takayuki ONO, Taishi SUMIKURA, Yuichi FUKUDA, Takashi MIYAGAWA, Michinori NAITO, Hideki OSAKA, Masabumi SHIBATA, Hitoshi UENO, Kazunori NAKAJIMA, Yoshihiro KONDO
  • Publication number: 20150085442
    Abstract: The computer having a module board with semiconductor elements mounted on both sides thereof, a motherboard on which a plurality of units of the module board are mounted, and a rack cabinet on which a plurality of units of the motherboard are mounted includes a thermo-siphon that is thermally connected to the semiconductor elements mounted on one side of the module board, a metal plate that is thermally connected to the semiconductor elements mounted on one side of the module board, a thermally-conductive member that transfers the heat of the metal plate to the thermo-siphon in a situation where the heat of the semiconductor elements mounted on one side of the module board is transferred to the metal plate, and a pressing member that presses the thermo-siphon and the metal plate against the semiconductor elements mounted on the module board.
    Type: Application
    Filed: April 19, 2012
    Publication date: March 26, 2015
    Inventors: Yoshihiro Kondo, Takayuki Fujimoto, Fumio Takeda, Takeshi Kato
  • Patent number: 8927906
    Abstract: The disclosed heating device is to perform a heating process on an exposed substrate formed with a resist film before a developing process, the device including a heating part to perform a heating process on the exposed substrate, the heating part including a plurality of two-dimensionally arranged heating elements; a seating part provided at an upper side of the heating part, on which the substrate is disposed; and a control part to correct a setting temperature of the heating part based on temperature correction values, and to control the heating part based on the corrected setting temperature, during the heating process on one substrate by the heating part, wherein the temperature correction values being previously obtained from measured critical dimensions of the resist pattern in another substrate formed with the resist pattern through the heating process by the heating part and then the developing process.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: January 6, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Masahide Tadokoro, Yoshihiro Kondo, Takashi Saito