Patents by Inventor Yoshihiro Nabe

Yoshihiro Nabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11693204
    Abstract: To improve strength of an imaging module with an adjusted optical axis. An imaging device includes an imaging module and a holding unit. The imaging module provided in the imaging device includes an imaging element that images incident light introduced from an upper surface of a housing. The holding unit provided in the imaging device surrounds and holds a side surface of the imaging module, the side surface being adjacent to the upper surface of the housing. The holding unit surrounds and holds the side surface of the imaging module, thereby protecting the imaging module.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: July 4, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Junichi Tokunaga, Yuuji Kishigami, Noboru Kawabata, Yoshihiro Nabe
  • Patent number: 11676977
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: June 13, 2023
    Assignee: SONY GROUP CORPORATION
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Publication number: 20220231061
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: April 4, 2022
    Publication date: July 21, 2022
    Applicant: Sony Group Corporation
    Inventors: Yoshihiro Nabe, Hiroshi ` Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 11315970
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: April 26, 2022
    Assignee: SONY CORPORATION
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Publication number: 20200292775
    Abstract: To improve strength of an imaging module with an adjusted optical axis. An imaging device includes an imaging module and a holding unit. The imaging module provided in the imaging device includes an imaging element that images incident light introduced from an upper surface of a housing. The holding unit provided in the imaging device surrounds and holds a side surface of the imaging module, the side surface being adjacent to the upper surface of the housing. The holding unit surrounds and holds the side surface of the imaging module, thereby protecting the imaging module.
    Type: Application
    Filed: October 25, 2018
    Publication date: September 17, 2020
    Inventors: JUNICHI TOKUNAGA, YUUJI KISHIGAMI, NOBORU KAWABATA, YOSHIHIRO NABE
  • Publication number: 20190043905
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: August 6, 2018
    Publication date: February 7, 2019
    Applicant: Sony Corporation
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 10050074
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: August 14, 2018
    Assignee: Sony Corporation
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Publication number: 20160276385
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: May 27, 2016
    Publication date: September 22, 2016
    Inventors: Yoshihiro Nabe, Hiroshi ` Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 9379155
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: June 28, 2016
    Assignee: Sony Corporation
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Publication number: 20150221690
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: April 17, 2015
    Publication date: August 6, 2015
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 9041179
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: May 26, 2015
    Assignee: SONY CORPORATION
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Publication number: 20140183680
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: March 6, 2014
    Publication date: July 3, 2014
    Applicant: Sony Corporation
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 8564101
    Abstract: A semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has another insulating layer formed in the via hole and a conductive layer formed thereon. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: October 22, 2013
    Assignees: Sony Corporation, Fujikura Ltd.
    Inventors: Yoshimichi Harada, Masami Suzuki, Yoshihiro Nabe, Yuji Takaoka, Tatsuo Suemasu, Hideyuki Wada, Masanobu Saruta
  • Patent number: 8455969
    Abstract: A semiconductor device includes a semiconductor substrate having a first electronic circuit and a second electronic circuit formed on an active surface, a pad electrode formed on the active surface by being connected to the first electronic circuit and/or the second electronic circuit, a first opening formed to some point along a depth of the semiconductor substrate toward the pad electrode from a surface opposite to the active surface of the semiconductor substrate, a second opening formed so as to reach the pad electrode from a bottom surface of the first opening, an insulating layer formed by covering sidewall surfaces of the first opening and the second opening, a conductive layer formed by covering at least an inner wall surface of the insulating layer and a bottom surface of the second opening, a third opening formed to some point along the depth of the semiconductor substrate from the surface opposite to the active surface of the semiconductor substrate, and a heat insulator imbedded in the third openi
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: June 4, 2013
    Assignee: Sony Corporation
    Inventors: Yoshihiro Nabe, Masaki Hatano, Hiroshi Asami, Akihiro Morimoto
  • Publication number: 20120286387
    Abstract: A semiconductor device including a semiconductor substrate having oppositely facing first and second surfaces, the first surface being an active surface and provided with an electronic element thereon, a pad electrode to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening formed to reach the pad electrode from a bottom surface of the first opening and having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Application
    Filed: July 19, 2012
    Publication date: November 15, 2012
    Applicant: SONY CORPORATION
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Patent number: 8273657
    Abstract: A method for manufacturing a semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. Another insulating layer is formed in the via hole, and a conductive layer of the through-hole interconnection is subsequently formed. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: September 25, 2012
    Assignees: Sony Corporation, Fujikura Ltd.
    Inventors: Yoshimichi Harada, Masami Suzuki, Yoshihiro Nabe, Yuji Takaoka, Tatsuo Suemasu, Hideyuki Wada, Masanobu Saruta
  • Patent number: 8252628
    Abstract: A semiconductor device includes a semiconductor substrate having first and second surfaces opposite each other, the first surface being an active surface by provided with an electronic element thereon, a pad electrode formed to be connected to the electronic element in a peripheral portion of the electronic element on the active surface, a first opening extending from the second surface toward the pad electrode so as not to reach the first surface of the semiconductor substrate, a second opening, formed to reach the pad electrode from a bottom surface of the first opening, having a diameter smaller than that of the first opening, an insulating layer formed to cover sidewall surfaces of the first opening and the second opening, and a conductive layer formed, inside of the insulating layer, to cover at least an inner wall surface of the insulating layer and a bottom surface of the second opening.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: August 28, 2012
    Assignee: Sony Corporation
    Inventors: Yoshihiro Nabe, Hiroshi Asami, Yuji Takaoka, Yoshimichi Harada
  • Publication number: 20110136342
    Abstract: A semiconductor apparatus including a semiconductor substrate, an insulating layer, a via hole, and a through-hole interconnection is provided. The insulating layer is formed on the semiconductor substrate. The via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has a conductive layer formed on an insulating layer in the via hole. The surface of the insulating layer formed on the inner surface of the via hole is substantially planarized by filling a recessed portion on a boundary between the semiconductor substrate and the insulating layer formed on the semiconductor substrate.
    Type: Application
    Filed: February 15, 2011
    Publication date: June 9, 2011
    Applicants: SONY CORPORATION, FUJIKURA LTD
    Inventors: Yoshimichi Harada, Masami Suzuki, Yoshihiro Nabe, Yuji Takaoka, Tatsuo Suemasu, Hideyuki Wada, Masanobu Saruta
  • Patent number: 7939360
    Abstract: A semiconductor device which includes a semiconductor chip formed with a light-reception area, a spacer, and a transparent substrate. The spacer is bonded to the semiconductor chip via a first adhesive and surrounding the light-reception area. The transparent substrate is bonded to the spacer via a second adhesive and disposed above the light-reception area. A first projection having a predetermined height is formed on a surface of the spacer which is on a side of the semiconductor chip, and the first projection abuts on the semiconductor chip.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: May 10, 2011
    Assignee: Sony Corporation
    Inventors: Hiroshi Asami, Yoshihiro Nabe, Akihiro Morimoto
  • Patent number: 7851880
    Abstract: A solid-state imaging device includes a semiconductor substrate having a foreside provided with an imaging area and an electrode pad, the imaging area having an array of optical sensors, the electrode pad being disposed around a periphery of the imaging area; a transparent substrate joined to the foreside of the semiconductor substrate with a sealant therebetween; underside wiring that extends through the semiconductor substrate from the electrode pad to an underside of the semiconductor substrate; and a protective film composed of an inorganic insulating material and interposed between the semiconductor substrate and the sealant, the protective film covering at least the electrode pad.
    Type: Grant
    Filed: November 26, 2007
    Date of Patent: December 14, 2010
    Assignee: Sony Corporation
    Inventors: Masami Suzuki, Yoshimichi Harada, Yoshihiro Nabe, Yuji Takaoka, Masaaki Takizawa, Chiaki Sakai