Abstract: A printing apparatus includes a conveying mechanism configured to convey a continuously-fed paper, a print head, a memory, and a controller. The controller obtains printing information including a plurality of pieces of the unit-image data, pitch information, and speed information of a continuously-fed paper. The controller determines a first period of time which is required to print a predetermined number of unit-images on the continuously-fed paper and a second period of time which is required to store the predetermined number of pieces of the unit-image data into the memory. The controller determines, based on the first period of time and the second period of time, a stored-number which is a number of pieces of the unit-image data to be stored into the memory and starts printing the plurality of unit-images when the stored-number of pieces of the unit-image data is stored into the memory.

Abstract: A print device includes a supply unit, a print unit, a conveyer, a tensioner, a drive unit, a processor, a medium detector, and a memory. The tensioner is configured to apply tension to the medium. The memory stores computer-readable instructions that, when executed by the processor, instruct the processor to perform processes including correction processing, which is repeated a plurality of times, of controlling the drive unit and applying the tension to the medium by the tensioner during a back-and-forth conveyance operation of conveying the medium in the return direction after conveying the medium in the conveyance direction, and detection processing of detecting attributes of the medium, based on the detection result output from the medium detector, during one of the back-and-forth conveyance operations, of the plurality of back-and-forth conveyance operations.

Abstract: A printing apparatus includes a conveying mechanism configured to convey a continuously-fed paper, a print head, a memory, and a controller. The controller obtains printing information including a plurality of pieces of the unit-image data, pitch information, and speed information of a continuously-fed paper. The controller determines a first period of time which is required to print a predetermined number of unit-images on the continuously-fed paper and a second period of time which is required to store the predetermined number of pieces of the unit-image data into the memory. The controller determines, based on the first period of time and the second period of time, a stored-number which is a number of pieces of the unit-image data to be stored into the memory and starts printing the plurality of unit-images when the stored-number of pieces of the unit-image data is stored into the memory.

Abstract: A method of producing a phthaloyl dichloride compound, the method including: providing a compound represented by the following formula (1) and a compound represented by the following formula (2); and bringing the compound represented by the following formula (1) and the compound represented by the following formula (2) into reaction, so as to form a compound represented by the following formula (3), in the presence of at least one compound selected from a zirconium compound, a hafnium compound, and zinc oxide; wherein, in formulae, X represents a hydrogen atom, a halogen atom, a nitro group, a methyl group, or a methoxy group; when the X is plural, Xs may be the same or different from each other; n represents an integer of from 0 to 2; R represents a halogen atom, a chlorocarbonyl group, a low carbon number alkyl group, or a halogen-substituted low carbon number alkyl group; when the R is plural, Rs may be the same or different from each other; and m represents an integer of from 0 to 2.

Abstract: A method of producing a phthaloyl dichloride compound, the method including: providing a compound represented by the following formula (1) and a compound represented by the following formula (2); and bringing the compound represented by the following formula (1) and the compound represented by the following formula (2) into reaction, so as to form a compound represented by the following formula (3), in the presence of at least one compound selected from a zirconium compound, a hafnium compound, and zinc oxide; wherein, in formulae, X represents a hydrogen atom, a halogen atom, a nitro group, a methyl group, or a methoxy group; when the X is plural, Xs may be the same or different from each other; n represents an integer of from 0 to 2; R represents a halogen atom, a chlorocarbonyl group, a low carbon number alkyl group, or a halogen-substituted low carbon number alkyl group; when the R is plural, Rs may be the same or different from each other; and m represents an integer of from 0 to 2.

Abstract: A semiconductor device includes a silicon substrate in which active regions of a memory cell are defined, a gate electrode formed on a device isolation insulating film to extend in a first direction, a first insulating film formed on the silicon substrate and the gate electrode, a first plug formed to penetrate the first insulating film, to overlap with the gate electrode and the first active region, and to extend in a second direction perpendicular to the first direction, a second plug penetrating the first insulating film above the second active region, a second insulating film formed on the first insulating film, and an interconnection buried in the second insulating film, and formed to recede from a side surface of the first plug in the second direction and to cover only part of an upper surface of the first plug.

Abstract: A semiconductor device includes a silicon substrate in which active regions of a memory cell are defined, a gate electrode formed on a device isolation insulating film to extend in a first direction, a first insulating film formed on the silicon substrate and the gate electrode, a first plug formed to penetrate the first insulating film, to overlap with the gate electrode and the first active region, and to extend in a second direction perpendicular to the first direction, a second plug penetrating the first insulating film above the second active region, a second insulating film formed on the first insulating film, and an interconnection buried in the second insulating film, and formed to recede from a side surface of the first plug in the second direction and to cover only part of an upper surface of the first plug.

Abstract: A semiconductor device includes a first transistor having a threshold voltage (Vth) adjusted to a first Vth by a first dopant having a first peak of concentration at a first depth; and a second transistor having the same channel-type as that of the first transistor and having a Vth adjusted to a second Vth by a second dopant having a second peak of concentration at a second depth equal to the first depth and higher concentration than the first dopant; wherein the first dopant and the second dopant are dopants comprising the same constituent element.

Abstract: A method of producing a phthaloyl dichloride compound, the method including: providing a compound represented by the following formula (1) and a compound represented by the following formula (2); and bringing the compound represented by the following formula (1) and the compound represented by the following formula (2) into reaction, so as to form a compound represented by the following formula (3), in the presence of at least one compound selected from a zirconium compound, a hafnium compound, and zinc oxide; wherein, in formulae, X represents a hydrogen atom, a halogen atom, a nitro group, a methyl group, or a methoxy group; when the X is plural, Xs may be the same or different from each other; n represents an integer of from 0 to 2; R represents a halogen atom, a chlorocarbonyl group, a low carbon number alkyl group, or a halogen-substituted low carbon number alkyl group; when the R is plural, Rs may be the same or different from each other; and m represents an integer of from 0 to 2.

Abstract: A method of manufacturing a semiconductor device has forming a first mask pattern exposing a region for forming a first transistor and a region for forming a second transistor, performing a first ion implantation using the first mask pattern, performing a second ion implantation using the first mask pattern, removing the first mask pattern and forming a second mask pattern in which the first transistor forming region is covered and the second transistor forming region is opened, and performing a third ion implantation using the second mask pattern.

Abstract: According to mask layout data created for a particular factory facility, transistors constituting a semiconductor device are classified into multiple groups depending on the gate length. Thereafter, the concentration of impurity introduced into a channel layer is set for each group, and thereby the gate length-threshold characteristics of a transistor are controlled. An overlapping area of a gate electrode and an element region of a certain group is extracted from mask layout data. The overlapping area is expanded to determine the shape of a mask used in injecting impurity in a channel layer. The data on the mask shape is then added to the mask layout data.

Abstract: A method of manufacturing a semiconductor device includes forming a first mask pattern exposing a first region for forming a first transistor and a second region for forming a second transistor, performing a first ion implantation for forming well regions using the first mask pattern, performing a second ion implantation for threshold voltage (Vth) adjustment of the first transistor using the first mask pattern, removing the first mask pattern and forming a second mask pattern in which the first region is covered and the second region is opened, performing a third ion implantation for Vth adjustment of the second transistor using the second mask pattern, forming first and second gate insulating films in the first and second regions respectively, and forming first and second gate electrodes in the first and second regions respectively.

Abstract: A semiconductor device includes a silicon substrate in which active regions of a memory cell are defined, a gate electrode formed on a device isolation insulating film to extend in a first direction, a first insulating film formed on the silicon substrate and the gate electrode, a first plug formed to penetrate the first insulating film, to overlap with the gate electrode and the first active region, and to extend in a second direction perpendicular to the first direction, a second plug penetrating the first insulating film above the second active region, a second insulating film formed on the first insulating film, and an interconnection buried in the second insulating film, and formed to recede from a side surface of the first plug in the second direction and to cover only part of an upper surface of the first plug.

Abstract: A semiconductor device includes a plurality of chips comprising a plurality of first moisture-proof rings individually surrounding said plurality of chips, a second moisture-proof ring surrounding the entire plurality of chips, and a wire for connecting said plurality of chips to each other.

Abstract: The semiconductor device comprises a well 58 formed in a semiconductor substrate 10 and having a channel region; a gate electrode 34n formed over the channel region with an insulating film 32 interposed therebetween; source/drain regions 60 formed in the well 58 on both sides of the gate electrode 34n, sandwiching the channel region; and a pocket region 40 formed between the source/drain region and the channel region. The well 58 has a first peak of an impurity concentration at a depth deeper than the pocket region 40 and shallower than the bottom of the source/drain regions 60, and a second peak of the impurity concentration at a depth near the bottom of the source/drain regions 60.

Abstract: In each of a p-channel MOS transistor and an n-channel MOS transistor, a channel direction is set in the <100> direction and a first stressor film accumulating therein a tensile stress is formed in a STI device isolation structure. Further, a second stressor film accumulating therein a tensile stress is formed on a silicon substrate so as to cover the device isolation structure.

Abstract: According to mask layout data created for a particular factory facility, transistors constituting a semiconductor device are classified into multiple groups depending on the gate length. Thereafter, the concentration of impurity introduced into a channel layer is set for each group, and thereby the gate length-threshold characteristics of a transistor are controlled. An overlapping area of a gate electrode and an element region of a certain group is extracted from mask layout data. The overlapping area is expanded to determine the shape of a mask used in injecting impurity in a channel layer. The data on the mask shape is then added to the mask layout data.

Abstract: A method of manufacturing a semiconductor device has forming a first mask pattern exposing a region for forming a first transistor and a region for forming a second transistor, performing a first ion implantation using the first mask pattern, performing a second ion implantation using the first mask pattern, removing the first mask pattern and forming a second mask pattern in which the first transistor forming region is covered and the second transistor forming region is opened, and performing a third ion implantation using the second mask pattern.

Abstract: The semiconductor device comprises a semiconductor substrate 10 with a trench 16a and a trench 16b formed in; a device isolation film 32a buried in the trench 16a and including a liner film including a silicon nitride film 20 and an insulating film 28 of a silicon oxide-based insulating material; a device isolation film 32b buried in the bottom of the trench 16b; and a capacitor formed on a side wall of an upper part of the second trench 16b and including an impurity diffused region 40 as a first electrode, a capacitor dielectric film 43 of a silicon oxide-based insulating film and a second electrode 46.

Abstract: A semiconductor device includes a plurality of chips comprising a plurality of first moisture-proof rings individually surrounding said plurality of chips, a second moisture-proof ring surrounding the entire plurality of chips, and a wire for connecting said plurality of chips to each other.