Patents by Inventor Yoshihisa Okita

Yoshihisa Okita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6614667
    Abstract: A power conversion apparatus capable of reducing the conduction loss to achieve high efficiency yielding a downsized and weight-reduced apparatus and a method for driving such a power conversion apparatus is disclosed. A power conversion apparatus comprising a switching-element driving circuit which includes a current transformer having a primary coil connected to an current control type switching element, and a driving-current generating circuit formed of a secondary coil of the current transformer and a rectifying circuit connected to the secondary coil, wherein an output current generated in the driving-current generating circuit is supplied to the switching element as a driving current of the switching element, and a method for driving the switching element of such a power conversion apparatus are disclosed.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: September 2, 2003
    Assignee: TDK Corporation
    Inventors: Kazuyuki Itoh, Yoshihisa Okita, Katsuaki Tanaka, Yoshinobu Takayanagi
  • Patent number: 6438004
    Abstract: The present invention discloses a power conversion apparatus comprising a control circuit for generating a switching signal at the timing allowing soft-switching to be achieved, and free from any occurrence of ripple. The power conversion apparatus includes a first main switch (Q1) and a second main switch (Q2) which are connected in series with each other. One of the ends of the first main switch is connected with the positive side of a DC power supply, and one of the ends of the second main switch is connected to the negative side of the DC power supply. A diode (D1, D2) is connected in parallel with each of the main switches so as to become reverse biased with respect to the DC power supply. A main-switch snubber capacitor (C1, C2) is connected in parallel with each of the main switches. A load is connected with the junction between the pair of main switches, and the main switches are controllably switched according a switching signal from a control circuit to generate an output.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: August 20, 2002
    Assignee: TDK Corporation
    Inventors: Katsuaki Tanaka, Yoshihisa Okita, Kazuyuki Itoh
  • Patent number: 6414854
    Abstract: In a power conversion apparatus using a semiconductor switching element, a collector-emitter voltage detecting device is provided to detect the collector-emitter voltage in the semiconductor switching element in the power conversion apparatus in order to comprehensively reduce switching loss and conduction loss arising in a switching element. A base current supplied to the switching element is controlled based on the detected collector-emitter voltage so as to control the collector-emitter voltage or control a regenerative power to be transmitted from a switching element driving power supply to an external auxiliary power supply or the like. This provides an optimum driving in consideration of factors including dispersion in a specific current amplification factor (hfe) of the switching element, variance in the hfe caused by temperature, and variance in the hfe to a current flowing through the switching element, for reducing a sum of conduction loss and driving power of the switching element.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: July 2, 2002
    Assignee: TDK Corporation
    Inventors: Kazuyuki Itoh, Yoshihisa Okita, Katsuaki Tanaka, Yoshinobu Takayanagi
  • Publication number: 20020054499
    Abstract: The present invention discloses a power conversion apparatus comprising a control circuit for generating a switching signal at the timing allowing soft-switching to be achieved, and free from any occurrence of ripple.
    Type: Application
    Filed: December 26, 2001
    Publication date: May 9, 2002
    Applicant: TDK CORPORATION
    Inventors: Katsuaki Tanaka, Yoshihisa Okita, Kazuyuki Itoh
  • Patent number: 6353543
    Abstract: A switching circuit for a power conversion apparatus capable of reducing conduction loss to provide a higher efficiency, and achieving downsizing and weight-reduction and higher driving frequency based on the improved efficiency is disclosed. A driving transistor is connected to a switching main transistor to supply a driving power for ON-OFF driving thereto, and an auxiliary power source composed of a current transformer is provided between the main transistor and the driving transistor. An auxiliary transistor having a lower switching loss than that of the main transistor is connected in parallel with the main transistor to form a main switch in combination with the main transistor. A current-driven type transistor serves as the main transistor, and voltage-driven type transistors serve as both of the driving transistor and the auxiliary transistor.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: March 5, 2002
    Assignee: TDK Corporation
    Inventors: Kazuyuki Itoh, Yoshihisa Okita, Katsuaki Tanaka
  • Patent number: 6351107
    Abstract: In a power conversion device including a current control semiconductor switching element, a driving device of the aforementioned switching element is disclosed. The driving device comprises an output main line connected to a base or gate of the switching element, an output return line connected to an emitter or source. A collector current detecting device for detecting a collector current or drain current, and a base current control device for controlling a base current or gate current are provided. The base current control device controls the base current to reduce the sum of conduction loss and drive power in the switching element in accordance with a collector current signal from the collector current detecting device.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: February 26, 2002
    Assignee: TDK Corporation
    Inventor: Yoshihisa Okita
  • Publication number: 20020012253
    Abstract: In a power conversion apparatus using a semiconductor switching element, a collector-emitter voltage detecting device is provided to detect the collector-emitter voltage in the semiconductor switching element in the power conversion apparatus in order to comprehensively reduce switching loss and conduction loss arising in a switching element. A base current supplied to the switching element is controlled based on the detected collector-emitter voltage so as to control the collector-emitter voltage or control a regenerative power to be transmitted from a switching element driving power supply to an external auxiliary power supply or the like. This provides an optimum driving in consideration of factors including dispersion in a specific current amplification factor (hfe) of the switching element, variance in the hfe caused by temperature, and variance in the hfe to a current flowing through the switching element, for reducing a sum of conduction loss and driving power of the switching element.
    Type: Application
    Filed: September 7, 2001
    Publication date: January 31, 2002
    Inventors: Kazuyuki Itoh, Yoshihisa Okita, Katsuaki Tanaka, Yoshinobu Takayanagi
  • Patent number: 6323634
    Abstract: A magnetic sensor apparatus comprises a magnetic detector (101) that outputs a signal responsive to a magnetic field and a magnetic substance (110) having a cavity (111) in which the magnetic detector (101) is placed. The magnetic detector (101) is placed in the cavity (111) of the magnetic substance (110). The ratio between a magnetic field (H) to be measured and a magnetic field applied to the magnetic detector (101) is set to a specific value, based on at least one of a first demagnetizing factor depending on the shape of the magnetic substance (110) and a second demagnetizing factor depending on the shape of the cavity (111). The magnetic sensor apparatus further comprises a feedback coil (112) that applies a negative feedback magnetic field to the magnetic detector (101) and a reference magnetic field coil (113) that applies a reference alternating magnetic filed to the magnetic detector (101) for controlling the property of the magnetic detector (101).
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: November 27, 2001
    Assignee: TDK Corporation
    Inventors: Shiro Nakagawa, Katsuaki Tanaka, Katsumi Yabusaki, Yoshihisa Okita
  • Patent number: 6316931
    Abstract: It is an object of the invention to provide a magnetic sensor and a current sensor that exhibit high performance at low costs. A magnetic sensor has a magnetic core (1) having a magnetic saturation property and a sensor coil (2) wound around the magnetic core (1). An end of a detection coil (20) is connected to an end of the sensor coil (2). The other end of the detection coil (20) is grounded. The magnetic sensor further comprises a drive circuit (3) and a detection circuit (4). The drive circuit (3) has a series resonance circuit part of which is made up of the sensor coil (2). To the sensor coil (2) the drive circuit (3) supplies a resonance current flowing into the series resonance circuit as an alternating current that allows the magnetic core (1) to reach a saturation region. The detection circuit (4) detects a magnetic field to be measured by detecting variations in resonance current flowing through the sensor coil (2).
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: November 13, 2001
    Assignee: TDK Corporation
    Inventors: Shiro Nakagawa, Kazuyuki Itoh, Yoshihisa Okita, Katsumi Yabusaki
  • Publication number: 20010038540
    Abstract: A switching circuit for a power conversion apparatus capable of reducing conduction loss to provide a higher efficiency, and achieving downsizing and weight-reduction and higher driving frequency based on the improved efficiency is disclosed. A driving transistor is connected to a switching main transistor to supply a driving power for ON-OFF driving thereto, and an auxiliary power source composed of a current transformer is provided between the main transistor and the driving transistor. An auxiliary transistor having a lower switching loss than that of the main transistor is connected in parallel with the main transistor to form a main switch in combination with the main transistor. A current-driven type transistor serves as the main transistor, and voltage-driven type transistors serve as both of the driving transistor and the auxiliary transistor.
    Type: Application
    Filed: May 14, 2001
    Publication date: November 8, 2001
    Inventors: Kazuyuki Itoh, Yoshihisa Okita, Katsuaki Tanaka
  • Patent number: 6208541
    Abstract: This PWM inverter apparatus includes a first and second current control type semiconductor switching elements connected in series which are connected in parallel to a DC power supply. An output is generated by alternately switching the first and second semiconductor switching elements. Resistive semiconductor switching elements having a higher switching speed than the first and second semiconductor switching elements and a resistance-to-current characteristics producing a voltage drop are respectively connected in parallel to respective the first and second semiconductor switching elements.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: March 27, 2001
    Assignee: TDK Corporation
    Inventors: Kazuyuki Itoh, Yoshihisa Okita, Katsuaki Tanaka
  • Patent number: 6172882
    Abstract: The present invention provide a partial resonance PWM converter capable of making the switching loss occurring at a switch approximately zero and high efficiency by controlling a switching timing. A series circuit composed of upper and lower main switches is connected in parallel with a DC power supply, and diodes are respectively connected in parallel with each of the main switches in the opposite direction of a polarity of the DC power supply. A series circuit composed of upper and lower auxiliary switches is connected in parallel with the DC power supply, and diodes are respectively connected in parallel with each of the auxiliary switches in the opposite direction of the polarity of the DC power supply. A series resonance circuit composed of a capacitor and an inductor is inserted between the juncture of the upper and lower main switches and a juncture of the upper and lower auxiliary switches.
    Type: Grant
    Filed: December 22, 1999
    Date of Patent: January 9, 2001
    Assignee: TDK Corporation
    Inventors: Katsuaki Tanaka, Yoshihisa Okita, Kazuyuki Ito
  • Patent number: 6154379
    Abstract: The electric power conversion device includes an AC section, a DC section, a switching section connected between the AC section and the DC section for making power conversion by switching operation, and a control section for control the switching section. In the DC section is installed a ripple detection device for detecting a ripple component emerging into the DC side and for generating a ripple detection signal. When the DC component is included in the output current of the AC section, a ripple component having the same frequency with the AC frequency of the AC section output current is superimposed in the DC section. The ripple detection device is installed in the DC section, and thereby the ripple component emerging into the DC section is detected by the ripple detection device as a reflection of the DC offset included in the output current.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: November 28, 2000
    Assignee: TDK Corporation
    Inventor: Yoshihisa Okita
  • Patent number: 5234844
    Abstract: A bi-polar transistor structure in a superhigh speed logic integrated circuit, and a process for producing the same are disclosed. The transistor has a substantially coaxial symmetric structure. Single crystal active layers as base and collector regions have peripheries surrounded wholly or partially by respective polycrystalline electrode layers. The polysilicon electrodes have lateral portions and downward depending portions that connect to single crystal layers. The polycrystalline electrode layers are separated from each other by insulation. One process for producing the structure uses only thin film forming techniques and etching techniques to dispose the active layers, an emitter electrode layer, parts of the other electrode layers and parts of the insulating layers inside a recess formed in an insulating layer formed on a substrate. Another process uses a photoetching technique by which polycrystalline layers for base and collector electrodes are patterned.
    Type: Grant
    Filed: July 23, 1991
    Date of Patent: August 10, 1993
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Yoshihisa Okita
  • Patent number: 5219768
    Abstract: Selective ion implantation on the respective polysilicon is performed by utilizing a low temperature accelerated oxidation phenomenon in polysilicon with a high impurity concentration and the dependence of an accelerated energy of the impurity projection range in the ion implantation, so that formation of a mask resist pattern by photoetching is not necessary for each incorporation step of an impurity.A base (source drain) electrode is formed by polysilicon separated by a selective oxidation method and a selective oxide film in connection with an emitter (gate) region is removed to form a side wall spacer on the inner surface of the emitter (gate) region, thus loading to formation of the emitter (gate) in a reduced size.
    Type: Grant
    Filed: January 9, 1991
    Date of Patent: June 15, 1993
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yoshihisa Okita
  • Patent number: 4974045
    Abstract: A bi-polar transistor structure in a superhigh speed logic integrated circuit, and a process for producing the same are disclosed. The transistor has a substantially coaxial symmetric structure. Single crystal active layers as base and collector regions have peripheries surrounded wholly or partially by respective polycrystalline electrode layers. The polysilicon electrodes have lateral portions and downward depending portions that connect to single crystal layers. The polycrystalline electrode layers are separated from each other by insulation. One process for producing the structure uses only thin film forming techniques and etching techniques to dispose the active layers, an emitter electrode layer, parts of the other electrode layers and parts of the insulating layers inside a recess formed in an insulating layer formed on a substrate. Another process uses a photoetching technique by which polycrystalline layers for base and collector electrodes are patterned.
    Type: Grant
    Filed: March 3, 1989
    Date of Patent: November 27, 1990
    Assignee: Oki Electric Industry Co., Inc.
    Inventor: Yoshihisa Okita
  • Patent number: 4866000
    Abstract: In method of fabricating a bipolar transistor on a semiconductor substrate, the emitter pattern is formed using the horizontal etching effect and filling-in effect of the RF-bias sputtering method, so a fine, self-aligned emitter pattern can be created that is disposed entirely in the center of the active base region without the use of photoetching. In addition, the passive base layer and the emitter layer can approach each other to any desired degree as long as they do not touch, so no high-concentration base layer is necessary, the base resistance is reduced, and the passive base region is reduced to a very small size. Furthermore, after the formation of the base region, the only heat treatment step that alters the diffusion layer profile is the formation of the emitter layer, so the use of a thin epitaxial layer to reduce the collector resistance does not result in proximity of the buried collector layer and the passive base layer.
    Type: Grant
    Filed: September 16, 1988
    Date of Patent: September 12, 1989
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yoshihisa Okita
  • Patent number: 4749663
    Abstract: In a process of fabricating a semiconductor IC having a plurality of metal wiring conductor layers on a semiconductor substrate and an insulation layer between the metal wiring conductor layers, the insulation layer being formed of a silicon oxide film is formed by means of RF bias-sputtering, a silicon oxide film is formed by means of RF bias sputtering under such a condition that the deposition rate and the etching rate on a pattern surface 45.degree.
    Type: Grant
    Filed: June 24, 1987
    Date of Patent: June 7, 1988
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yoshihisa Okita