Patents by Inventor Yoshihisa Takahashi

Yoshihisa Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936247
    Abstract: A rotor of the present invention includes a rotor core, and a magnet press-fitted into a magnet insertion hole provided in the rotor core, the magnet has a hard magnetic body and a resin layer that is laminated on the hard magnetic body, that is disposed on an outward side of the rotor core in a radial direction and that includes a soft magnetic body, and the resin layer has a groove portion extending in a direction crossing an insertion direction.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: March 19, 2024
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Yoshihisa Kubota, Tadanobu Takahashi
  • Patent number: 11804274
    Abstract: A circuit includes a first transistor whose gate is connected to a set terminal and whose source or drain is connected to an internal node, a second transistor connected such that one of a source and a drain is electrically connected to the internal node and the other one of the source and the drain is electrically connected to a reference voltage source, a third transistor connected such that a gate is connected to the internal node, one of a source and a drain is connected to a clock terminal, and the other one of the source and the drain is connected to a first output terminal, a bootstrap capacitor which is connected to the internal node and the first output terminal, and a stabilization circuit that suppresses a drop in potential at the internal node in a charging period of the bootstrap capacitor.
    Type: Grant
    Filed: January 13, 2023
    Date of Patent: October 31, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Yoshihisa Takahashi
  • Patent number: 11756498
    Abstract: A shift register circuit includes stages each including a unit circuit. The unit circuit includes: an output transistor; an internal node; and a set transistor. Two of the scan signal lines that are adjacent to each other are turned into a selected state for respective, but partially overlapping select periods. The internal node is precharged over a first precharge period by a first transistor that is the set transistor in the unit circuit in at least one of the stages. The internal node is precharged over a second precharge period by a second transistor that is the set transistor in the unit circuit in at least another one of the stages. The first precharge period is shorter than the second precharge period. The first transistor in some or all of the at least one of the stages has a higher current-drive capability than the second transistor.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: September 12, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Yoshihisa Takahashi
  • Patent number: 11654353
    Abstract: An apparatus includes a housing having a holding portion for gripping by a hand of a user; a manipulation block having a first side that includes at least one of: (i) one or more pressable buttons, and (ii) a stick button, and having a second side that includes a trigger button; and at least one of: (i) a thumb sensor block, located proximate to the first side of the manipulation block, and operable to detect the presence of the thumb of the hand of the user when the holding portion is gripped by the user, (ii) a first finger sensor, located on the trigger button, and operable to detect the presence of the at least one finger of the hand of the user when the holding portion is gripped by the user, and (iii) a second finger sensor, located proximate to both the second side of the manipulation block and the holding portion of the housing, and operable to detect the presence of at least one of a middle finger, a ring finger, and a pinky finger of the hand of the user when the holding portion is gripped by the us
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: May 23, 2023
    Assignee: Sony Interactive Entertainment Inc.
    Inventors: Yuichi Machida, Kunihito Sawai, Shinichi Hirata, Yoshihisa Takahashi, Yoichi Nishimaki, Yasushi Okumura, Norihiro Nagai
  • Publication number: 20230154558
    Abstract: A circuit includes a first transistor whose gate is connected to a set terminal and whose source or drain is connected to an internal node, a second transistor connected such that one of a source and a drain is electrically connected to the internal node and the other one of the source and the drain is electrically connected to a reference voltage source, a third transistor connected such that a gate is connected to the internal node, one of a source and a drain is connected to a clock terminal, and the other one of the source and the drain is connected to a first output terminal, a bootstrap capacitor which is connected to the internal node and the first output terminal, and a stabilization circuit that suppresses a drop in potential at the internal node in a charging period of the bootstrap capacitor.
    Type: Application
    Filed: January 13, 2023
    Publication date: May 18, 2023
    Inventor: YOSHIHISA TAKAHASHI
  • Patent number: 11587631
    Abstract: A circuit includes a first transistor whose gate is connected to a set terminal and whose source or drain is connected to an internal node, a second transistor connected such that one of a source and a drain is electrically connected to the internal node and the other one of the source and the drain is electrically connected to a reference voltage source, a third transistor connected such that a gate is connected to the internal node, one of a source and a drain is connected to a clock terminal, and the other one of the source and the drain is connected to a first output terminal, a bootstrap capacitor which is connected to the internal node and the first output terminal, and a stabilization circuit that suppresses a drop in potential at the internal node in a charging period of the bootstrap capacitor.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: February 21, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Yoshihisa Takahashi
  • Publication number: 20220351793
    Abstract: A circuit includes a first transistor whose gate is connected to a set terminal and whose source or drain is connected to an internal node, a second transistor connected such that one of a source and a drain is electrically connected to the internal node and the other one of the source and the drain is electrically connected to a reference voltage source, a third transistor connected such that a gate is connected to the internal node, one of a source and a drain is connected to a clock terminal, and the other one of the source and the drain is connected to a first output terminal, a bootstrap capacitor which is connected to the internal node and the first output terminal, and a stabilization circuit that suppresses a drop in potential at the internal node in a charging period of the bootstrap capacitor.
    Type: Application
    Filed: July 14, 2022
    Publication date: November 3, 2022
    Inventor: YOSHIHISA TAKAHASHI
  • Patent number: 11475968
    Abstract: A circuit includes a first transistor whose gate is connected to a set terminal and whose source or drain is connected to an internal node, a second transistor connected such that one of a source and a drain is electrically connected to the internal node and the other one of the source and the drain is electrically connected to a reference voltage source, a third transistor connected such that a gate is connected to the internal node, one of a source and a drain is connected to a clock terminal, and the other one of the source and the drain is connected to a first output terminal, a bootstrap capacitor which is connected to the internal node and the first output terminal, and a stabilization circuit that suppresses a drop in potential at the internal node in a charging period of the bootstrap capacitor.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: October 18, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Yoshihisa Takahashi
  • Publication number: 20220208137
    Abstract: A shift register circuit includes stages each including a unit circuit. The unit circuit includes: an output transistor; an internal node; and a set transistor. Two of the scan signal lines that are adjacent to each other are turned into a selected state for respective, but partially overlapping select periods. The internal node is precharged over a first precharge period by a first transistor that is the set transistor in the unit circuit in at least one of the stages. The internal node is precharged over a second precharge period by a second transistor that is the set transistor in the unit circuit in at least another one of the stages. The first precharge period is shorter than the second precharge period. The first transistor in some or all of the at least one of the stages has a higher current-drive capability than the second transistor.
    Type: Application
    Filed: December 15, 2021
    Publication date: June 30, 2022
    Inventor: YOSHIHISA TAKAHASHI
  • Patent number: 11289552
    Abstract: A display panel includes a substrate, a gate metal layer formed on a substrate, an insulating layer that covers the gate metal layer, and a source metal layer formed on the insulating layer. In a driving circuit region, the gate metal layer includes a first electrode and a second electrode separated from each other in a first direction and close to each other. The first electrode is positioned nearer than the second electrode to an active region and has a first side on a side facing the second electrode. The second electrode includes an ESD sacrificial portion. The ESD sacrificial portion includes a first part extending in the first direction and a second part facing the first side and extending in a second direction intersecting the first direction, the second part not overlapping a source metal of the source metal layer.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: March 29, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Hidetoshi Nakagawa, Yoshihisa Takahashi, Masahiro Matsuda
  • Publication number: 20220062757
    Abstract: An apparatus includes a housing having a holding portion for gripping by a hand of a user; a manipulation block having a first side that includes at least one of: (i) one or more pressable buttons, and (ii) a stick button, and having a second side that includes a trigger button; and at least one of: (i) a thumb sensor block, located proximate to the first side of the manipulation block, and operable to detect the presence of the thumb of the hand of the user when the holding portion is gripped by the user, (ii) a first finger sensor, located on the trigger button, and operable to detect the presence of the at least one finger of the hand of the user when the holding portion is gripped by the user, and (iii) a second finger sensor, located proximate to both the second side of the manipulation block and the holding portion of the housing, and operable to detect the presence of at least one of a middle finger, a ring finger, and a pinky finger of the hand of the user when the holding portion is gripped by the us
    Type: Application
    Filed: November 9, 2021
    Publication date: March 3, 2022
    Applicant: Sony Interactive Entertainment Inc.
    Inventors: Yuichi Machida, Kunihito Sawai, Shinichi Hirata, Yoshihisa Takahashi, Yoichi Nishimaki, Yasushi Okumura, Norihiro Nagai
  • Patent number: 11198060
    Abstract: Methods and apparatus provide for causing a device to present a sense of force against depressing of a button in response to receiving an input initiated by the user of a sense-of-force presentation start position in said predetermined movable range, and to store the sense-of-force presentation start position in a memory in response to the input initiated by the user; acquiring a depress amount of said button; receiving the sense-of-force presentation start position from the memory; and instructing the presentation of the sense of force against depressing of said button when said depress amount reaches said sense-of-force presentation start position.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: December 14, 2021
    Assignee: Sony Interactive Entertainment Inc.
    Inventors: Yuichi Machida, Kunihito Sawai, Shinichi Hirata, Yoshihisa Takahashi, Yoichi Nishimaki, Yasushi Okumura, Norihiro Nagai
  • Publication number: 20210293291
    Abstract: Provided is a friction member (such as a disc brake pad) having light weight by reducing weight of a back plate and having improved durability after repeated braking. The friction member is specifically a friction member in which a friction material (overlying material) is disposed through an underlying material on one surface of a back plate comprising a material having a lower specific gravity than that of steel, wherein the underlying material comprises 30 mass % or more in total of a bonding material, an organic filler, and an organic fiber.
    Type: Application
    Filed: July 24, 2018
    Publication date: September 23, 2021
    Applicant: SHOWA DENKO MATERIALS CO., LTD.
    Inventors: Yoshihisa TAKAHASHI, Mitsuo UNNO
  • Publication number: 20210272494
    Abstract: A circuit includes a first transistor whose gate is connected to a set terminal and whose source or drain is connected to an internal node, a second transistor connected such that one of a source and a drain is electrically connected to the internal node and the other one of the source and the drain is electrically connected to a reference voltage source, a third transistor connected such that a gate is connected to the internal node, one of a source and a drain is connected to a clock terminal, and the other one of the source and the drain is connected to a first output terminal, a bootstrap capacitor which is connected to the internal node and the first output terminal, and a stabilization circuit that suppresses a drop in potential at the internal node in a charging period of the bootstrap capacitor.
    Type: Application
    Filed: February 25, 2021
    Publication date: September 2, 2021
    Inventor: YOSHIHISA TAKAHASHI
  • Publication number: 20210272949
    Abstract: A display panel includes a substrate, a gate metal layer formed on a substrate, an insulating layer that covers the gate metal layer, and a source metal layer formed on the insulating layer. In a driving circuit region, the gate metal layer includes a first electrode and a second electrode separated from each other in a first direction and close to each other. The first electrode is positioned nearer than the second electrode to an active region and has a first side on a side facing the second electrode. The second electrode includes an ESD sacrificial portion. The ESD sacrificial portion includes a first part extending in the first direction and a second part facing the first side and extending in a second direction intersecting the first direction, the second part not overlapping a source metal of the source metal layer.
    Type: Application
    Filed: February 25, 2021
    Publication date: September 2, 2021
    Inventors: HIDETOSHI NAKAGAWA, YOSHIHISA TAKAHASHI, MASAHIRO MATSUDA
  • Patent number: 10957266
    Abstract: Provided are a drive circuit and a display apparatus capable of making the waveforms of driving signals uniform. The drive circuit comprises a plurality of shift registers each comprising an input end, an output end, and a switching element connected between the input end and the output end. The input ends are respectively connected to a plurality of branch points on an input-signal line arranged on a display panel. The output ends are respectively connected to a plurality of output-signal lines. The drive circuit outputs a driving signal from the output end, on the basis of a signal input through the input end. All or some of the shift registers differ, according to a position of the branch point to which the input end is connected, in resistance value between the input end and the output end while the switching element is ON.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: March 23, 2021
    Assignee: SAKAI DISPLAY PRODUCTS CORPORATION
    Inventor: Yoshihisa Takahashi
  • Patent number: 10909942
    Abstract: Provided are a drive circuit capable of preventing a malfunction of the circuit, and a display apparatus. Each of the multiple shift registers comprising an output switching element and a first input switching element, wherein one or more shift registers of the multiple shift registers comprise a control switching element, wherein a first controlled terminal is connected to either an output control node to which a second controlled terminal of the first input switching element and a control terminal of the output switching element are connected or a second controlled terminal of the output switching element, and a second controlled terminal is connected to a predetermined electric potential, wherein a first clear signal to be high level at or before a time point when an predetermined clock signal rises is input to a control terminal of the control switching element.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: February 2, 2021
    Assignee: SAKAI DISPLAY PRODUCTS CORPORATION
    Inventor: Yoshihisa Takahashi
  • Patent number: 10850192
    Abstract: A control apparatus for a device with one of the left side and the right side of the device fixed as pressed against the palm of a user. The device includes a button that can be depressed within a predetermined movable range and a sense-of-force presentation block for presenting a sensor of force against button depression within a range in which any of the fingers of the user is reachable, the input of a sense-of-force presentation start position in the predetermined movable range being received, a button depressing amount being acquired, and, when the sense-of-force presentation start position is reached, instructing the sense-of-force presentation block to present a sense force against the depressing of the button.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: December 1, 2020
    Assignee: Sony Interactive Entertainment Inc.
    Inventors: Yuichi Machida, Kunihito Sawai, Shinichi Hirata, Yoshihisa Takahashi, Yoichi Nishimaki, Yasushi Okumura, Norihiro Nagai
  • Publication number: 20200353352
    Abstract: Methods and apparatus provide for causing a device to present a sense of force against depressing of a button in response to receiving an input initiated by the user of a sense-of-force presentation start position in said predetermined movable range, and to store the sense-of-force presentation start position in a memory in response to the input initiated by the user; acquiring a depress amount of said button; receiving the sense-of-force presentation start position from the memory; and instructing the presentation of the sense of force against depressing of said button when said depress amount reaches said sense-of-force presentation start position.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 12, 2020
    Applicant: Sony Interactive Entertainment Inc.
    Inventors: Yuichi Machida, Kunihito Sawai, Shinichi Hirata, Yoshihisa Takahashi, Yoichi Nishimaki, Yasushi Okumura, Norihiro Nagai
  • Publication number: 20200332851
    Abstract: There are provided a friction member in which both shear strength at normal temperature and high temperature and crack resistance can be satisfied, the disk rotor-attacking properties are low, and the vibration damping properties are high, and brake squeal is less likely to occur, and a friction material composition for an underlay material with which the friction member is obtained, and a friction material. The friction member is more specifically a friction member comprising an overlay material, an underlay material, and a back metal in this order, wherein the underlay material comprises fibrous wollastonite, an average fiber length of the fibrous wollastonite is 100 to 850 ?m, and an aspect ratio (average fiber length/average fiber diameter) of the fibrous wollastonite is 8 or more.
    Type: Application
    Filed: October 26, 2017
    Publication date: October 22, 2020
    Applicant: HITACHI CHEMICAL COMPANY, LTD.
    Inventors: Yoshihisa TAKAHASHI, Kazuya BABA