Patents by Inventor Yoshikazu Ooshika

Yoshikazu Ooshika has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9543469
    Abstract: A III nitride semiconductor epitaxial substrate having more excellent surface flatness is provided, in which the problems of crack formation and the double peaks in the shape of the EL spectrum are mitigated by employing appropriate conditions for Si doping on an AlN layer on a substrate; a III nitride semiconductor light emitting device; and methods of producing the same. A III nitride semiconductor epitaxial substrate has a substrate of which at least a surface portion is made of AlN, an undoped AlN layer formed on the substrate, an Si-doped AlN buffer layer formed on the undoped AlN layer, and a superlattice laminate formed on the Si-doped AlN buffer layer. The Si-doped AlN buffer layer has an Si concentration of 2.0×1019/cm3 or more and a thickness of 4 nm to 10 nm.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: January 10, 2017
    Assignee: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Masatoshi Iwata, Yoshikazu Ooshika
  • Publication number: 20160172534
    Abstract: A III nitride semiconductor epitaxial substrate having more excellent surface flatness is provided, in which the problems of crack formation and the double peaks in the shape of the EL spectrum are mitigated by employing appropriate conditions for Si doping on an AlN layer on a substrate; a III nitride semiconductor light emitting device; and methods of producing the same. A III nitride semiconductor epitaxial substrate has a substrate of which at least a surface portion is made of AlN, an undoped AlN layer formed on the substrate, an Si-doped AlN buffer layer formed on the undoped AlN layer, and a superlattice laminate formed on the Si-doped AlN buffer layer. The Si-doped AlN buffer layer has an Si concentration of 2.0×1019/cm3 or more and a thickness of 4 nm to 10 nm.
    Type: Application
    Filed: August 6, 2014
    Publication date: June 16, 2016
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Masatoshi IWATA, Yoshikazu OOSHIKA
  • Patent number: 8765222
    Abstract: The method according to the present invention includes a first step of supplying the Group V source gas at a flow rate B1 (0<B1) and supplying the gas containing magnesium at a flow rate C1 (0<C1) while supplying the Group III source gas at a flow rate A1 (0?A1); and a second step of supplying a Group V source gas at a flow rate B2 (0<B2) and supplying a gas containing magnesium at a flow rate C2 (0<C2) while supplying a Group III source gas at a flow rate A2 (0<A2). The first step and the second step are repeated a plurality of times to form a p-AlxGa1-xN (0?x<1) layer, and the flow rate A1 is a flow rate which allows no p-AlxGa1-xN layer to grow and satisfies A1?0.5 A2.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: July 1, 2014
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Yoshikazu Ooshika, Tetsuya Matsuura
  • Publication number: 20140166943
    Abstract: A p-AlGaN layer doped with magnesium is provided that includes an aluminum composition ratio x of 0.2 or more and less than 0.5 and a carrier concentration of 2.5×1017/cm3 or more. A Group III nitride semiconductor light emitting device including the p-AlxGa1-xN layer is also provided.
    Type: Application
    Filed: February 20, 2014
    Publication date: June 19, 2014
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yoshikazu OOSHIKA, Tetsuya MATSUURA
  • Patent number: 8742396
    Abstract: A III nitride epitaxial substrate which makes it possible to obtain a deep ultraviolet light emitting device with improved light output power is provided. A III nitride epitaxial substrate includes a substrate, an AlN buffer layer, a first superlattice laminate, a second superlattice laminate and a III nitride laminate in this order. The III nitride laminate includes an active layer including an Al?Ga1-?N (0.03??) layer. The first superlattice laminate includes AlaGa1-aN layers and AlbGa1-bN (0.9<b?1) layers which are alternately stacked, where ?(alpha)<a and a<b. The second superlattice laminate includes repeated layer sets each having an AlxGa1-xN layer, an AlyGa1-yN layer, and an AlzGa1-zN (0.9<z?1) layer, where ?(alpha)<x and x<y<z.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: June 3, 2014
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventor: Yoshikazu Ooshika
  • Patent number: 8735938
    Abstract: To provide a semiconductor device including a functional laminate having flatness and crystallinity improved by effectively passing on the crystallinity and flatness improved in a buffer to the functional laminate, and to provide a method of producing the semiconductor device; in the semiconductor device including the buffer and the functional laminate having a plurality of nitride semiconductor layers, the functional laminate includes a first n-type or i-type AlxGa1-xN layer (0?x<1) on the buffer side, and an AlzGa1-zN adjustment layer containing p-type impurity, which has an approximately equal Al composition to the first AlxGa1-xN layer (x?0.05?z?x+0.05, 0?z<1) is provided between the buffer and the functional laminate.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: May 27, 2014
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Yoshikazu Ooshika, Tetsuya Matsuura
  • Patent number: 8680509
    Abstract: A nitride semiconductor device is provided, in which a superlattice strain buffer layer using AlGaN layers having a low Al content or GaN layers is formed with good flatness, and a nitride semiconductor layer with good flatness and crystallinity is formed on the superlattice strain buffer layer. A nitride semiconductor device includes a substrate; an AlN strain buffer layer made of AlN formed on the substrate; a superlattice strain buffer layer formed on the AlN strain buffer layer; and a nitride semiconductor layer formed on the superlattice strain buffer layer, and is characterized in that the superlattice strain buffer layer has a superlattice structure formed by alternately stacking first layers made of AlxGa1-xN (0?x?0.25), which further contain p-type impurity, and second layers made of AlN.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: March 25, 2014
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Yoshikazu Ooshika, Tetsuya Matsuura
  • Publication number: 20130292641
    Abstract: To provide a semiconductor device including a functional laminate having flatness and crystallinity improved by effectively passing on the crystallinity and flatness improved in a buffer to the functional laminate, and to provide a method of producing the semiconductor device; in the semiconductor device including the buffer and the functional laminate having a plurality of nitride semiconductor layers, the functional laminate includes a first n-type or i-type AlxGa1-xN layer (0?x<1) on the buffer side, and an AlzGa1-zN adjustment layer containing p-type impurity, which has an approximately equal Al composition to the first AlxGa1-xN layer (x?0.05?z?x+0.05, 0?z<1) is provided between the buffer and the functional laminate.
    Type: Application
    Filed: July 2, 2013
    Publication date: November 7, 2013
    Applicant: Dowa Electronics Materials Co., Ltd.
    Inventors: Yoshikazu OOSHIKA, Tetsuya MATSUURA
  • Publication number: 20120326209
    Abstract: To provide a semiconductor device including a functional laminate having flatness and crystallinity improved by effectively passing on the crystallinity and flatness improved in a buffer to the functional laminate, and to provide a method of producing the semiconductor device; in the semiconductor device including the buffer and the functional laminate having a plurality of nitride semiconductor layers, the functional laminate includes a first n-type or i-type AlxGa1-xN layer (0?x<1) on the buffer side, and an AlzGa1-zN adjustment layer containing p-type impurity, which has an approximately equal Al composition to the first AlxGa1-xN layer (x?0.05?z?x+0.05, 0?z<1) is provided between the buffer and the functional laminate.
    Type: Application
    Filed: March 1, 2011
    Publication date: December 27, 2012
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yoshikazu Ooshika, Tetsuya Matsuura
  • Patent number: 8330168
    Abstract: An object of the present invention is to provide a nitride semiconductor light-emitting device in which contact resistance generated between an n-contact layer and an n-side electrode is effectively reduced while maintaining satisfactory external quantum efficiency, and a method of efficiently producing the nitride semiconductor light-emitting device. Specifically, the present invention characteristically provides a nitride semiconductor light-emitting device having a semiconductor laminated body including an n-type laminate, a light-emitting layer and a p-type laminate, and an n-side electrode and a p-side electrode, characterized in that: the n-type laminate includes an n-contact layer made of an AlxGa1-xN material (0.7?x?1.0) and an n-clad layer provided on the n-contact layer; and an interlayer made of an AlyGa1-yN material (0?y?0.5) is provided on a partially exposed portion, on the light-emitting layer side, of the n-contact layer.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: December 11, 2012
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Yutaka Ohta, Yoshikazu Ooshika
  • Publication number: 20120248387
    Abstract: The method according to the present invention includes a first step of supplying the Group V source gas at a flow rate B1 (0<B1) and supplying the gas containing magnesium at a flow rate C1 (0<C1) while supplying the Group III source gas at a flow rate A1 (0?A1); and a second step of supplying a Group V source gas at a flow rate B2 (0<B2) and supplying a gas containing magnesium at a flow rate C2 (0<C2) while supplying a Group III source gas at a flow rate A2 (0<A2). The first step and the second step are repeated a plurality of times to form a p-AlxGa1-xN (0?x<1) layer, and the flow rate A1 is a flow rate which allows no p-AlxGa1-xN layer to grow and satisfies A1?0.5A2.
    Type: Application
    Filed: December 10, 2010
    Publication date: October 4, 2012
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yoshikazu Ooshika, Tetsuya Matsuura
  • Publication number: 20120175589
    Abstract: A nitride semiconductor device is provided, in which a superlattice strain buffer layer using AlGaN layers having a low Al content or GaN layers is formed with good flatness, and a nitride semiconductor layer with good flatness and crystallinity is formed on the superlattice strain buffer layer. A nitride semiconductor device includes a substrate; an AlN strain buffer layer made of AlN formed on the substrate; a superlattice strain buffer layer formed on the AlN strain buffer layer; and a nitride semiconductor layer formed on the superlattice strain buffer layer, and is characterized in that the superlattice strain buffer layer has a superlattice structure formed by alternately stacking first layers made of AlxGa1?xN (0?x?0.25), which further contain p-type impurity, and second layers made of AlN.
    Type: Application
    Filed: August 23, 2010
    Publication date: July 12, 2012
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yoshikazu Ooshika, Tetsuya Matsuura
  • Publication number: 20110266553
    Abstract: An object of the present invention is to provide a nitride semiconductor light-emitting device in which contact resistance generated between an n-contact layer and an n-side electrode is effectively reduced while maintaining satisfactory external quantum efficiency, and a method of efficiently producing the nitride semiconductor light-emitting device. Specifically, the present invention characteristically provides a nitride semiconductor light-emitting device having a semiconductor laminated body including an n-type laminate, a light-emitting layer and a p-type laminate, and an n-side electrode and a p-side electrode, characterized in that: the n-type laminate includes an n-contact layer made of an AlxGa1-xN material (0.7?x?1.0) and an n-clad layer provided on the n-contact layer; and an interlayer made of an AlyGa1-yN material (0?y?0.5) is provided on a partially exposed portion, on the light-emitting layer side, of the n-contact layer.
    Type: Application
    Filed: December 24, 2009
    Publication date: November 3, 2011
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Yutaka Ohta, Yoshikazu Ooshika
  • Publication number: 20090250684
    Abstract: A semiconductor element is disclosed having a layered body of a first conductivity type, a light emitting layer, a layered body of a second conductivity type, a constriction layer having a constriction hole, and a first electrode having a lighting hole, a second electrode positioned such that charge traveling between the first and second electrodes passes through the light emitting layer. The constriction hole area is larger than the lighting hole area, and the lighting hole and the constriction hole expose a part of the layered body of the second conductivity type. A mirror is positioned such that the mirror receives light emitted from the light emitting layer that passes through the layered body of the first conductivity type, and the mirror is constructed to have a high reflection ratio for light having peak wavelengths between 200 nm to 350 nm.
    Type: Application
    Filed: March 5, 2009
    Publication date: October 8, 2009
    Applicant: Dowa Electronics Materials Co., Ltd
    Inventors: Yutaka Ohta, Yoshikazu Ooshika