Patents by Inventor Yoshiki Kobayashi
Yoshiki Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12215438Abstract: A single-crystal diamond includes n types of regions different in total concentration of an impurity, the n types of regions being observed in an observed surface being in parallel to a (110) face. Each of the n types of regions has an area not smaller than 0.1 ?m2. At least one of a first line, a second line, and a third line on the observed surface crosses a boundary between the n types of regions at least four times. The first line, the second line, and the third line are in parallel to a <?110> direction and have a length of 1 mm. A midpoint of the first line corresponds to the center of gravity of the observed surface. The second line and the third line are distant from the first line by 300 ?m in a <001> direction and a <00?1> direction, respectively.Type: GrantFiled: September 14, 2018Date of Patent: February 4, 2025Assignees: Sumitomo Electric Industries, Ltd., SUMITOMO ELECTRIC HARDMETAL CORP.Inventors: Natsuo Tatsumi, Yoshiki Nishibayashi, Takuya Nohara, Akihiko Ueda, Yutaka Kobayashi
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Patent number: 12009229Abstract: A laser beam irradiating unit of a laser processing apparatus includes a laser oscillator, a mirror configured to reflect a laser beam emitted from the laser oscillator and propagate the laser beam to a processing point, a power measuring unit configured to measure power of leakage light of the laser beam transmitted without being reflected by the mirror, and a condensing lens configured to condense the laser beam propagated by the mirror and irradiate a workpiece with the condensed laser beam. The control unit measures the power of the leakage light of the laser beam by the power measuring unit while irradiating the workpiece with the laser beam.Type: GrantFiled: August 26, 2020Date of Patent: June 11, 2024Assignee: DISCO CORPORATIONInventors: Hiroki Uryu, Seiji Miura, Haruhiko Asahi, Hisatoshi Fujisawa, Yoshiki Kobayashi, Hidenori Akamatsu
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Publication number: 20240082945Abstract: A method of manufacturing a battery pack that is provided with a plurality of stacked unit cells, the method comprising a step of, when a unit cell disposed on one outermost layer is referred to as a first unit cell, and, of the plurality of unit cells stacked in order from the first unit cell, the unit cell disposed on the other outermost layer opposite to that of the first unit cell is referred to as the Nth, where N is a positive number of 2 or more, unit cell: arranging an anvil at an external terminal of the Nth unit cell outside the battery pack; arranging a horizontal-vibration horn either at an external terminal of the (N?1)th unit cell outside the battery pack, or between an external terminal of the (N?1)th unit cell and an external terminal of the (N?2)th unit cell; and then using the anvil and the horn to ultrasonically join the external terminal of the Nth unit cell and the external terminal of the (N?1)th unit cell.Type: ApplicationFiled: November 13, 2023Publication date: March 14, 2024Applicant: AESC Japan Ltd.Inventor: Yoshiki KOBAYASHI
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Patent number: 11616354Abstract: A battery pack houses a battery inside a battery case, the battery case (100) includes an opening (450), cables (200, 300) electrically connected with the battery is inserted to the opening, a cable protection member (400) including a through portion (410) is arranged at the opening, the cable protection member is attachable to the opening in at least two different directions, and a position of the through portion to the battery case changes according to an attaching direction.Type: GrantFiled: March 20, 2018Date of Patent: March 28, 2023Assignee: ENVISION AESC JAPAN LTD.Inventors: Yoshiki Kobayashi, Toru Suzuki
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Publication number: 20220283947Abstract: An information processing device includes: a storage device including a plurality of banks which are storage regions for which independent reading/writing is possible and a processing device capable of accessing the plurality of banks in parallel, wherein the processing device includes a generation means for generating, in units of loops in a loop control statement, a packet having an address in an index array and vector data elements stored therein, and each of the plurality of banks atomically and simultaneously carries out a series of processes for carrying out reading, computation processing, and storage of a computation result value for data corresponding to a relevant address in units of packets.Type: ApplicationFiled: February 24, 2021Publication date: September 8, 2022Applicant: NEC CORPORATIONInventor: Yoshiki KOBAYASHI
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Publication number: 20210066101Abstract: A laser beam irradiating unit of a laser processing apparatus includes a laser oscillator, a mirror configured to reflect a laser beam emitted from the laser oscillator and propagate the laser beam to a processing point, a power measuring unit configured to measure power of leakage light of the laser beam transmitted without being reflected by the mirror, and a condensing lens configured to condense the laser beam propagated by the mirror and irradiate a workpiece with the condensed laser beam. The control unit measures the power of the leakage light of the laser beam by the power measuring unit while irradiating the workpiece with the laser beam.Type: ApplicationFiled: August 26, 2020Publication date: March 4, 2021Inventors: Hiroki URYU, Seiji MIURA, Haruhiko ASAHI, Hisatoshi FUJISAWA, Yoshiki KOBAYASHI, Hidenori AKAMATSU
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Publication number: 20210050564Abstract: A first lead terminal (210) has a first end (212) and a second end (214). The second end (214) is opposite to the first end (212). The first lead terminal (210) is positioned such that the first end (212) of the first lead terminal (210) faces a first side surface (104a) of a laminated body (100). The second end (214) of the first lead terminal (210) projects obliquely with respect to the first side surface (104a) of the laminated body (100). The first lead terminal (210) has a bent portion (C) along a longitudinal direction of the first lead terminal (210) between the first end (212) and the second end (214), more specifically, outside an exterior material (140).Type: ApplicationFiled: January 10, 2019Publication date: February 18, 2021Applicant: Envision AESC Energy Devices Ltd.Inventors: Yoshimasa YAMAMOTO, Yoshiki KOBAYASHI
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Publication number: 20200153222Abstract: A battery pack houses a battery inside a battery case, the battery case (100) includes an opening (450), cables (200, 300) electrically connected with the battery is inserted to the opening, a cable protection member (400) including a through portion (410) is arranged at the opening, the cable protection member is attachable to the opening in at least two different directions, and a position of the through portion to the battery case changes according to an attaching direction.Type: ApplicationFiled: March 20, 2018Publication date: May 14, 2020Applicant: Envision AESC Energy Devices Ltd.Inventors: Yoshiki KOBAYASHI, Toru SUZUKI
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Publication number: 20190393472Abstract: A method of manufacturing a battery pack that is provided with a plurality of stacked unit cells, the method comprising a step of, when a unit cell disposed on one outermost layer is referred to as a first unit cell, and, of the plurality of unit cells stacked in order from the first unit cell, the unit cell disposed on the other outermost layer opposite to that of the first unit cell is referred to as the Nth, where N is a positive number of 2 or more, unit cell: arranging an anvil at an external terminal of the Nth unit cell outside the battery pack; arranging a horizontal-vibration horn either at an external terminal of the (N-1)th unit cell outside the battery pack, or between an external terminal of the (N-1)th unit cell and an external terminal of the (N-2)th unit cell; and then using the anvil and the horn to ultrasonically join the external terminal of the Nth unit cell and the external terminal of the (N-1)th unit cell.Type: ApplicationFiled: January 30, 2018Publication date: December 26, 2019Applicant: Envision AESC Energy Devices Ltd.Inventor: Yoshiki KOBAYASHI
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Patent number: 9869724Abstract: A battery monitoring unit monitors at least one from among: (i) the attachment state of secondary battery pack; (ii) the low state of a battery voltage VBAT; and (iii) the state of whether it is possible or impossible to use the secondary battery. A battery measurement unit measures the battery voltage VBAT, a charge/discharge current IBAT, and a temperature T of the secondary battery pack, and converts the measured values into digital data. A charging circuit is configured to charge the secondary battery pack using DC voltage from an external power supply based on the state information detected by the battery monitoring unit and the information measured by the battery measurement unit. A coulomb counter measures the charge/discharge current IBAT at predetermined time intervals, and integrates the measurement value, thereby calculating the sum total of the charged/discharged amount. The battery management circuit is monolithically integrated on a single semiconductor substrate.Type: GrantFiled: July 24, 2014Date of Patent: January 16, 2018Assignee: ROHM CO., LTD.Inventors: Isaku Kimura, Takahiro Shimizu, Yoshiki Kobayashi, Shinya Kobayashi
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Publication number: 20160111759Abstract: Provided is a battery module whose layout for accurately detecting the average of entire temperature information is realized by a small number of temperature sensors. A battery module 1000 of the present invention is characterized by including a plurality of assembled batteries 600 in which a plurality of unit batteries 100 are sandwiched between two case bodies 601 and 602, wherein slit portions 603 are provided in the assembled batteries 600, and a temperature sensor 886 is disposed between the slit portion 603 of one of the assembled batteries 600 and the slit portion 603 of the other assembled battery 600.Type: ApplicationFiled: April 17, 2014Publication date: April 21, 2016Applicant: NEC ENERGY DEVICES, LTD.Inventors: Yoshiki KOBAYASHI, Toru SUZUKI
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Patent number: 9128914Abstract: Disclosed is a semiconductor integrated circuit capable of efficiently performing debugging. The semiconductor integrated circuit includes a distributing part distributing received packets according to destinations of the packets, a plurality of accumulating parts sequentially accumulating the packets distributed thereto, respectively, a plurality of relaying parts supplying the packets accumulated in one of the accumulating parts to corresponding one of the processing parts, respectively, and an output controlling part assigning the relay permission command to one relaying part designated by a relay permission packet from among the relaying parts when a packet distributed thereto from the distributing part is determined as the relay permission packet.Type: GrantFiled: September 1, 2012Date of Patent: September 8, 2015Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Yoshiki Kobayashi
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Publication number: 20150032394Abstract: A battery monitoring unit monitors at least one from among: (i) the attachment state of secondary battery pack; (ii) the low state of a battery voltage VBAT; and (iii) the state of whether it is possible or impossible to use the secondary battery. A battery measurement unit measures the battery voltage VBAT, a charge/discharge current IBAT, and a temperature T of the secondary battery pack, and converts the measured values into digital data. A charging circuit is configured to charge the secondary battery pack using DC voltage from an external power supply based on the state information detected by the battery monitoring unit and the information measured by the battery measurement unit. A coulomb counter measures the charge/discharge current IBAT at predetermined time intervals, and integrates the measurement value, thereby calculating the sum total of the charged/discharged amount. The battery management circuit is monolithically integrated on a single semiconductor substrate.Type: ApplicationFiled: July 24, 2014Publication date: January 29, 2015Inventors: Isaku KIMURA, Takahiro SHIMIZU, Yoshiki KOBAYASHI, Shinya KOBAYASHI
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Publication number: 20130058207Abstract: Disclosed is a semiconductor integrated circuit capable of efficiently performing debugging. The semiconductor integrated circuit includes a distributing part distributing received packets according to destinations of the packets, a plurality of accumulating parts sequentially accumulating the packets distributed thereto, respectively, a plurality of relaying parts supplying the packets accumulated in one of the accumulating parts to corresponding one of the processing parts, respectively, and an output controlling part assigning the relay permission command to one relaying part designated by a relay permission packet from among the relaying parts when a packet distributed thereto from the distributing part is determined as the relay permission packet.Type: ApplicationFiled: September 1, 2012Publication date: March 7, 2013Applicant: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Yoshiki KOBAYASHI
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Publication number: 20100141660Abstract: An image rendering processing device includes an expanding section, a signal output section, and a writing section. The expanding section reads out font data corresponding to the character code indicated in image rendering data and expands the font data into a size corresponding to horizontal and vertical pixel numbers of the image rendering data. The signal output section (a) reads out a valid range corresponding to the character code, (b) adjusts the valid range based on the pixels of the expanded font data, and counts the pixels in the expanded font data along the specific direction, and (c) outputs a valid signal indicating that a given pixel corresponds to the valid range when a counted pixel number matches the pixel number of a pixel corresponding to the valid range. The writing section writes the pixel that corresponds to the pixel number which is counted when the valid signal is output.Type: ApplicationFiled: November 30, 2009Publication date: June 10, 2010Applicant: OKI SEMICONDUCTOR CO., LTD.Inventor: Yoshiki Kobayashi
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Publication number: 20080122930Abstract: An intruder monitoring apparatus has at least a feature of correcting characteristic quantities by which an object to be monitored is specified, on the basis reference characteristic, when any change occurs in conditions of the video devices and environments. A further feature is provided which a plurality of scenes are monitored periodically by one camera and an image analysis function is driven so as to monitor any intruder only when the camera unit is fixedly directed to a specific scene among the scenes.Type: ApplicationFiled: January 14, 2008Publication date: May 29, 2008Inventors: Yoichi Takagi, Hiroshi Suzuki, Kunizo Sakai, Yoshiki Kobayashi, Takeshi Saito
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Patent number: 7293211Abstract: The number of S-FFs in a scan-path is decreased by half and a test time needed is decreased. An I/O terminal 1A is connected to a scan-path 31-3m and a combination circuit 2 via a selector 5A and an output of the scan-path 31-3m is connected to an I/O terminal 1B via a selector 6A and a tri-state buffer 7A. The I/O terminal 1B is connected to a scan-path 3m+1-3n and to the combination circuit 2 via a selector 5B and the output of the scan-path 3m+1-3n is connected to the I/O terminal 1A via a selector 6B and tri-state buffer 7B. When testing, the tri-state buffers are turned off and test-data are supplied by connecting the I/O terminal 1A, 1B to the scan-path 31-3m, 3m+1-3n respectively. Thereafter, output signals of the combination circuit is applied to each S-FF 3, and the test data are read out from the I/O terminal 1A, 1B by turning on the each tri-state buffer 7A, 7B.Type: GrantFiled: August 19, 2005Date of Patent: November 6, 2007Assignee: Oki Electric Industry Co., Ltd.Inventor: Yoshiki Kobayashi
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Publication number: 20070003148Abstract: Information of light from a subject is converted into information of the electric charges to generate image data for one screen in an image pickup device, the image data is outputted to an image processing LSI, only the image data belonging to a plurality of areas is selected by a processing amount reduction unit, the selected image data is transferred to a RAM in a single chop by a data transfer unit, and the processing of recognizing a white line is executed by a CPU on the basis of the image data stored in the RAM.Type: ApplicationFiled: August 9, 2006Publication date: January 4, 2007Inventors: Shoji Muramatsu, Yuji Otsuka, Yoshiki Kobayashi, Hiroshi Takenaga, Jiro Takezaki, Tatsuhiko Monji, Isao Furusawa
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Patent number: 7110613Abstract: Information of light from a subject is converted into information of the electric charges to generate image data for one screen in an image pickup device, the image data is outputted to an image processing LSI, only the image data belonging to a plurality of areas is selected by a processing amount reduction unit, the selected image data is transferred to a RAM in a single chop by a data transfer unit, and the processing of recognizing a white line is executed by a CPU on the basis of the image data stored in the RAM.Type: GrantFiled: March 20, 2002Date of Patent: September 19, 2006Assignee: Hitachi, Ltd.Inventors: Shoji Muramatsu, Yuji Otsuka, Yoshiki Kobayashi, Hiroshi Takenaga, Jiro Takezaki, Tatsuhiko Monji, Isao Furusawa
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Patent number: D767101Type: GrantFiled: May 18, 2015Date of Patent: September 20, 2016Assignee: Mitsubishi Electric CorporationInventors: Yoshiki Kobayashi, Takeshi Miura