Abstract: A semiconductor processing system includes an intermediate structure disposed between an atmospheric pressure entrance transfer chamber and a vacuum common transfer chamber. The intermediate structure includes a transfer passage for a target substrate to pass therein. The transfer passage includes a first buffer chamber a middle transfer chamber and a second buffer chamber detachably connected. An additional processing apparatus is detachably connected to the middle transfer chamber. The intermediate structure is selectively arranged in first or second state. In the first state, the additional processing apparatus performs a vacuum process, while the first buffer chamber is a load-lock chamber. In the second state, the additional processing apparatus performs an atmospheric pressure process, while the second buffer chamber is a load-lock chamber.

Abstract: A semiconductor processing system includes an intermediate structure (37A, 37B) disposed between an atmospheric pressure entrance transfer chamber (32) and a vacuum common transfer chamber (36). The intermediate structure includes a transfer passage (38A, 38B) for a target substrate (W) to pass therein. The transfer passage includes a first buffer chamber (70), a middle transfer chamber (72), and a second buffer chamber (74) detachably connected. An additional processing apparatus (110, 110A) is detachably connected to the middle transfer chamber. The intermediate structure is selectively arranged in first or second state. In the first state, the additional processing apparatus (110) performs a vacuum process, while the first buffer chamber (70) is a load-lock chamber. In the second state, the additional processing apparatus (110A) performs an atmospheric pressure process, while the second buffer chamber (74) is a load-lock chamber.

Abstract: The objective of the invention is to provide a type of semiconductor memory device whose antifuse can be formed without any additional film manufacturing process. A first electrode is formed by a first polysilicon film 37 formed on semiconductor substrate 30 and a second polysilicon film 39 deposited on the surface of the first polysilicon film. The first electrode, a dielectric film formed on the surface of the first electrode, and a second electrode form capacitor 11 in the memory cell. An antifuse 12 with the same configuration as capacitor 11 is formed in the semiconductor memory device. Because there is no need to use an additional film, the manufacturing cost is low, and antifuse 12 can be easily arranged. It is also possible to form antifuse 13 by forming instead of depositing the second polysilicon film 39 on the surface of the first polysilicon film 39.

Abstract: A contact and method of forming a contact. A layer of titanium (112) is deposited. Then, a RTP anneal is performed to react the titanium layer (112) with underlying silicon (112) to form a silicide layer (114). After the RTP anneal, a layer of tungsten-nitride (116) is deposited as a barrier layer. The metal interconnect layer (118) is then formed over the tungsten-nitride layer (116).

Abstract: An antifuse element for a semiconductor device, comprising a bottom electrode made from a conductive material containing a refractory metal and a top electrode made from a conductive material containing a fusible metal. The fusible metal is Al, Al alloy, Cu or Ag. The Al alloy contains at least Si, Cu, Sc, Pd, Ti, Ta or Nb. The refractory metal is Ti, Zr, Hf, V, Nb, Ta, Cr, Mo or W. Silicides are most preferable as the refractory metal. The semiconductor device is programmed by making the top electrode negative or positive and by applying a breakdown voltage between the bottom and top electrodes so as to break down an antifuse material layer, thereby obtaining a filament. The filament is made from the fusible metal from the top electrode and the refractory metal from the bottom electrode. Thus, the filament has a low resistance, and a good EM resistance.

Abstract: Antifuse elements for a semiconductor device comprise a bottom electrode, a top electrode, and an antifuse material layer. The bottom electrode is formed of a conductive material having an amorphous structure. The conductive material contains such elements as W, Ti, or a compound thereof. Since there is no grain boundary on the surface of the bottom electrode having an amorphous structure, any sharp protrusions are diminished to promote the smoothness. The antifuse material film is mounted on the surface of the bottom electrode. The bottom electrode contains such elements having an excellent EM resistance as W, Mo. These elements are also to be contained in a filament which is formed after programming.

Abstract: An antifuse element provided on a semiconductor device comprises a bottom electrode, an antifuse material layer, and a top electrode. At least the uppermost portion of the bottom electrode is made of metallic silicide in which the metal composition ratio is set to greater than the stoichiometry composition ratio. The metallic silicide is obtained by silicidizing the metal at a temperature of 400.degree.-700.degree. C. The crystal orientation of the thus formed metallic silicide is at random, and therefore the surface of the bottom electrode made of metallic silicide becomes flatter and smoother. The metal component of the metallic silicide is effectively used in the forming of the filament when a breakdown voltage is applied to the selected electrodes for an electrical connection.