Patents by Inventor Yoshinori Kusuda
Yoshinori Kusuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11442494Abstract: Apparatus and methods for controlling a clock signal are provided. In certain embodiments, a semiconductor die includes a core circuit and a clock interface circuit that provides a clock signal to the core circuit. The clock interface circuit includes an oscillator for generating an oscillator signal, and a comparator for controlling operation of the clock interface circuit in a selected clock control mode based on comparing an electrical characteristic of the clock interface pin to a comparison threshold. The selected clock control mode is chosen from a first clock control mode in which the clock interface circuit generates the clock signal based on an input clock signal received on a clock interface pin, or a second clock control mode in which the clock interface circuit generates the clock signal based on the oscillator signal.Type: GrantFiled: June 8, 2020Date of Patent: September 13, 2022Assignee: Analog Devices, Inc.Inventor: Yoshinori Kusuda
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Patent number: 11251760Abstract: Amplifiers with wide input range and low input capacitance are provided. In certain embodiments, an amplifier input stage includes a pair of input terminals, a pair of n-type input transistors, a first pair of isolation switches connected between the input terminals and the n-type input transistors, a pair of p-type input transistors, and a second pair of isolation switches connected between the input terminals and the p-type input transistors. The amplifier input stage further includes a control circuit that determines whether to use the n-type input transistors and/or the p-type input transistors for amplification based on a detected common-mode voltage of the input terminals. The control circuit opens the first pair of isolation switches to decouple the input terminals from the n-type input transistors when unused, and opens the second pair of isolation switches to decouple the input terminals from the p-type input transistors when unused.Type: GrantFiled: May 20, 2020Date of Patent: February 15, 2022Assignee: Analog Devices, Inc.Inventor: Yoshinori Kusuda
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Patent number: 11228291Abstract: Chopper amplifiers with multiple sensing points for correcting input offset are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected in a cascade along a signal path. The chopper amplifier further incudes a multi-point sensed offset correction circuit that generates an input offset compensation signal based on sensing a signal level of the signal path at multiple signal points. Furthermore, the multi-point sensed offset correction circuit injects the input offset compensation signal into the signal path to thereby compensate for input offset voltage of the amplification circuit while suppressing output chopping ripple from arising.Type: GrantFiled: May 22, 2020Date of Patent: January 18, 2022Assignee: Analog Devices, Inc.Inventor: Yoshinori Kusuda
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Publication number: 20210382517Abstract: Apparatus and methods for controlling a clock signal are provided. In certain embodiments, a semiconductor die includes a core circuit and a clock interface circuit that provides a clock signal to the core circuit. The clock interface circuit includes an oscillator for generating an oscillator signal, and a comparator for controlling operation of the clock interface circuit in a selected clock control mode based on comparing an electrical characteristic of the clock interface pin to a comparison threshold. The selected clock control mode is chosen from a first clock control mode in which the clock interface circuit generates the clock signal based on an input clock signal received on a clock interface pin, or a second clock control mode in which the clock interface circuit generates the clock signal based on the oscillator signal.Type: ApplicationFiled: June 8, 2020Publication date: December 9, 2021Inventor: Yoshinori Kusuda
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Publication number: 20210384870Abstract: Apparatus and methods for amplifier input-overvoltage protection with low leakage current are provided herein. In certain embodiments, amplifier input circuitry for an amplifier includes a pair of input terminals, a pair of input transistors each having a control input (for instance, a transistor gate), a pair of protection transistors each connected between one of the input terminals and the control input of a corresponding one of the input transistors, and a bidirectional clamp connected between the control inputs of the input transistors. Implementing the amplifier input circuitry in this manner provides a number of advantages including, but not limited to, robust protection against input overvoltage and low input-leakage current.Type: ApplicationFiled: June 5, 2020Publication date: December 9, 2021Inventors: Arthur J. Kalb, Yoshinori Kusuda
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Publication number: 20210367569Abstract: Chopper amplifiers with multiple sensing points for correcting input offset are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected in a cascade along a signal path. The chopper amplifier further incudes a multi-point sensed offset correction circuit that generates an input offset compensation signal based on sensing a signal level of the signal path at multiple signal points. Furthermore, the multi-point sensed offset correction circuit injects the input offset compensation signal into the signal path to thereby compensate for input offset voltage of the amplification circuit while suppressing output chopping ripple from arising.Type: ApplicationFiled: May 22, 2020Publication date: November 25, 2021Inventor: Yoshinori Kusuda
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Publication number: 20210367572Abstract: Amplifiers with wide input range and low input capacitance are provided. In certain embodiments, an amplifier input stage includes a pair of input terminals, a pair of n-type input transistors, a first pair of isolation switches connected between the input terminals and the n-type input transistors, a pair of p-type input transistors, and a second pair of isolation switches connected between the input terminals and the p-type input transistors. The amplifier input stage further includes a control circuit that determines whether to use the n-type input transistors and/or the p-type input transistors for amplification based on a detected common-mode voltage of the input terminals. The control circuit opens the first pair of isolation switches to decouple the input terminals from the n-type input transistors when unused, and opens the second pair of isolation switches to decouple the input terminals from the p-type input transistors when unused.Type: ApplicationFiled: May 20, 2020Publication date: November 25, 2021Inventor: Yoshinori Kusuda
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Patent number: 11139789Abstract: Chopper amplifiers with tracking of multiple input offsets are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected along a signal path. The amplification circuit includes two or more pairs of input transistors, from which a control circuit chooses a selected pair of input transistors to amplify an input signal. The chopper amplifier further incudes an offset correction circuit that senses the signal path to generate an input offset compensation signal for the amplification circuit. Furthermore, the offset correction circuit separately tracks an input offset of each of the two or more pairs of input transistors.Type: GrantFiled: June 5, 2020Date of Patent: October 5, 2021Assignee: Analog Devices, Inc.Inventor: Yoshinori Kusuda
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Patent number: 10972063Abstract: Amplifier systems for measuring a wide range of current are provided herein. In certain embodiments, an amplifier system includes a controllable sensing circuit, a first amplifier including an output configured to drive a device under test (DUT) through the controllable sensing circuit, and a second amplifier including an input coupled to the controllable sensing circuit and operable to generate a measurement signal indicating an amount of measured current of the DUT. The amplifier system further includes a control circuit operable to control a configuration or mode of the controllable sensing circuit suitable for a particular type of DUT.Type: GrantFiled: October 30, 2018Date of Patent: April 6, 2021Assignee: Analog Devices Global Unlimited CompanyInventors: Simon Nicholas Fiedler Basilico, Yoshinori Kusuda, Camille Louis Huin, Gary Carreau, Gustavo Castro, Sean Patrick Kowalik, Michael C. W. Coln, Scott Andrew Hunt
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Patent number: 10804859Abstract: Transimpedance amplifiers with feedforward current are provided herein. In certain embodiments, an amplifier system includes a transimpedance amplifier that amplifies an input current received at an input to generate an output voltage at an output. The amplifier system further includes a controllable current source that is coupled to the output of the transimpedance amplifier, and operable to provide a feedforward current that changes in relation to the input current of the transimpedance amplifier. By providing a feedforward current in this manner, gain and speed performance of the transimpedance amplifier is enhanced.Type: GrantFiled: December 10, 2018Date of Patent: October 13, 2020Assignee: Analog Devices, Inc.Inventors: Simon Nicholas Fiedler Basilico, Yoshinori Kusuda
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Patent number: 10756676Abstract: Amplifier systems for driving a wide range of loads are provided herein. In certain embodiments, an amplifier system includes a voltage output amplifier and a current output amplifier that are electrically coupled in parallel with one another between an input terminal and an output terminal. The amplifier system further includes a control circuit operable to control whether or not the voltage output amplifier and/or current output amplifier drive the output terminal.Type: GrantFiled: October 17, 2018Date of Patent: August 25, 2020Assignee: Analog Devices Global Unlimited CompanyInventors: Yoshinori Kusuda, Simon Nicholas Fiedler Basilico, Sean Patrick Kowalik, Joseph Leandro Balais Peje, Michael C. W. Coln
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Publication number: 20200186098Abstract: Transimpedance amplifiers with feedforward current are provided herein. In certain embodiments, an amplifier system includes a transimpedance amplifier that amplifies an input current received at an input to generate an output voltage at an output. The amplifier system further includes a controllable current source that is coupled to the output of the transimpedance amplifier, and operable to provide a feedforward current that changes in relation to the input current of the transimpedance amplifier. By providing a feedforward current in this manner, gain and speed performance of the transimpedance amplifier is enhanced.Type: ApplicationFiled: December 10, 2018Publication date: June 11, 2020Inventors: Simon Nicholas Fiedler Basilico, Yoshinori Kusuda
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Publication number: 20200127610Abstract: Amplifier systems for driving a wide range of loads are provided herein. In certain embodiments, an amplifier system includes a voltage output amplifier and a current output amplifier that are electrically coupled in parallel with one another between an input terminal and an output terminal. The amplifier system further includes a control circuit operable to control whether or not the voltage output amplifier and/or current output amplifier drive the output terminal.Type: ApplicationFiled: October 17, 2018Publication date: April 23, 2020Inventors: Yoshinori Kusuda, Simon Nicholas Fiedler Basilico, Sean Patrick Kowalik, Joseph Leandro Balais Peje, Michael C. W. Coln
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Publication number: 20200127624Abstract: Amplifier systems for measuring a wide range of current are provided herein. In certain embodiments, an amplifier system includes a controllable sensing circuit, a first amplifier including an output configured to drive a device under test (DUT) through the controllable sensing circuit, and a second amplifier including an input coupled to the controllable sensing circuit and operable to generate a measurement signal indicating an amount of measured current of the DUT. The amplifier system further includes a control circuit operable to control a configuration or mode of the controllable sensing circuit suitable for a particular type of DUT.Type: ApplicationFiled: October 30, 2018Publication date: April 23, 2020Inventors: Simon Nicholas Fiedler Basilico, Yoshinori Kusuda, Camille Louis Huin, Gary Carreau, Gustavo Castro, Sean Patrick Kowalik, Michael C. W. Coln, Scott Andrew Hunt
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Patent number: 10622980Abstract: Apparatus and methods for setting and clamping a node voltage are provided herein. In certain embodiments, a node control circuit includes a setting circuit for setting a voltage of a node based on a set signal. The node control circuit further includes at least one of a p-type follower clamp for clamping the node to an upper voltage limit based on an upper clamping control signal or an n-type follower clamp for clamping the node to a lower voltage limit based on a lower clamping control signal. When including both clamps, the node operates with a voltage level set by the set signal, but saturates at the upper voltage limit established by the upper clamping control signal and at the lower voltage limit established by the lower clamping control signal.Type: GrantFiled: November 9, 2018Date of Patent: April 14, 2020Assignee: Analog Devices, Inc.Inventors: Yoshinori Kusuda, Gustavo Castro, Scott Andrew Hunt, Sean Patrick Kowalik, Simon Nicholas Fiedler Basilico
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Patent number: 9735736Abstract: Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.Type: GrantFiled: January 12, 2016Date of Patent: August 15, 2017Assignee: Analog Devices, Inc.Inventor: Yoshinori Kusuda
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Patent number: 9496833Abstract: Apparatus and methods for multi-channel autozero and chopper amplifiers are provided herein. In certain configurations, an amplifier includes at least three channels that operate using multiple phases, including at least a non-inverting chop phase, an inverting chop phase, and an autozero phase. The amplifier further includes an autozero and chopping timing control circuit, which at least partially interleaves or staggers timing of the channels' phases. For example, in certain configurations, when one or more of the channels are being autozeroed at a certain time instance, at least some of the remaining channels operate in the non-inverting chop phase or the inverting chop phase.Type: GrantFiled: April 28, 2014Date of Patent: November 15, 2016Assignee: ANALOG DEVICES, INC.Inventor: Yoshinori Kusuda
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Publication number: 20160126898Abstract: Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.Type: ApplicationFiled: January 12, 2016Publication date: May 5, 2016Inventor: Yoshinori Kusuda
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Patent number: 9246484Abstract: Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.Type: GrantFiled: March 7, 2014Date of Patent: January 26, 2016Assignee: Analog Devices, Inc.Inventor: Yoshinori Kusuda
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Publication number: 20150288336Abstract: Apparatus and methods for multi-channel autozero and chopper amplifiers are provided herein. In certain configurations, an amplifier includes at least three channels that operate using multiple phases, including at least a non-inverting chop phase, an inverting chop phase, and an autozero phase. The amplifier further includes an autozero and chopping timing control circuit, which at least partially interleaves or staggers timing of the channels' phases. For example, in certain configurations, when one or more of the channels are being autozeroed at a certain time instance, at least some of the remaining channels operate in the non-inverting chop phase or the inverting chop phase.Type: ApplicationFiled: April 28, 2014Publication date: October 8, 2015Applicant: Analog Devices, Inc.Inventor: Yoshinori Kusuda