Patents by Inventor Yoshitaka Yamamoto

Yoshitaka Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8785926
    Abstract: The semiconductor conductor device includes a gate electrode 106, an oxide semiconductor film 110, a source electrode 114a and a drain electrode 114b, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface 214a of the source electrode and a second side surface 214b of the drain electrode opposite to the first side surface 214a. The oxide semiconductor film has a side surface which overlaps with the gate electrode, which has a first high resistance region positioned between a first region 206a that is the nearest to one end 314a of the first side surface 214a and a second region 206b that is the nearest to one end 314b of the second side surface 214b. The first high resistance region has a corrugated side surface or the like.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: July 22, 2014
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Masatoshi Yokoyama, Tsutomu Murakawa, Kenichi Okazaki, Masayuki Sakakura, Takuya Matsuo, Yosuke Kanzaki, Hiroshi Matsukizono, Yoshitaka Yamamoto
  • Patent number: 8772752
    Abstract: An object is to prevent light leakage caused due to misregistration even when the width of a black matrix layer is not expanded to a designed value or larger. One embodiment of the present invention is a semiconductor device including a single-gate thin film transistor in which a first semiconductor layer is sandwiched between a bottom-gate electrode and a first black matrix layer. The first semiconductor layer and the first black matrix layer overlap with each other.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: July 8, 2014
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Hidekazu Miyairi, Atsushi Hirose, Yoshitaka Yamamoto, Tomohiro Kimura
  • Publication number: 20140021466
    Abstract: A semiconductor device includes a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film in contact with the gate insulating film and including a channel formation region which overlaps with the gate electrode; a source electrode and a drain electrode over the oxide semiconductor film; and an oxide insulating film over the oxide semiconductor film, the source electrode, and the drain electrode. The source electrode and the drain electrode each include a first metal film having an end portion at the end of the channel formation region, a second metal film over the first metal film and containing copper, and a third metal film over the second metal film. The second metal film is formed on the inner side than the end portion of the first metal film.
    Type: Application
    Filed: July 9, 2013
    Publication date: January 23, 2014
    Inventors: Shunpei YAMAZAKI, Naoya SAKAMOTO, Takahiro SATO, Shunsuke KOSHIOKA, Takayuki CHO, Yoshitaka YAMAMOTO, Takuya MATSUO, Hiroshi MATSUKIZONO, Yosuke KANZAKI
  • Publication number: 20130270555
    Abstract: An object is to suppress conducting-mode failures of a transistor that uses an oxide semiconductor film and has a short channel length. A semiconductor device includes a gate electrode 304, a gate insulating film 306 formed over the gate electrode, an oxide semiconductor film 308 over the gate insulating film, and a source electrode 310a and a drain electrode 310b formed over the oxide semiconductor film. The channel length L of the oxide semiconductor film is more than or equal to 1 ?m and less than or equal to 50 ?m. The oxide semiconductor film has a peak at a rotation angle 2? in the vicinity of 31° in X-ray diffraction measurement.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 17, 2013
    Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kenichi Okazaki, Masatoshi Yokoyama, Masayuki Sakakura, Yukinori Shima, Yosuke Kanzaki, Hiroshi Matsukizono, Takuya Matsuo, Yoshitaka Yamamoto
  • Publication number: 20130270554
    Abstract: The semiconductor conductor device includes a gate electrode 106, an oxide semiconductor film 110, a source electrode 114a and a drain electrode 114b, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface 214a of the source electrode and a second side surface 214b of the drain electrode opposite to the first side surface 214a. The oxide semiconductor film has a side surface which overlaps with the gate electrode, which has a first high resistance region positioned between a first region 206a that is the nearest to one end 314a of the first side surface 214a and a second region 206b that is the nearest to one end 314b of the second side surface 214b. The first high resistance region has a corrugated side surface or the like.
    Type: Application
    Filed: April 11, 2013
    Publication date: October 17, 2013
    Inventors: Masatoshi YOKOYAMA, Tsutomu MURAKAWA, Kenichi OKAZAKI, Masayuki SAKAKURA, Takuya MATSUO, Yosuke KANZAKI, Hiroshi MATSUKIZONO, Yoshitaka YAMAMOTO
  • Publication number: 20130270553
    Abstract: Provided is a semiconductor device in which generation of a parasitic channel in an end region of an oxide semiconductor film is suppressed. The semiconductor device includes a gate electrode, an oxide semiconductor film, a source electrode and a drain electrode, and a channel region formed in the oxide semiconductor film. The channel region is formed between a first side surface of the source electrode and a second side surface of the drain electrode opposite to the first side surface. The oxide semiconductor film has an end region which does not overlap with the gate electrode. The end region which does not overlap with the gate electrode is positioned between a first region that is the nearest to one end of the first side surface and a second region that is the nearest to one end of the second side surface.
    Type: Application
    Filed: April 11, 2013
    Publication date: October 17, 2013
    Inventors: Masatoshi YOKOYAMA, Tsutomu MURAKAWA, Kenichi OKAZAKI, Masayuki SAKAKURA, Takuya MATSUO, Akihiro ODA, Shigeyasu MORI, Yoshitaka YAMAMOTO
  • Publication number: 20130266843
    Abstract: The present invention provides a positive electrode for a non-aqueous electrolyte secondary battery in which the charge/discharge rate of a secondary battery is increased by increasing the discharge/discharge rate of the positive electrode as a result of increasing the rate of incorporation and release of lithium ions in olivine-type phosphorous complex compound particles, a non-aqueous electrolyte secondary battery provided with this positive electrode for a non-aqueous electrolyte secondary battery, and a battery module provided with this non-aqueous electrolyte secondary battery.
    Type: Application
    Filed: December 14, 2011
    Publication date: October 10, 2013
    Applicants: SUMITOMO OSAKA CEMENT CO., LTD., ELIIY POWER CO., LTD.
    Inventors: Tomitaro Hara, Takao Fukunaga, Takayasu Iguchi, Takao Kitagawa, Yoshitaka Yamamoto
  • Publication number: 20130228774
    Abstract: To inhibit a metal element contained in a glass substrate from being diffused into a gate insulating film or an oxide semiconductor film. A semiconductor device includes a glass substrate, a base insulating film formed using metal oxide over the glass substrate, a gate electrode formed over the base insulating film, a gate insulating film formed over the gate electrode, an oxide semiconductor film which is formed over the gate insulating film and overlapping with the gate electrode, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In a region of the base insulating film that is present in a range of 3 nm or less from a surface of the base insulating film, the concentration of a metal element contained in the glass substrate is less than or equal to 1×1018 atoms/cm3.
    Type: Application
    Filed: February 26, 2013
    Publication date: September 5, 2013
    Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kenichi OKAZAKI, Takuya MATSUO, Yoshitaka YAMAMOTO, Hiroshi MATSUKIZONO, Yosuke KANZAKI
  • Patent number: 8426295
    Abstract: To provide a manufacturing method of a microcrystalline silicon film having both high crystallinity and high film density. In the manufacturing method of a microcrystalline silicon film according to the present invention, a first microcrystalline silicon film that includes mixed phase grains is formed over an insulating film under a first condition, and a second microcrystalline silicon film is formed thereover under a second condition. The first condition and the second condition are a condition in which a deposition gas containing silicon and a gas containing hydrogen are used as a first source gas and a second source gas. The first source gas is supplied under the first condition in such a manner that supply of a first gas and supply of a second gas are alternately performed.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: April 23, 2013
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Ryu Komatsu, Yasuhiro Jinbo, Hidekazu Miyairi, Yoshitaka Yamamoto
  • Publication number: 20130082247
    Abstract: To provide a light-emitting device which can emit bright light without increasing the projected area of a light-emitting element and be manufactured with high yield. A light-emitting device of one embodiment of the present invention includes a plurality of projections; a first electrode formed along the plurality of projections; a layer containing a light-emitting organic compound formed along the plurality of projections and over the first electrode; and a second electrode formed along the plurality of projections and over the layer containing a light-emitting organic compound. Further, the plurality of projections each have a bottom surface having a side in contact with a bottom surface of an adjacent projection; a plurality of side surfaces each having a certain angle greater than 0° and less than or equal to 80° with respect to the bottom surface; and a vertex having a first continuously curved surface.
    Type: Application
    Filed: September 26, 2012
    Publication date: April 4, 2013
    Inventors: Takuya Kawata, Hisao Ikeda, Manabu Niboshi, Seiichi Mitsui, Yoshitaka Yamamoto
  • Patent number: 8344297
    Abstract: Problem to provide a container for an electromagnetic cooker which can be heated corresponding to impedance check frequency which differs depending on a manufacturer of an electromagnetic cooker or the like, can properly and easily set a heat generation characteristic, is excellent in marketability, configuration in use, disposability, handiness in cooking and the like, is suitable for retort foods, instant foods and the like, and exhibits high heating efficiency, means for resolution a container for an electromagnetic cooker includes a container body made of a non-conductive material and a conductive layer in a bottom portion of the container, wherein the ratio of resistance change (R?R0)/R0 of the conductive layer with respect to the impedance check frequency of a heating coil is set to 5.3 or more, and a ratio of inductance change (L?L0)/L0 of the conductive layer with respect to the impedance check frequency of the heating coil is set to ?0.17 or less. Here, R indicates the high-frequency resistance (.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: January 1, 2013
    Assignee: Toyo Seikan Kaisha, Ltd.
    Inventors: Hagino Fujita, Yoshitaka Yamamoto, Takayuki Aikawa, Takashi Miura, Hideo Kurashima
  • Publication number: 20120299074
    Abstract: A semiconductor device in which light leakage due to misalignment is prevented even when a black matrix layer is not expanded to a designed value or more is provided. In a semiconductor device including a dual-gate thin film transistor in which a semiconductor layer is sandwiched between a bottom gate electrode and a top gate electrode, the top gate electrode is formed of a first black matrix layer, and the top gate electrode overlaps with the semiconductor layer.
    Type: Application
    Filed: May 22, 2012
    Publication date: November 29, 2012
    Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Atsushi HIROSE, Hidekazu MIYAIRI, Yoshitaka YAMAMOTO, Tomohiro KIMURA
  • Publication number: 20120298997
    Abstract: One embodiment of the present invention is a semiconductor device which includes a gate electrode; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed over the gate insulating film and placed above the gate electrode; a second insulating film formed over the semiconductor layer; a first insulating film formed over a top surface and a side surface of the second insulating film, a side surface of the semiconductor layer, and the gate insulating film; silicon layers and which are formed over the first insulating film and electrically connected to the semiconductor layer; and a source electrode and a drain electrode which are formed over the silicon layers. The source electrode and the drain electrode are electrically separated from each other over the first insulating film. The semiconductor layer is not in contact with each of the source electrode and the drain electrode.
    Type: Application
    Filed: May 17, 2012
    Publication date: November 29, 2012
    Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hidekazu MIYAIRI, Koji DAIRIKI, Yasuhiro JINBO, Tomohiro KIMURA, Yoshitaka YAMAMOTO
  • Publication number: 20120298999
    Abstract: An object is to reduce off-state leakage current between a source electrode and a drain electrode. One embodiment of the present invention is a semiconductor device including a gate electrode, gate insulating films and formed to cover the gate electrode, an active layer formed over the gate insulating films and located above the gate electrode, silicon layers and formed over side surfaces of the active layer and the gate insulating films, and a source electrode and a drain electrode formed over the silicon layers. The active layer is not in contact with each of the source electrode and the drain electrode.
    Type: Application
    Filed: May 22, 2012
    Publication date: November 29, 2012
    Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuhiro JINBO, Koji DAIRIKI, Hidekazu MIYAIRI, Tomohiro KIMURA, Yoshitaka YAMAMOTO
  • Publication number: 20120299006
    Abstract: An object is to prevent light leakage caused due to misregistration even when the width of a black matrix layer is not expanded to a designed value or larger. One embodiment of the present invention is a semiconductor device including a single-gate thin film transistor in which a first semiconductor layer is sandwiched between a bottom-gate electrode and a first black matrix layer. The first semiconductor layer and the first black matrix layer overlap with each other.
    Type: Application
    Filed: May 22, 2012
    Publication date: November 29, 2012
    Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hidekazu MIYAIRI, Atsushi HIROSE, Yoshitaka YAMAMOTO, Tomohiro KIMURA
  • Publication number: 20120270383
    Abstract: Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b?2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.
    Type: Application
    Filed: March 29, 2012
    Publication date: October 25, 2012
    Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kanta ABE, Hidekazu MIYAIRI, Tetsuhiro TANAKA, Takashi IENAGA, Yoshitaka YAMAMOTO
  • Publication number: 20120237669
    Abstract: A successive deposition apparatus by which a reduction in the luminous efficiency of a light-emitting element can be suppressed even in high-speed deposition of a light-emitting layer thereof is provided. The apparatus includes: a second deposition chamber; a third deposition chamber coupled to the second deposition chamber; a transfer unit for transferring a substrate from second deposition chamber to third deposition chamber; plural third deposition sources arranged in the substrate transfer direction in the second deposition chamber; and a fourth and fifth deposition sources alternately arranged in the transfer direction in the third deposition chamber. In the third deposition chamber, the fourth deposition source is placed nearest to the second deposition source. The fourth deposition source contains a host material, and the fifth deposition source contains a dopant material. The HOMO level of a material of the third deposition source is adjusted to that of the host material.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 20, 2012
    Inventors: Satoshi SEO, Hisao IKEDA, Manabu NIBOSHI, Katsunori MITSUHASHI, Seiichi MITSUI, Yoshitaka YAMAMOTO
  • Publication number: 20120100675
    Abstract: To provide a manufacturing method of a microcrystalline silicon film having both high crystallinity and high film density. In the manufacturing method of a microcrystalline silicon film according to the present invention, a first microcrystalline silicon film that includes mixed phase grains is formed over an insulating film under a first condition, and a second microcrystalline silicon film is formed thereover under a second condition. The first condition and the second condition are a condition in which a deposition gas containing silicon and a gas containing hydrogen are used as a first source gas and a second source gas. The first source gas is supplied under the first condition in such a manner that supply of a first gas and supply of a second gas are alternately performed.
    Type: Application
    Filed: October 6, 2011
    Publication date: April 26, 2012
    Applicants: SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Ryu KOMATSU, Yasuhiro JINBO, Hidekazu MIYAIRI, Yoshitaka YAMAMOTO
  • Publication number: 20120068202
    Abstract: The present invention provides an active matrix substrate and a method of manufacturing the same by decreasing the number of photolithographic processes to reduce the manufacturing cost. The invention also provides a display device using an active matrix substrate manufactured by said manufacturing method. In a process for preparing pixels on an active substrate, which constitutes a display device, a bank or an etching pattern is formed by performing half-tone exposure on a photo resist film or on a black color photo resist film where an active matrix and a display electrode are prepared by coating, and an insulator film is fabricated, and a transparent conductive film and a color filter are prepared by inkjet method.
    Type: Application
    Filed: March 12, 2010
    Publication date: March 22, 2012
    Applicants: SEIKO EPSON CORPORATION, SHARP KABUSHIKI KAISHA
    Inventors: Hiroshi Saito, Yoichi Noda, Yoshitaka Yamamoto
  • Patent number: 7985476
    Abstract: The present invention provides a transparent inorganic oxide dispersion which makes it possible to improve the refractive index and mechanical characteristics and to maintain transparency by modifying the surface of inorganic oxide particles with a surface modifier having one or more reactive functional groups; and an inorganic oxide particle-containing resin composition in which the transparent inorganic oxide dispersion and a resin are compositely integrated by the polymerization reaction, a composition for sealing a light emitting element, a light emitting element, and a method for producing an inorganic oxide particle-containing resin composition; and a hard coat film which has high transparency and makes it possible to improve a refractive index and tenacity, an optical functional film, an optical lens and an optical component.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: July 26, 2011
    Assignee: Sumitomo Osaka Cement Co., Ltd.
    Inventors: Yasuyuki Kurino, Toru Kinoshita, Naoki Takamiya, Yoshitaka Yamamoto, Tsuyoshi Kawase, Yoshizumi Ishikawa, Yoichi Sato, Ryosuke Nakamura, Yuko Katsube