Patents by Inventor Yoshiyuki Saito

Yoshiyuki Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070252659
    Abstract: In a filter circuit (1), a common mode choke (2) and a normal mode choke (3) have extremely high and low impedances, respectively, for common mode signals received through two input terminals (1a and 1b). The chokes have the opposite impedance characteristics for differential signals. In particular, the difference in impedance is large. Furthermore, the normal mode choke (3) is installed as a previous stage of the common mode choke (2). Accordingly, common mode noises which enter the two input terminals (1a and 1b) penetrate the normal mode choke (3), but neither penetrate the common mode choke (2) nor are reflected from the common mode choke (2). In particular, common mode currents flow through the normal mode choke (3) but do not flow through the common mode choke (2).
    Type: Application
    Filed: August 1, 2005
    Publication date: November 1, 2007
    Inventors: Hiroshi Suenaga, Osamu Shibata, Yoshiyuki Saito, Noboru Katta, Yuji Mizuguchi
  • Patent number: 7272856
    Abstract: A decryption device includes: an internal-key storage section for storing an internal-key; a content-key storage section for storing a content-key; a determination section for determining whether or not a value of the content-key storage section in its initial state and a current value of the content-key storage section are different; and an operation section, the operation section including a first decrypting section which, when an encrypted content-key is input to the operation section, decrypts the encrypted content-key using the internal-key so as to obtain a content-key and stores the content-key in the content-key storage section, and a second decrypting section which, when an encrypted content is input to the operation section and the determination section determines that the value of the content-key storage section in its initial state and the current value of the content-key storage section are different, decrypts the encrypted content using the current value of the content-key storage section as a c
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: September 18, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Osamu Shibata, Taihei Yugawa, Tsutomu Sekibe, Yoshiyuki Saito, Toshihiko Otake
  • Patent number: 7258549
    Abstract: A connection member can be produced without a via-forming step. The connection member includes an insulating substrate which has an upper surface, a lower surface opposed to the upper surface, and a side surface which connects these surfaces; and at least one wiring which extends from the upper surface to the lower surface through the side surface.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: August 21, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiyuki Asahi, Seiji Karashima, Takashi Ichiryu, Seiichi Nakatani, Tousaku Nishiyama, Koichi Hirano, Osamu Shibata, Takeshi Nakayama, Yoshiyuki Saito
  • Patent number: 7240309
    Abstract: In a system that provides CAD layout-design information, by having the user acquire information such as circuit design or CAD layout data registered in a database, the user can analyze the acquired information, so there is a possibility that circuit-design or circuit-board-design know-how could be leaked. With this invention, a characteristic-parameter-extraction means extracts characteristic parameters from a position where there is a possibility of the occurrence of poor electrical characteristics due to an influence of the CAD layout of the input CAD layout data. A correction-determination means determines whether or not it is necessary to correct the layout by comparing the characteristic parameters and correction-determination standards that correspond to poor electrical characteristics read from a database. This makes it possible to check the electrical characteristics of the CAD layout without making available to the user the correction-determination standards or determination method.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: July 3, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshiyuki Saito, Tokuzo Kiyohara
  • Patent number: 7233889
    Abstract: A method of evaluating noise immunity of a semiconductor device is provided. An actual circuit including the semiconductor device is represented by an equivalent circuit which has a target equivalent circuit, a noise source equivalent circuit, and an external equivalent circuit connected in parallel. The target equivalent circuit represents the semiconductor device. The noise source equivalent circuit represents a noise source outside the semiconductor device, and supplies noise to the target equivalent circuit. The external equivalent circuit represents a circuit outside the semiconductor device. The noise immunity is evaluated based on a voltage or current which arises in the target equivalent circuit by the noise. In this way, the immunity of the semiconductor device against extraneous noise can be evaluated in consideration of the effects of the circuitry outside the semiconductor device.
    Type: Grant
    Filed: October 23, 2002
    Date of Patent: June 19, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiji Takahashi, Yoshiyuki Saito, Yukihiro Fukumoto, Hiroshi Benno
  • Publication number: 20070124926
    Abstract: In a circuit board according to the present invention, on a substrate, in at least a portion of a phase change layer including a phase change material that is capable of changing alternately between an electrically insulating state and an electrically conductive state, a conductive path is formed that has been put into an electrically conductive state by a phase change in the phase change layer, wherein the phase change material includes a chalcogenide semiconductor, changes between the electrically insulating state and the electrically conductive state by irradiation of laser light, goes into the electrically conductive state in a crystalline phase, and goes into the electrically insulating state in an amorphous phase.
    Type: Application
    Filed: February 13, 2007
    Publication date: June 7, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yukihiro Ishimaru, Seiichi Nakatani, Yoshiyuki Saito
  • Patent number: 7221535
    Abstract: A magnetic recording and reproduction apparatus includes a main chassis having a rotatable head cylinder provided thereon; and a sub chassis on which a tape cassette is mountable. The sub chassis is movable with respect to the main chassis between a tape cassette mountable position and a tape pull-out completion position, and the tape cassette mountable position is a position at which the tape cassette is mountable on the sub chassis and the tape pull-out completion position is a position at which information recording to and information reproduction from the tape, which has been pulled out from the tape cassette and has been wound around the rotatable head cylinder, can be performed. A portion of the main chassis along a forward end thereof is cut out toward the rotatable head cylinder.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: May 22, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akio Konishi, Koichiro Hirabayashi, Yoshiyuki Saito, Hiroshi Kurumatani
  • Patent number: 7212028
    Abstract: First and second transmission lines and are connected to each other in series. A first terminator is connected to the first transmission line in parallel, and is provided externally of a semiconductor device. A second terminator is connected to the second transmission line in parallel, and is provided inside the semiconductor device. The values of the first and second terminator are adjusted so that the combined resistance value of first and second terminator and the second transmission line matches with the impedance of the first transmission line. Impedance matching of the entire transmission line can be achieved with this simple construction, thus, a stable, high quality signal can be transmitted.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: May 1, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Osamu Shibata, Toru Iwata, Yoshiyuki Saito, Satoshi Takahashi, Wataru Itoh
  • Patent number: 7209316
    Abstract: A magnetic recording and reproduction apparatus includes a cylinder; a chassis section having the cylinder provided thereon; a tape pull-out member pulling out the magnetic tape; a positioning member having a ramp surface; and an urging section for urging the tape pull-out member. The first position is a position at which information recording to, and information reproduction from, the magnetic tape is possible. The tape pull-out member has a second surface facing the first surface. The tape pull-out member includes a projection provided on the second surface. The tape pull-out member is urged by the urging section such that the projection presses the ramp surface at the first position. A force received by the projection from the ramp surface, by the projection pressing the ramp surface, acts on the projection in a direction from the ramp surface toward the first surface.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: April 24, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akio Konishi, Yoshiyuki Saito, Takefumi Yanagihara
  • Patent number: 7170711
    Abstract: A magnetic recording and reproduction apparatus includes a main chassis having a cylinder provided thereon; a sub chassis on which a tape cassette is mountable; a plurality of tape pull-out members acting to pull out a tape from the tape cassette; and at least one arm for driving at least one tape pull-out member. The sub chassis is movable relative to the main chassis between a tape cassette mountable position and a tape pull-out completion positions. The main chassis includes at least one guide member for guiding the at least one tape pull-out member while the sub chassis moves between the above-mentioned two positions. The at least one arm is provided in the sub chassis, and drives the at least one tape pull-out member such that the member pulls out the tape while the sub chassis moves from the tape cassette mountable position to the tape pull-out completion position.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: January 30, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichiro Hirabayashi, Yoshiyuki Saito, Hiroshi Kurumatani
  • Patent number: 7164553
    Abstract: A magnetic recording and reproduction apparatus includes a main chassis having a rotatable head cylinder provided thereon; and a sub chassis on which a tape cassette is mountable. The sub chassis is movable relative to the main chassis. A pivotable body is provided on the main chassis. The pivotable body has a projection provided thereon. The projection is engaged with a cam groove in the sub chassis so as to pivot the pivotable body. Thus, the cam groove is restricted by the projection, so that the sub chassis moves with respect to the main chassis. The cam groove has a width substantially identical to the diameter of the projection. The cam groove includes first and second arc portions continuous with each other, and a straight portion continuous with the second arc portion. The first and second arc portions have identical radii, and are projected in opposite directions.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: January 16, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshiyuki Saito, Koichiro Hirabayashi, Hiroshi Kurumatani
  • Patent number: 7161762
    Abstract: A magnetic recording and reproduction apparatus includes a main chassis having a rotatable head cylinder provided thereon; a sub chassis on which a tape cassette is mountable; and a plurality of tape pull-out members acting so as to pull out a tape from the tape cassette. The sub chassis is movable with respect to the main chassis between a tape cassette mountable position and a tape pull-out completion position, and the tape cassette mountable position is the position at which the tape cassette is mountable on the sub chassis and the tape pull-out completion position is the position at which information recording to, and information reproduction from, the tape which has been pulled out from the tape cassette and wound around the rotatable head cylinder can be performed. All the plurality of tape pull-out members are mounted on the sub chassis.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: January 9, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koichiro Hirabayashi, Yoshiyuki Saito, Hiroshi Kurumatani
  • Publication number: 20060117883
    Abstract: Deep groove ball bearings are used as bearings supporting both side portions of a worm. In the first bearing on the side of a motor, the curvature radius of a raceway groove in an inner ring or the curvature radius of a raceway groove in an outer ring are set to a specific numerical range with respect to the diameter of a ball.
    Type: Application
    Filed: December 5, 2003
    Publication date: June 8, 2006
    Applicant: Koyo Seiko Co., Ltd.
    Inventors: Hirotaka Yasuda, Hirotsugu Kusano, Wataru Yamada, Yoshiyuki Saito, Shuzo Hirakushi
  • Publication number: 20060097748
    Abstract: A semiconductor device is disclosed in which resistance to the influence of external noise on internal power source network is improved. A semiconductor device operating at any predetermined frequency among a plurality thereof, and having power source networks for supplying power from a power source to internal functional units in the semiconductor device comprises switches, a storage unit, and a control unit. The switches are provided in the power source networks, and switch ON/OFF the supply of power from the power source to the functional units. In the storage unit are mapped and stored a plurality of predetermined operating frequencies and switching information designating an ON state or an OFF state for the switches. The control unit reads, from the storage, switching information corresponding to a current operating frequency, and controls the ON/OFF switching of the switches in accordance with the read switching information.
    Type: Application
    Filed: November 8, 2005
    Publication date: May 11, 2006
    Inventors: Takeshi Nakayama, Eiji Takahashi, Yoshiyuki Saito
  • Publication number: 20060071320
    Abstract: Fine-pitch first and second bonding pads are formed on a chip along its perimeter. The first bonding pads are formed at the peripheral parts on the chip, while the second bonding pads are formed inside the peripheral parts. An ESD protection circuit is connected to the first bonding pad, and an I/O circuit is connected to the second bonding pad. First and second bonding wires connect the first and second bonding pads to the same package pin, respectively. The second bonding wire is configured to be sufficiently longer than the first bonding wire, regardless of the pitch of the first bonding pads.
    Type: Application
    Filed: October 5, 2005
    Publication date: April 6, 2006
    Inventors: Osamu Shibata, Yoshiyuki Saito
  • Patent number: 7015575
    Abstract: According to LSI packages of the BGA type and the like, the number of source voltage supply terminals on an LSI package needs to be around the same as the number of power supply terminals on an LSI chip, in order to prevent the impact of high-frequency currents generated due to a switching operation in an internal circuit in the LSI chip. According to the present invention, however, at least two power supply terminals on an LSI chip are connected to one source voltage supply terminal on an LSI package. In addition, a capacitor element is embedded in a substrate forming the main body of the LSI package, and the capacitor element is provided between a source voltage supply terminal and an earth terminal.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: March 21, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Suenaga, Yoshiyuki Saito
  • Publication number: 20060050820
    Abstract: A signal receiver (11) receives an analog signal via a twisted pair cable (31). An A/D converter (12) converts the analog signal to a digital signal. A phase detection unit (14) detects the phase of the digital signal, and generates a reception timing signal. A transmission timing generation unit (15) controls, based on the reception timing signal, timing for a transmission processing unit (16) to output the digital signal such that the reception signal (point A) and a transmission signal (point D) are different in phase by a predetermined degree. The transmission processing unit (16) outputs, in accordance with the timing, a digital signal obtained by performing mapping on data inputted from a connection device (20). A D/A converter (17) converts the digital signal to an analog signal. A signal transmitter (18) transmits the analog signal via a twisted pair cable (32).
    Type: Application
    Filed: February 10, 2004
    Publication date: March 9, 2006
    Inventors: Hirotsugu Kawada, Yoshiyuki Saito, Osamu Shibata, Hiroshi Suenaga, Takahisa Sakai, Toshitomo Umei, Takashi Akita, Yuji Mizuguchi, Noboru Katta
  • Publication number: 20060036831
    Abstract: A parallel computation apparatus as a multiprocessor includes functional modules as a plurality of processors having an optical communication function and capable of mutually cooperating, and an optical transmission line interconnecting the plurality of processors. Among the plurality of functional modules, the first functional module having a first information processing capacity has a function of determining whether information processing of a first information processing amount can be completed based on the first information processing capacity, and outputting a second information processing amount obtained by subtracting an information processing amount based on the first information processing capacity from the first information processing amount to at least one of the other functional modules.
    Type: Application
    Filed: August 10, 2005
    Publication date: February 16, 2006
    Inventors: Seiji Karashima, Seiichi Nakatani, Yoshiyuki Saito
  • Publication number: 20050287871
    Abstract: A device, method, and program too facilitate the design of flexible printed circuit boards is disclosed which generates, as a prohibited space, a position assumed to be occupied by a part on an opposing printed circuit board when the printed circuit board is bent from a bend position. Design preparation of a bendable flexible printed circuit board can be efficiently checked by checking for the presence/absence of interference between parts and prohibited spaces.
    Type: Application
    Filed: June 21, 2005
    Publication date: December 29, 2005
    Inventors: Takeshi Nakayama, Shin-ichi Tanimoto, Yoshiyuki Saito
  • Publication number: 20050289269
    Abstract: A stacked device is disclosed which is easily manufactured while identifying a plurality of devices that are stacked in the stacked device. The stacked device includes a stack of a plurality of slave devices and a master device having identical terminal arrangements. Here, the master device includes command transmission unit configured to input an identification command to a terminal of an adjacent slave device.
    Type: Application
    Filed: June 10, 2005
    Publication date: December 29, 2005
    Inventors: Takeshi Nakayama, Eiji Takahashi, Yoshiyuki Saito, Yukihiro Ishimaru, Hideki Iwaki