Patents by Inventor Youichi Ashida
Youichi Ashida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11921449Abstract: A fixing apparatus includes a fixing belt, a slide member, an opposing member, and a retaining member. The retaining member includes, in a groove portion, a bottom surface portion that is in contact with an opposite surface of the slide member from a slide surface, a side surface portion that is formed on a downstream side of the groove portion in a conveyance direction and intersecting the bottom surface portion, and a continuous portion that is formed between the bottom surface portion and the side surface portion. The slide member includes an abutment portion configured to abut against the side surface portion at a position downstream from a downstream edge of the opposite surface when the slide member is slidden against the fixing belt such that the downstream edge of the opposite surface is positioned upstream from the continuous portion in the conveyance direction.Type: GrantFiled: February 16, 2023Date of Patent: March 5, 2024Assignee: CANON KABUSHIKI KAISHAInventors: Kenichi Tanaka, Youichi Chikugo, Hidekazu Tatezawa, Rikiya Takemasa, Takeshi Kozuma, Mikihiko Watanabe, Taku Ashida
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Patent number: 10916506Abstract: A semiconductor device includes a semiconductor substrate, an interlayer dielectric film, a plurality of pad parts, a wiring layer, and a surface protection film. The semiconductor substrate includes a semiconductor element on a surface of the semiconductor substrate. The interlayer dielectric film is disposed on the surface of the semiconductor substrate. The wiring layer is disposed in the interlayer dielectric film. The hard film is disposed opposite to the semiconductor substrate with respect to the interlayer dielectric film, and is harder than the interlayer dielectric film. The pad parts are disposed opposite to the interlayer dielectric film with respect to the hard film. The surface protection film is disposed in at least an opposing region where the pad parts oppose to each other. The surface protection film is a silicon nitride film or a silicon oxide film.Type: GrantFiled: March 18, 2019Date of Patent: February 9, 2021Assignee: DENSO CORPORATIONInventors: Youichi Ashida, Tsuyoshi Fujiwara
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Publication number: 20190214346Abstract: A semiconductor device includes a semiconductor substrate, an interlayer dielectric film, a plurality of pad parts, a wiring layer, and a surface protection film. The semiconductor substrate includes a semiconductor element on a surface of the semiconductor substrate. The interlayer dielectric film is disposed on the surface of the semiconductor substrate. The wiring layer is disposed in the interlayer dielectric film. The hard film is disposed opposite to the semiconductor substrate with respect to the interlayer dielectric film, and is harder than the interlayer dielectric film, The pad parts are disposed opposite to the interlayer dielectric film with respect to the hard film, The surface protection film is disposed in at least an opposing region where the pad parts oppose to each other. The surface protection film is a silicon nitride film or a silicon oxide film.Type: ApplicationFiled: March 18, 2019Publication date: July 11, 2019Inventors: Youichi ASHIDA, Tsuyoshi FUJIWARA
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Patent number: 9240445Abstract: A lateral semiconductor device includes a semiconductor layer, an insulating layer, and a resistive field plate. The semiconductor layer includes a first semiconductor region and a second semiconductor region at a surface portion, and the second semiconductor region makes a circuit around the first semiconductor region. The insulating layer is formed on a surface of the semiconductor layer and is disposed between the first and second semiconductor regions. The resistive field plate is formed on a surface of the insulating layer. Between the first and second semiconductor regions, a first section and a second section are adjacent to each other along a circumferential direction around the first semiconductor region. The resistive field plate includes first and second resistive field plate sections respectively formed in the first and second sections, and the first and second resistive field plate sections are separated from each other.Type: GrantFiled: May 10, 2012Date of Patent: January 19, 2016Assignee: DENSO CORPORATIONInventors: Takashi Suzuki, Norihito Tokura, Satoshi Shiraki, Shigeki Takahashi, Youichi Ashida, Akira Yamada
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Patent number: 9214536Abstract: A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.Type: GrantFiled: November 12, 2013Date of Patent: December 15, 2015Assignee: DENSO CORPORATIONInventors: Shigeki Takahashi, Norihito Tokura, Satoshi Shiraki, Youichi Ashida, Akio Nakagawa
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Patent number: 9136362Abstract: A semiconductor device with a lateral element includes a semiconductor substrate, first and second electrodes on the substrate, and a resistive field plate extending from the first electrode to the second electrode. The lateral element passes a current between the first and second electrodes. A voltage applied to the second electrode is less than a voltage applied to the first electrode. The resistive field plate has a first end portion and a second end portion opposite to the first end portion. The second end portion is located closer to the second electrode than the first end portion. An impurity concentration in the second end portion is equal to or greater than 1×1018 cm?3.Type: GrantFiled: September 14, 2012Date of Patent: September 15, 2015Assignee: DENSO CORPORATIONInventors: Takeshi Sakai, Akira Yamada, Shigeki Takahashi, Youichi Ashida, Satoshi Shiraki
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Patent number: 8854033Abstract: A semiconductor device having a lateral semiconductor element includes a semiconductor substrate, a first electrode on the substrate, a second electrode on the substrate, and an isolation structure located in the substrate to divide the substrate into a first island and a second island electrically insulated from the first island. The lateral semiconductor element includes a main cell located in the first island and a sense cell located in the second island. The main cell causes a first current to flow between the first electrode and the second electrode so that the first current flows in a lateral direction along the surface of the substrate. The first current is detected by detecting a second current flowing though the sense cell.Type: GrantFiled: June 1, 2011Date of Patent: October 7, 2014Assignee: DENSO CORPORATIONInventors: Satoshi Shiraki, Norihito Tokura, Shigeki Takahashi, Masahiro Yamamoto, Akira Yamada, Hiroyasu Kudo, Youichi Ashida, Akio Nakagawa
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Patent number: 8791500Abstract: A semiconductor device having a lateral insulated gate bipolar transistor includes a first conductivity type drift layer, a second conductivity type collector region formed in a surface portion of the drift layer, a second conductivity type channel layer formed in the surface portion of the drift layer, a first conductivity type emitter region formed in a surface portion of the channel layer, and a hole stopper region formed in the drift layer and located between the collector region and the emitter region. Holes are injected from the collector region into the drift layer and flow toward the emitter region through a hole path. The hole stopper region blocks a flow of the holes and narrows the hole path to concentrate the holes.Type: GrantFiled: December 19, 2012Date of Patent: July 29, 2014Assignee: DENSO CORPORATIONInventors: Youichi Ashida, Shigeki Takahashi
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Patent number: 8791690Abstract: A semiconductor device having a lateral semiconductor element includes a semiconductor substrate, a first electrode on the substrate, a second electrode on the substrate, and an isolation structure located in the substrate to divide the substrate into a first island and a second island electrically insulated from the first island. The lateral semiconductor element includes a main cell located in the first island and a sense cell located in the second island. The main cell causes a first current to flow between the first electrode and the second electrode so that the first current flows in a lateral direction along the surface of the substrate. The first current is detected by detecting a second current flowing though the sense cell.Type: GrantFiled: June 1, 2011Date of Patent: July 29, 2014Assignee: DENSO CORPORATIONInventors: Satoshi Shiraki, Norihito Tokura, Shigeki Takahashi, Masahiro Yamamoto, Akira Yamada, Hiroyasu Kudo, Youichi Ashida, Akio Nakagawa
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Publication number: 20140070271Abstract: A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.Type: ApplicationFiled: November 12, 2013Publication date: March 13, 2014Applicant: DENSO CORPORATIONInventors: Shigeki TAKAHASHI, Norihito TOKURA, Satoshi SHIRAKI, Youichi ASHIDA, Akio NAKAGAWA
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Publication number: 20140048911Abstract: A lateral semiconductor device includes a semiconductor layer, an insulating layer, and a resistive field plate. The semiconductor layer includes a first semiconductor region and a second semiconductor region at a surface portion, and the second semiconductor region makes a circuit around the first semiconductor region. The insulating layer is formed on a surface of the semiconductor layer and is disposed between the first and second semiconductor regions. The resistive field plate is formed on a surface of the insulating layer. Between the first and second semiconductor regions, a first section and a second section are adjacent to each other along a circumferential direction around the first semiconductor region. The resistive field plate includes first and second resistive field plate sections respectively formed in the first and second sections, and the first and second resistive field plate sections are separated from each other.Type: ApplicationFiled: May 10, 2012Publication date: February 20, 2014Applicant: DENSO CORPORATIONInventors: Takashi Suzuki, Norihito Tokura, Satoshi Shiraki, Shigeki Takahashi, Youichi Ashida, Akira Yamada
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Patent number: 8604513Abstract: A semiconductor device includes: a SOI substrate; a semiconductor element having first and second impurity layers disposed in an active layer of the SOI substrate, the second impurity layer surrounding the first impurity layer; and multiple first and second conductive type regions disposed in a part of the active layer adjacent to an embedded insulation film of the SOI substrate. The first and second conductive type regions are alternately arranged. The first and second conductive type regions have a layout, which corresponds to the semiconductor element.Type: GrantFiled: September 23, 2010Date of Patent: December 10, 2013Assignee: DENSO CORPORATIONInventors: Youichi Ashida, Norihito Tokura, Shigeki Takahashi, Yoshiaki Nakayama, Satoshi Shiraki, Kouji Senda
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Publication number: 20130075877Abstract: A semiconductor device with a lateral element includes a semiconductor substrate, first and second electrodes on the substrate, and a resistive field plate extending from the first electrode to the second electrode. The lateral element passes a current between the first and second electrodes. A voltage applied to the second electrode is less than a voltage applied to the first electrode. The resistive field plate has a first end portion and a second end portion opposite to the first end portion. The second end portion is located closer to the second electrode than the first end portion. An impurity concentration in the second end portion is equal to or greater than 1×1018 cm?3.Type: ApplicationFiled: September 14, 2012Publication date: March 28, 2013Applicant: DENSO CORPORATIONInventors: Takeshi SAKAI, Akira Yamada, Shigeki Takahashi, Youichi Ashida, Satoshi Shiraki
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Patent number: 8354691Abstract: A N-channel lateral insulated-gate bipolar transistor includes a semiconductor substrate, a drift layer, a collector region, a channel layer, an emitter region, a gate insulation film, a gate electrode, a collector electrode, an emitter electrode. The collector region includes a high impurity concentration region having a high impurity concentration and a low impurity concentration region having a lower impurity concentration than the high impurity concentration region. The collector electrode is in ohmic contact with the high impurity concentration region and in schottky contact with the low impurity concentration region.Type: GrantFiled: September 7, 2011Date of Patent: January 15, 2013Assignee: DENSO CORPORATIONInventors: Norihito Tokura, Shigeki Takahashi, Youichi Ashida, Akio Nakagawa
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Publication number: 20120061726Abstract: A N-channel lateral insulated-gate bipolar transistor includes a semiconductor substrate, a drift layer, a collector region, a channel layer, an emitter region, a gate insulation film, a gate electrode, a collector electrode, an emitter electrode. The collector region includes a high impurity concentration region having a high impurity concentration and a low impurity concentration region having a lower impurity concentration than the high impurity concentration region. The collector electrode is in ohmic contact with the high impurity concentration region and in schottky contact with the low impurity concentration region.Type: ApplicationFiled: September 7, 2011Publication date: March 15, 2012Applicant: DENSO CORPORATIONInventors: Norihito TOKURA, Shigeki Takahashi, Youichi Ashida, Akio Nakagawa
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Publication number: 20110298446Abstract: A semiconductor device having a lateral semiconductor element includes a semiconductor substrate, a first electrode on the substrate, a second electrode on the substrate, and an isolation structure located in the substrate to divide the substrate into a first island and a second island electrically insulated from the first island. The lateral semiconductor element includes a main cell located in the first island and a sense cell located in the second island. The main cell causes a first current to flow between the first electrode and the second electrode so that the first current flows in a lateral direction along the surface of the substrate. The first current is detected by detecting a second current flowing though the sense cell.Type: ApplicationFiled: June 1, 2011Publication date: December 8, 2011Applicant: DENSO CORPORATIONInventors: Satoshi SHIRAKI, Norihito Tokura, Shigeki Takahashi, Masahiro Yamamoto, Akira Yamada, Hiroyasu Kudo, Youichi Ashida, Akio Nakagawa
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Publication number: 20110291157Abstract: A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.Type: ApplicationFiled: May 24, 2011Publication date: December 1, 2011Applicant: DENSO CORPORATIONInventors: Shigeki TAKAHASHI, Norihito Tokura, Satoshi Shiraki, Youichi Ashida, Akio Nakagawa
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Publication number: 20110073904Abstract: A semiconductor device includes: a SOI substrate; a semiconductor element having first and second impurity layers disposed in an active layer of the SOI substrate, the second impurity layer surrounding the first impurity layer; and multiple first and second conductive type regions disposed in a part of the active layer adjacent to an embedded insulation film of the SOI substrate. The first and second conductive type regions are alternately arranged. The first and second conductive type regions have a layout, which corresponds to the semiconductor element.Type: ApplicationFiled: September 23, 2010Publication date: March 31, 2011Applicant: DENSO CORPORATIONInventors: Youichi Ashida, Norihito Tokura, Shigeki Takahashi, Yoshiaki Nakayama, Satoshi Shiraki, Kouji Senda
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Patent number: 7039051Abstract: A data sending system which prevents a parity error occurrence in a data receiving unit is provided. The data sending system provided is related to data sending systems and, particularly, to a data sending system where plurality of data sending units share a path for data transmission. The data sending system provided comprises a network consisting of a data path and control path, a control unit for instructing data sending through said control path, one or plural data sending units for sending, according to an instruction from said control path, data to a specific one of plural logical paths of said data path, and a data receiving unit permanently connected to the one of plural logical paths of said data path. Said control unit has a determining section which determines a time span, during which no sending data exists in a logical path connected to said data receiving unit, and also instructs a specific unit of said data sending units to send dummy data during the time span.Type: GrantFiled: February 13, 2002Date of Patent: May 2, 2006Assignee: Fujitsu LimitedInventors: Takato Ohashi, Kouichi Tsuzaki, Makoto Kawatoko, Kiyohide Yamashita, Youichi Ashida
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Patent number: 6947072Abstract: A video telecommunication system having a plurality of cameras (video cameras) installed at remote locations and a monitor for monitoring the video, provided with a video information describing unit for sending a switch command for the camera to a video transmission apparatus, simultaneously sending character information describing the video information of the camera in accordance with the switch command, and having the video information and the character information displayed on the monitor, whereby it is possible to easily record, change, and correct character information on the place name etc. combined with the video information.Type: GrantFiled: February 17, 2000Date of Patent: September 20, 2005Assignee: Fujitsu LimitedInventors: Nobuyuki Kaneko, Takehiko Fujiyama, Youichi Ashida, Toshinori Shima