Abstract: A semiconductor memory device includes; a first impurity region and a second impurity region spaced apart in a semiconductor substrate, a bit line electrically connected to the first impurity region, a storage node contact electrically connected to the second impurity region, an air gap between the bit line and the storage node contact, a landing pad electrically connected to the storage node contact, a buried dielectric pattern on a sidewall of the landing pad and on the air gap, and a spacer capping pattern between the buried dielectric pattern and the air gap.

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

Abstract: A semiconductor memory device includes; a first impurity region and a second impurity region spaced apart in a semiconductor substrate, a bit line electrically connected to the first impurity region, a storage node contact electrically connected to the second impurity region, an air gap between the bit line and the storage node contact, a landing pad electrically connected to the storage node contact, a buried dielectric pattern on a sidewall of the landing pad and on the air gap, and a spacer capping pattern between the buried dielectric pattern and the air gap.

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

Abstract: Disclosed herein is a combination scissors and cutting knife such as a multi-purpose utility knife can include a first elongated member. The first elongated member also includes a handle at a first end and a scissor blade section extending therefrom. A first pivotal structure can be arranged between the first end and the scissor blade section. The combination scissors and cutting knife can include a second elongated member which also includes a handle at a first end and a scissor blade section extending therefrom. The second elongated structure can also include a second pivotal structure arranged between the first end and the scissor blade section. The first and second pivotal structures are configured to pivotally couple together. The second elongated structure can also include a cutting knife housing extending from the first end to the scissor blade section. The cutting knife housing can include a retractable cutting knife arranged within the cutting knife housing.

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

Abstract: Disclosed herein are a vehicle configured to prevent a collision and a control method thereof. The vehicle includes a chassis; a steering unit configured to change a direction of the chassis; a brake unit configured to adjust a braking force of the chassis; a detector configured to detect movement information of the chassis; and a controller configured to confirm a variation rate of movement of the chassis based on the detected movement information and configured to automatically control an operation of the steering unit and the brake unit when the confirmed variation rate is out of a reference range. When a collision occurs, the vehicle may automatically perform at least one of steering control, side braking control, or a damping control, and thus a secondary collision may be prevented, the incidence of additional injury may be reduced, the speed of the vehicle may be stably reduced or stopped, and the vehicle may be moved to a safe lane so that a stabilization time of the vehicle may be reduced.

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

Abstract: A semiconductor device includes a plurality of electrode structures formed on a substrate; and an upper supporter group and a lower supporter between upper ends and lower ends of the plurality of electrode structures The upper supporter group includes a plurality of supporters, and at least some of the plurality of supporters each have an upper surface and a lower surface. One of the upper surface and the lower surface has a curved profile, and the other surface has a flat profile.

Abstract: Disclosed herein are a vehicle configured to prevent a collision and a control method thereof. The vehicle includes a chassis; a steering unit configured to change a direction of the chassis; a brake unit configured to adjust a braking force of the chassis; a detector configured to detect movement information of the chassis; and a controller configured to confirm a variation rate of movement of the chassis based on the detected movement information and configured to automatically control an operation of the steering unit and the brake unit when the confirmed variation rate is out of a reference range. When a collision occurs, the vehicle may automatically perform at least one of steering control, side braking control, or a damping control, and thus a secondary collision may be prevented, the incidence of additional injury may be reduced, the speed of the vehicle may be stably reduced or stopped, and the vehicle may be moved to a safe lane so that a stabilization time of the vehicle may be reduced.

Abstract: A method for manufacturing a semiconductor device includes forming a storage node hole passing through an upper support layer, a bowing prevention layer and an upper mold layer using a dry etching process, forming a lower electrode in the storage node hole, patterning the upper support layer and the bowing prevention layer to expose a portion of the upper mold layer, removing the upper mold layer and at least a portion of the bowing prevention layer using a first wet etching process, and sequentially forming a dielectric layer and an upper electrode that cover the lower electrode. An etch rate of the bowing prevention layer may be substantially equal to an etch rate of the upper support layer during the dry etching process. An etch rate of the bowing prevention layer may be higher than an etch rate of the upper support layer during the first wet etching process.

Abstract: A method for manufacturing a semiconductor device includes forming a storage node hole passing through an upper support layer, a bowing prevention layer and an upper mold layer using a dry etching process, forming a lower electrode in the storage node hole, patterning the upper support layer and the bowing prevention layer to expose a portion of the upper mold layer, removing the upper mold layer and at least a portion of the bowing prevention layer using a first wet etching process, and sequentially forming a dielectric layer and an upper electrode that cover the lower electrode. An etch rate of the bowing prevention layer may be substantially equal to an etch rate of the upper support layer during the dry etching process. An etch rate of the bowing prevention layer may be higher than an etch rate of the upper support layer during the first wet etching process.