Abstract: A multilayer ceramic capacitor with decreased high voltage stress defects and a board having the same may include a body formed by stacking a plurality of dielectric layers and a plurality of first and second internal electrodes in a width direction, the first and second internal electrodes including body portions overlapping each other and lead portions exposed to a mounting surface of the body and disposed to be spaced apart from each other, respectively; and first to third external electrodes disposed on the mounting surface of the capacitor body to be connected to the lead portions, respectively, wherein the body portions of the first and second internal electrodes have different areas from each other.

Abstract: A multilayer ceramic capacitor with decreased high voltage stress defects and a board having the same may include a body formed by stacking a plurality of dielectric layers and a plurality of first and second internal electrodes in a width direction, the first and second internal electrodes including body portions overlapping each other and lead portions exposed to a mounting surface of the body and disposed to be spaced apart from each other, respectively; and first to third external electrodes disposed on the mounting surface of the capacitor body to be connected to the lead portions, respectively, wherein the body portions of the first and second internal electrodes have different areas from each other.

Abstract: A multilayer ceramic capacitor with decreased high voltage stress defects and a board having the same may include a body formed by stacking a plurality of dielectric layers and a plurality of first and second internal electrodes in a width direction, the first and second internal electrodes including body portions overlapping each other and lead portions exposed to a mounting surface of the body and disposed to be spaced apart from each other, respectively; and first to third external electrodes disposed on the mounting surface of the capacitor body to be connected to the lead portions, respectively, wherein the body portions of the first and second internal electrodes have different areas from each other.

Abstract: A multilayer ceramic capacitor with decreased high voltage stress defects and a board having the same may include a body formed by stacking a plurality of dielectric layers and a plurality of first and second internal electrodes in a width direction, the first and second internal electrodes including body portions overlapping each other and lead portions exposed to a mounting surface of the body and disposed to be spaced apart from each other, respectively; and first to third external electrodes disposed on the mounting surface of the capacitor body to be connected to the lead portions, respectively, wherein the body portions of the first and second internal electrodes have different areas from each other.

Abstract: A multilayer ceramic component includes a ceramic body in which a plurality of insulating layers and internal electrodes are alternately stacked. The internal electrodes include first and second internal electrodes respectively exposed to first and second end surfaces of the ceramic body with insulating layers interposed between the first and second internal electrodes. First dummy electrodes and second dummy electrodes are disposed on the insulating layers, spaced apart from the internal electrodes by a predetermined interval and exposed to the first end surface of the ceramic body. The multilayer ceramic component satisfies 0.273?•/D?0.636, where D is a distance between an end of the first internal electrode and the second end surface of the ceramic body, and ? is a width of the first dummy electrode.