Patents by Inventor Young Sir Chung

Young Sir Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8242776
    Abstract: A semiconductor process and apparatus provide a high-performance magnetic field sensor from two differential sensor configurations (201, 211) which require only two distinct pinning axes (206, 216), where each differential sensor (e.g., 201) is formed from a Wheatstone bridge structure with four unshielded MTJ sensors (202-205), each of which includes a magnetic field pulse generator (e.g., 414) for selectively applying a field pulse to stabilize or restore the easy axis magnetization of the sense layers (e.g., 411) to eliminate micromagnetic domain switches during measurements of small magnetic fields.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: August 14, 2012
    Assignee: Everspin Technologies, Inc.
    Inventors: Phillip G. Mather, Young Sir Chung, Bradley N. Engel
  • Patent number: 8198705
    Abstract: In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: June 12, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: David P. Mancini, Young Sir Chung, William J. Dauksher, Donald F. Weston, Steven R. Young, Robert W. Baird
  • Publication number: 20090243607
    Abstract: A semiconductor process and apparatus provide a high-performance magnetic field sensor from two differential sensor configurations (201, 211) which require only two distinct pinning axes (206, 216), where each differential sensor (e.g., 201) is formed from a Wheatstone bridge structure with four unshielded MTJ sensors (202-205), each of which includes a magnetic field pulse generator (e.g., 414) for selectively applying a field pulse to stabilize or restore the easy axis magnetization of the sense layers (e.g., 411) to eliminate micromagnetic domain switches during measurements of small magnetic fields.
    Type: Application
    Filed: March 26, 2008
    Publication date: October 1, 2009
    Inventors: Phillip G. Mather, Young Sir Chung, Bradley N. Engel
  • Patent number: 7547480
    Abstract: An integrated circuit device is provided which comprises a substrate, a conductive line configured to experience a pressure, and a magnetic tunnel junction (“MTJ”) core formed between the substrate and the current line. The conductive line is configured to move in response to the pressure, and carries a current which generates a magnetic field. The MTJ core has a resistance value which varies based on the magnetic field. The resistance of the MTJ core therefore varies with respect to changes in the pressure. The MTJ core is configured to produce an electrical output signal which varies as a function of the pressure.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: June 16, 2009
    Assignee: Everspin Technologies, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Bradley N. Engel
  • Patent number: 7541804
    Abstract: Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic electrode has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: June 2, 2009
    Assignee: EverSpin Technologies, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Bradley N. Engel
  • Patent number: 7511990
    Abstract: An integrated circuit device is provided which includes a heat source disposed in a substrate, and a Magnetic Tunnel Junction (“MTJ”) temperature sensor disposed over the heat source.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: March 31, 2009
    Assignee: EverSpin Technologies, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Mark A. Durlam
  • Patent number: 7510883
    Abstract: Techniques of sensing a temperature of a heat source disposed in a substrate of an integrated circuit are provided. According to one exemplary method, a Magnetic Tunnel Junction (“MTJ”) temperature sensor is provided over the heat source. The MTJ temperature sensor comprises an MTJ core configured to output a current during operation thereof. The value of the current varies based on a resistance value of the particular MTJ core. The resistance value of the MTJ core varies as a function of the temperature of the heat source. A value of the current of the MTJ core can then be associated with a corresponding temperature of the heat source.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: March 31, 2009
    Assignee: EverSpin Technologies, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Mark A. Durlam
  • Patent number: 7507638
    Abstract: In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: March 24, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: David P. Mancini, Young Sir Chung, William J. Dauksher, Donald F. Weston, Steven R. Young, Robert W. Baird
  • Publication number: 20090059444
    Abstract: A two-axis, single-chip external magnetic field sensor incorporates tunneling magneto-resistance (TMR) technology. In one embodiment, an integrated device includes at least two sensor elements having pinned layers with orientation situated at a known angle (e.g., 90 degrees) with respect to each other. In the presence of a magnetic field, the information from the multiple sensor elements can be processed (e.g., using a conventional bridge configuration) to determine the orientation of the integrated sensor with respect to the external field. In order to achieve an integrated sensor with multiple pinned layer orientations, a novel processing method utilizes antiferromagnetic pinning layers different materials with different blocking temperatures (e.g., PtMn and IrMn).
    Type: Application
    Filed: August 30, 2007
    Publication date: March 5, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Phillip Glenn Mather, Jijun Sun, Young Sir Chung
  • Publication number: 20090008748
    Abstract: In accordance with a specific embodiment, a method of processing a semiconductor substrate is disclosed whereby the substrate is thinned, and the dice formed on the substrate are singulated by a common process. Trench regions are formed on a backside of the substrate. An isotropic etch of the backside results in a thinning of the substrate while maintaining the depth of the trenches, thereby facilitating singulation of the die.
    Type: Application
    Filed: September 16, 2008
    Publication date: January 8, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: David P. Mancini, Young Sir Chung, William J. Dauksher, Donald F. Watson, Steven R. Young, Robert W. Baird
  • Patent number: 7444738
    Abstract: Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. A magnetic shield is provided at least on a face of the MFS away from the MTJ. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic region has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: November 4, 2008
    Assignee: EverSpin Technologies, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Gregory W. Grynkewich
  • Patent number: 7414396
    Abstract: Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. A magnetic shield is provided at least on a face of the MFS away from the MTJ. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic region has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: August 19, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Young Sir Chung, Robert W. Baird
  • Publication number: 20080112214
    Abstract: A method and assembly for sensing a voltage with a memory cell (88) is provided. The memory cell includes first and second electrodes (96,112), first and second ferromagnetic bodies (104,108) positioned between the first and second electrodes and an insulating body (94) positioned between the first and second ferromagnetic bodies. The first electrode is electrically connected to a first portion of a microelectronic assembly (47). The second electrode is electrically connected to a second portion of the microelectronic assembly. The voltage across the first and second portions of the microelectronic assembly is determined based on an electrical resistance of the memory cell. The memory cell may be a magnetoresistive random access memory (MRAM) cell. In one embodiment, the memory cell is a magnetic tunnel junction (MTJ) memory cell.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 15, 2008
    Inventors: Young Sir Chung, Robert W. Baird, Mark A. Durlam, Pon Sung Ku
  • Publication number: 20080061309
    Abstract: Structure (40, 61-13, 61-15, 61-18, 61-19) and method (60-5 . . . 60-19, 100, 200) are provided for a semiconductor device (40, 61-13, 61-15, 61-18, 61-19) with under-filled heat extractor(s) (46, 46?, 78, 78?). The device (40, 61-13, 61-15, 61-18, 61-19) comprises a substrate (48, 72) with upper (37) and lower (63, 73) surfaces. A semiconductor (38, 72) is located proximate the upper surface (37) with a device region (26) therein. One or more cavities (67, 77) underlying the device region (26) are etched in the substrate (48, 72) from the lower surface (63, 73). A higher thermal conductivity material (68) versus the substrate (48, 72) fills the one or more cavities (67) and has an exposed surface (69, 69?, 79, 79?) underlying the device region (26) at or beyond the lower surface (63, 73). This provides the under-filled heat extractor(s) (46, 46?, 78, 78?).
    Type: Application
    Filed: July 21, 2006
    Publication date: March 13, 2008
    Inventors: Young Sir Chung, Robert W. Baird
  • Patent number: 7324369
    Abstract: An integrated circuit device includes a magnetic random access memory (“MRAM”) architecture and a smart power integrated circuit architecture formed on the same substrate using the same fabrication process technology. The fabrication process technology is a modular process having a front end process and a back end process. In the example embodiment, the smart power architecture includes a power circuit component, a digital logic component, and an analog control component formed by the front end process, and a sensor architecture formed by the back end process. The MRAM architecture includes an MRAM circuit component formed by the front end process and an MRAM cell array formed by the back end process. In one practical embodiment, the sensor architecture includes a sensor component that is formed from the same magnetic tunnel junction core material utilized by the MRAM cell array.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: January 29, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Mark A. Durlam, Gregory W. Grynkewich, Eric J. Salter
  • Patent number: 7271011
    Abstract: Techniques are provided for sensing a first current produced by an active circuit component. According to these techniques, a current sensor is disposed over the active circuit component. The current sensor includes a Magnetic Tunnel Junction (“MTJ”) core disposed between a first conductive layer and a second conductive layer. The MTJ core can be used to sense the first current and produce a second current based on the first current sensed at the MTJ core.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: September 18, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Mark A. Durlam
  • Patent number: 7264985
    Abstract: An integrated circuit device (300) comprises a substrate (301) and MRAM architecture (314) formed on the substrate (308). The MRAM architecture (314) includes a MRAM circuit (318) formed on the substrate (301); and a MRAM cell (316) coupled to and formed above the MRAM circuit (318). Additionally a passive device (320) is formed in conjunction with the MRAM cell (316). The passive device (320) can be one or more resistors and one or more capacitor. The concurrent fabrication of the MRAM architecture (314) and the passive device (320) facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate (404, 504), resulting in three-dimensional integration.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: September 4, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Mark A. Durlam, Gregory W. Grynkewich, Eric J. Salter
  • Patent number: 7262069
    Abstract: An integrated circuit device includes a magnetic random access memory (“MRAM”) architecture and at least one inductance element formed on the same substrate using the same fabrication process technology. The inductance element, which may be an inductor or a transformer, is formed at the same metal layer (or layers) as the program lines of the MRAM architecture. Any available metal layer in addition to the program line layers can be added to the inductance element to enhance its efficiency. The concurrent fabrication of the MRAM architecture and the inductance element facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate, resulting in three-dimensional integration.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: August 28, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Mark A. Durlam, Bradley N. Engel
  • Patent number: 7239543
    Abstract: An integrated circuit device includes an active circuit component and a current sensor. The active circuit component may be coupled between a first conductive layer and a second conductive layer, and is configured to produce a first current. The current sensor is disposed over the active circuit component. The current sensor may includes a Magnetic Tunnel Junction (“MTJ”) core disposed between the first conductive layer and the second conductive layer. The MTJ core is configured to sense the first current and produce a second current based on the first current sensed at the MTJ core.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: July 3, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Young Sir Chung, Robert W. Baird, Mark A. Durlam, Gregory W. Grynkewich, Eric J. Salter, Jiang-Kai Zuo
  • Patent number: 7220602
    Abstract: Methods and apparatus are provided for sensing physical parameters. The apparatus comprises a magnetic tunnel junction (MTJ) and a magnetic field source whose magnetic field overlaps the MTJ and whose proximity to the MTJ varies in response to an input to the sensor. The MTJ comprises first and second magnetic electrodes separated by a dielectric configured to permit significant tunneling conduction therebetween. The first magnetic electrode has its spin axis pinned and the second magnetic electrode has its spin axis free. The magnetic field source is oriented closer to the second magnetic electrode than the first magnetic electrode. The overall sensor dynamic range is extended by providing multiple electrically coupled sensors receiving the same input but with different individual response curves and desirably but not essentially formed on the same substrate.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: May 22, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Young Sir Chung, Robert W. Baird