Abstract: Provided are a thin-film transistor (TFT) display panel in which grayscale inversion at sides of the TFT display panel is controlled to improve color at sides thereof due to the shifting of chromaticity coordinates, and a liquid crystal display (LCD) including the TFT display panel. The TFT display panel includes a first pixel electrode corresponding to a first pixel, a second pixel electrode corresponding to a second pixel, and a third pixel electrode corresponding to a third pixel, wherein each of the first through third pixel electrodes includes a first subpixel electrode and a second subpixel electrode which receive different data voltages from the data lines, and saw-toothed fine patterns are formed on oblique edges of the first subpixel electrode of the first pixel electrode.

Abstract: A gate driving circuit includes a pull-up control part, a pull-up part, a carry part, a first pull-down part and a second pull-down part. The pull-up control part applies a carry signal from a previous stage to a first node. The pull-up part outputs an N-th gate output signal based on a clock signal. The carry part outputs an N-th carry signal based on the clock signal in response to the signal applied to the first node. The first pull-down part includes a plurality of transistors connected to each other in series. The first pull-down part pulls down a signal at the first node to a second off voltage in response to a carry signal of a next stage. The second pull-down part pulls down the N-th gate output signal to a first off voltage in response to the carry signal of the next stage.

Abstract: A display device having a plurality of pixels, each pixel includes a light-emitting element, a storage capacitor, a driving transistor, a first switching transistor which supplies a data voltage to the storage capacitor in response to an on-voltage of a scanning signal, a second switching transistor which diode-connects the driving transistor in response to an on-voltage of a compensation signal, and a third switching transistor which supplies a driving voltage to the driving transistor in response to an on-voltage of a light emitting signal. The storage capacitor stores a control voltage depending on a threshold voltage of the driving transistor when the driving transistor is diode-connected, transmits the control voltage and the data voltage to the control terminal of the driving transistor, and a period in which the compensation signal is in an on-voltage state is longer than a period in which the scanning signal is in an on-voltage state.

Abstract: A gate driving circuit includes a pull-up control part, a pull-up part, a carry part, a first pull-down part and a second pull-down part. The pull-up control part applies a carry signal from a previous stage to a first node. The pull-up part outputs an N-th gate output signal based on a clock signal. The carry part outputs an N-th carry signal based on the clock signal in response to the signal applied to the first node. The first pull-down part includes a plurality of transistors connected to each other in series. The first pull-down part pulls down a signal at the first node to a second off voltage in response to a carry signal of a next stage. The second pull-down part pulls down the N-th gate output signal to a first off voltage in response to the carry signal of the next stage.

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; an etching stop layer disposed on the semiconductor; an insulating layer disposed on the gate insulating layer; and a source electrode and a drain electrode overlapping the semiconductor. The semiconductor and the gate insulating layer have a first portion on which the etching stop layer and the insulating layer are disposed, and a second portion on which etching stop layer and the insulating layer are not disposed. The source electrode and the drain electrode are disposed on the second portion of the semiconductor and the gate insulating layer.

Abstract: The present invention relates to a display device and a driving method thereof. A display device in the present invention comprises: a capacitor connected between a first node and a second node; a switching transistor controlled by a first scanning signal and transmitting a data voltage to the first node; an emission control transistor controlled by a second scanning signal and transmitting a reference voltage to the second node; a driving transistor comprising a control terminal connected to the first node, an output terminal connected to the second node, and an input terminal; a driving control transistor controlled by a third scanning signal and transmitting a driving voltage to the input terminal of the driving transistor; and a light-emitting device connected to the second node. Accordingly, display contrast of a display device may be improved.

Abstract: A gate driving circuit includes a pull-up control part, a pull-up part, a carry part, a first pull-down part and a second pull-down part. The pull-up control part applies a carry signal from a previous stage to a first node. The pull-up part outputs an N-th gate output signal based on a clock signal. The carry part outputs an N-th carry signal based on the clock signal in response to the signal applied to the first node. The first pull-down part includes a plurality of transistors connected to each other in series. The first pull-down part pulls down a signal at the first node to a second off voltage in response to a carry signal of a next stage. The second pull-down part pulls down the N-th gate output signal to a first off voltage in response to the carry signal of the next stage.

Abstract: A display device and a method of driving the display device are provided. The threshold voltage of a driving transistor is compensated such that even when the threshold voltage of the driving transistor is varied, the emission of light with respect to a predetermined data voltage occurs with a predetermined luminance, based on a diode-connected compensation transistor and a plurality of switching transistors.

Abstract: A display apparatus includes gate lines, data lines insulated from the gate lines while crossing the gate lines, and pixels each including sub-pixels in two successive rows by three successive columns. Among the sub-pixels in the two rows by the three columns, the sub-pixels in one of the three columns are respectively connected to a pair of different gate lines among three gate lines, and the sub-pixels in a different one of the three columns are connected to a remaining gate line among the three gate lines. The sub-pixels in the one and the different one of the three columns includes the same color filter and are applied with a gate signal transmitted in the same direction along pixel rows.

Abstract: A display device includes gate lines, data lines, first wires and second wires extending in the directions of the gate lines and data lines, and pixels having a first subpixel and a second subpixel each. The first subpixel has a first subpixel electrode and a first switching element, and the second subpixel has a second subpixel electrode and second and third switching elements. The control terminals of the three switching elements are connected to the same gate line, and the input terminals of the first and second switching elements are connected to the same data line. The first and second switching elements have output terminals connected to the first and second subpixel electrodes, respectively. The second switching element's output terminal connects to the third switching element, which has an output terminal connected to a second wire. The first wires and the second wires are connected in a pixel.

Abstract: A display device includes: an insulation substrate; a plurality of gate lines on the insulation substrate and divided into a first group and a second group; a plurality of data lines insulated from and intersecting the gate lines; a gate driver which applies a gate-on voltage to the gate lines and operates in one of a first mode and a second mode; and a data driver which applies a data voltage to the data lines, where the first group and the second group of the gate lines are applied with the gate-on voltage when the gate driver is in the first mode, and where the first group of the gate lines is applied with the gate-on voltage and the second group of the gate lines is in an off state when the gate driver is in the second mode.

Abstract: A liquid crystal display includes first and second sub-pixels charged with the same voltage during a first period. The voltage charged in the second sub-pixel is decreased after the first period. Since the voltage level of the first sub-pixel is different from the voltage level of the second sub-pixel after the first period, liquid crystal molecules disposed corresponding to the first sub-pixel are aligned in a direction different from that of liquid crystal molecules disposed corresponding to the second sub-pixel. Thus, a side viewing angle of the liquid crystal display is improved.

Abstract: An approach of a circuit configuration is provided for operating a display panel and a liquid crystal display with high aperture ratio, transmittance and visibility, the circuit configuration includes: a gate line; a data line intersecting the gate line; a first transistor connected to the gate line and the data line; a second transistor connected to the gate line and the data line; a storage electrode line separated from the gate line; a third transistor connected to the storage electrode line and the second transistor; a first pixel electrode connected to the first transistor; and a second pixel electrode connected to the second transistor and the third transistor. The third transistor being separated from an additional gate line is connected to the storage electrode line such that the aperture ratio can be increased, and visibility and transmittance can be enhanced.

Abstract: A vertical alignment liquid crystal display includes two sub-pixels each with a variable capacitor. A pixel is bisected into a high gray sub-pixel and a low gray sub-pixel through forming a variable capacitor at each sub-pixel. With this structure, the sub-pixels express different grays so that lateral visibility is enhanced. It is not required in bisecting a pixel into two sub-pixels to form separate wires for applying different signals thereto, and the amount of data to be processed at the driver for driving the display device is reduced. Furthermore, a pixel is bisected into two sub-pixels with variable capacitors in a simplified manner, and it is not required to form additional wires and elements, so the aperture ratio is enhanced.

Abstract: A liquid crystal display includes a gate line, a data line crossing the gate line and insulated from the gate line, a common voltage line separated from the gate line and the data line, where the common voltage line transfers a predetermined voltage, a first switching element connected to the gate line and the data line, a second switching element connected to the gate line and the data line, a first liquid crystal capacitor connected to the first switching element, a second liquid crystal capacitor connected to the second switching element and at least two decompressing switching elements connected to the second switching element and the common voltage line.

Abstract: A display apparatus includes a plurality of pixels. At least one of the pixels includes a gate line, a data line, a first storage line spaced apart from the gate line, a second storage line spaced apart from the gate line and the first storage line, first and second switching devices electrically connected to the gate line and the data line, a first liquid crystal capacitor connected to the first switching device and including the liquid crystal layer as its dielectric substance, a second liquid crystal capacitor connected to the second switching device and including the liquid crystal layer as its dielectric substance, a first storage capacitor connected between the first switching device and one of the first and second storage lines, and a second storage capacitor connected between the second switching device and a remaining one of the first and second storage lines.

Abstract: Embodiments of the present invention relate to a display device. In an embodiment, the display device includes a scanning signal line for transferring a scanning signal, a data line crossing the scanning signal line and transferring a data voltage, a switching transistor connected to the scanning signal line and the data line, a driving transistor connected to the switching transistor, a first transistor connected between the driving transistor and a driving voltage terminal, and a light-emitting element connected between the driving transistor and a common voltage terminal. The first transistor operates in a saturation region, and the driving transistor operates in a linear region. In this way, display characteristics may be improved by reducing deviation of a driving current due to deviation of characteristics of a driving transistor or a driving voltage.

Abstract: A display substrate includes a data line, a main gate line, and a first sub-pixel electrode formed on a base substrate. The display substrate further includes a first switching element connected to the data line. The display substrate further includes a second switching element connected to the data line, the main gate line, and a second sub-pixel electrode spaced apart from the first sub-pixel electrode. The display substrate further includes a third switching element connected to the data line and a secondary gate line adjacent to the main gate line. The display substrate further includes a shielding line spaced apart from the first and second sub-pixel electrodes, the shielding line overlapping the data line and receiving a reference voltage. The display substrate further includes an auxiliary electrode extending from the shielding line and overlapping an end electrode connected to the third switching element.

Abstract: An output part outputs a high voltage of a first clock signal as a high voltage of an (m)-th gate signal (‘m’ is a natural number) and a low voltage in response to a high signal of an (m+1)-th gate signal outputted from an (m+1)-th stage. A first maintenance part maintains a control part of the pull-up part at a low voltage in response to an (m?1)-th node signal or an (m+1)-th node signal lower than a high signal of a second clock signal having a phase opposite to the phase of the first clock signal received from an (m?1)-th stage or the (m+1)-th stage. A second maintenance part maintains the low voltage of the (m)-th gate signal in response to the (m?1)-th node signal or the (m+1)-th node signal.

Abstract: According to this disclosure of a thin film transistor array panel and the manufacturing method thereof, dams have a function of forming a light blocking member by an inkjet printing method and are formed along with color filters. Spacers are formed by the inkjet printing method along with the light blocking member and color filters. Advantages of this panel and its manufacturing method are a reduction in an alignment error of the light blocking member and the color filters, reduced manufacturing cost, and a simplified manufacturing.