Abstract: A display device includes a display panel including a plurality of subpixels and a plurality of signal lines, the display panel defining a display area having a first optical area and a normal area outside of the first optical area, and a non-display area. The first optical area includes a plurality of light emitting areas and a plurality of first transmission areas, and the normal area includes a plurality of light emitting areas. The display panel includes a plurality of first horizontal lines, among the signal lines, disposed through the first optical area. The first horizontal lines include a bypass line connected to subpixels at both boundaries of the first optical area and not connected to other subpixels inside of the first optical area, and a non-bypass line connected to the subpixels at both boundaries of the first optical area and the subpixels inside of the first optical area.

Abstract: A display device includes: a display panel including a plurality of data lines, a plurality of gate lines, and a plurality of pixels connected to the plurality of data lines and the plurality of gate lines; a data driving circuit configured to supply data signals to the plurality of data lines; a gate driving circuit configured to supply gate signals to the plurality of gate lines; and a power supply circuit configured to supply a first body voltage and a second body voltage having a voltage level that is less than the first body voltage to the plurality of pixels, the plurality of pixels being selectively supplied with the first body voltage and the second body voltage.

Abstract: A display device includes: a display panel including a plurality of data lines, a plurality of gate lines, and a plurality of pixels connected to the plurality of data lines and the plurality of gate lines; a data driving circuit configured to supply data signals to the plurality of data lines; a gate driving circuit configured to supply gate signals to the plurality of gate lines; and a power supply circuit configured to supply a first body voltage and a second body voltage having a voltage level that is less than the first body voltage to the plurality of pixels, the plurality of pixels being selectively supplied with the first body voltage and the second body voltage.

Abstract: A display device is disclosed. The display device comprises a display panel including an optical area and a normal area in a display area, and an optical electronic device overlapping at least a portion of the optical area. Two or more subpixels and a lower shield metal may be disposed in a non-transmission area between adjacent transmission areas in the optical area. In the non-transmission area of the optical area, the lower shield metal may include at least one opening overlapping all or a portion of a specific transistor among two or more transistors included in each of the two or more subpixels disposed in the non-transmission area in the optical area.

Abstract: A display device includes a display panel including a plurality of subpixels and a plurality of signal lines, the display panel defining a display area having a first optical area and a normal area outside of the first optical area, and a non-display area. The first optical area includes a plurality of light emitting areas and a plurality of first transmission areas, and the normal area includes a plurality of light emitting areas. The display panel includes a plurality of first horizontal lines, among the signal lines, disposed through the first optical area. The first horizontal lines include a bypass line connected to subpixels at both boundaries of the first optical area and not connected to other subpixels inside of the first optical area, and a non-bypass line connected to the subpixels at both boundaries of the first optical area and the subpixels inside of the first optical area.

Abstract: A display device includes subpixels disposed in a display area for displaying an image. Each subpixel includes a light emitting element; a driving transistor for driving the light emitting element; and a transistor whose turn-on or turn-off may be controlled by a gate signal supplied through a gate line. The subpixels includes a subpixel disposed in a specific area in the display area, and such subpixel may include a compensation capacitor formed by overlapping of a gate node of the driving transistor or a connection pattern connected to the gate node of the driving transistor and the gate line. A voltage level of the gate signal supplied through the gate line is changed to a lower voltage level at a timing at which a data voltage or a voltage resulting from changing of the data voltage is applied to the gate node of the driving transistor.

Abstract: A display device includes a display panel, a data driving circuit, a gate driving circuit, and a timing controller, each pixel of the display panel includes a light-emitting diode, a driving transistor, second to sixth switching transistors, and a storage capacitor, and at a sensing step at which the light-emitting diode does not emit light, a conduction path that is connected through the sixth switching transistor, the driving transistor, the second switching transistor, and the third switching transistor is formed, and an electrical signal reflecting a threshold voltage of one of the second to fourth switching transistors is transferred to a data line through the conduction path.

Abstract: Disclosed is a display apparatus with an integrated antenna, in which an antenna and a touch screen are embedded, and the display apparatus comprises a display panel including a touch screen and an antenna electrode, wherein the display panel is divided into a display area and a non-display area surrounding the display area and includes a pixel array part including pixel driving circuits provided in the display area and an electrode array part provided on the pixel array part and including the touch screen and the antenna electrode, the display area includes a pixel including the pixel driving circuit, and a portion of the touch screen is open.

Abstract: Disclosed is a light emitting display apparatus in which two of three scan signals used by a pixel driving circuit provided in one pixel are supplied through two scan lines provided in the pixel and the other remaining signal is supplied through a scan line provided in another pixel adjacent to the pixel.

Abstract: A display device includes a display panel, a data driving circuit, a gate driving circuit, and a timing controller, each pixel of the display panel includes a light-emitting diode, a driving transistor, second to sixth switching transistors, and a storage capacitor, and at a sensing step at which the light-emitting diode does not emit light, a conduction path that is connected through the sixth switching transistor, the driving transistor, the second switching transistor, and the third switching transistor is formed, and an electrical signal reflecting a threshold voltage of one of the second to fourth switching transistors is transferred to a data line through the conduction path.

Abstract: Disclosed is a light emitting display apparatus in which two of three scan signals used by a pixel driving circuit provided in one pixel are supplied through two scan lines provided in the pixel and the other remaining signal is supplied through a scan line provided in another pixel adjacent to the pixel.

Abstract: Disclosed is a display apparatus with an integrated antenna, in which an antenna and a touch screen are embedded, and the display apparatus comprises a display panel including a touch screen and an antenna electrode, wherein the display panel is divided into a display area and a non-display area surrounding the display area and includes a pixel array part including pixel driving circuits provided in the display area and an electrode array part provided on the pixel array part and including the touch screen and the antenna electrode, the display area includes a pixel including the pixel driving circuit, and a portion of the touch screen is open.

Abstract: A display device including a touch screen and a driving circuit of the display device are disclosed. A display panel of the display device is driven while being divided into a first block, to which data is applied during a first display period, and a second block, to which data is applied during a second display period following a touch sensing period. A display driving circuit includes an (N?1)th stage driving a last gate line of the first block and an Nth stage driving a first gate line of the second block. The Nth stage includes a charger charging a Q node of the Nth stage in the touch sensing period in response to a multi-start signal before the second display period starts.

Abstract: A display device includes: a pixel array including pixels at intersections of data lines and gate lines, a shift register including stages connected as a cascade, the shift register sequentially supplying gate pulses to the gate lines, and a node controller controlling nodes in the shift register, a first stage including: a pull-up transistor charging the output based on a Q node for a first gate pulse, a pull-down transistor discharging the output to a gate-low voltage based on a QB node voltage, a start controller pre-charging the Q node, and a QB node discharge controller discharging the QB node to a first low-potential voltage based on a first reset signal input line (IL), the node controller including a first reset signal generator that, during a vertical blanking interval of each frame, charges the first reset signal IL in response to a turn-on voltage applied to a gate-low voltage IL.

Abstract: A display device having a plurality of gate lines and a gate drive circuit is disclosed. The gate drive circuit includes a pull-up transistor configured to receive a first clock signal and to charge an output node to a voltage of the first clock signal based on a voltage of a Q node. The output node is connected to a corresponding one of the gate lines. The gate drive circuit also includes a switching circuit configured to charge the Q node based on a second clock signal. The switching circuit has an inverter circuit configured to control the voltage of the Q node based on the second clock signal.

Abstract: A liquid crystal display is provided comprising an LCD panel including data lines formed along a column direction, gate lines formed along a row direction perpendicular to the column direction, and a plurality of pixels arranged in a matrix pattern at intersections of the data lines and the gate lines, a data driver that supplies data voltages to the data lines, and a gate driver that sequentially supplies gate pulses to the gate lines. Subpixels of each of the pixels share one data line through which a data voltage is sequentially charged to the subpixels in a time-division manner. A column-directional length of each of the subpixels is longer than a row-directional length of each of the subpixels.

Abstract: A display device includes: a pixel array including pixels at intersections of data lines and gate lines, a shift register including stages connected as a cascade, the shift register sequentially supplying gate pulses to the gate lines, and a node controller controlling nodes in the shift register, a first stage including: a pull-up transistor charging the output based on a Q node for a first gate pulse, a pull-down transistor discharging the output to a gate-low voltage based on a QB node voltage, a start controller pre-charging the Q node, and a QB node discharge controller discharging the QB node to a first low-potential voltage based on a first reset signal input line (IL), the node controller including a first reset signal generator that, during a vertical blanking interval of each frame, charges the first reset signal IL in response to a turn-on voltage applied to a gate-low voltage IL.

Abstract: A display device including a touch screen and a driving circuit of the display device are disclosed. A display panel of the display device is driven while being divided into a first block, to which data is applied during a first display period, and a second block, to which data is applied during a second display period following a touch sensing period. A display driving circuit includes an (N?1)th stage driving a last gate line of the first block and an Nth stage driving a first gate line of the second block. The Nth stage includes a charger charging a Q node of the Nth stage in the touch sensing period in response to a multi-start signal before the second display period starts.

Abstract: A display device having a plurality of gate lines and a gate drive circuit is disclosed. The gate drive circuit includes a pull-up transistor configured to receive a first clock signal and to charge an output node to a voltage of the first clock signal based on a voltage of a Q node. The output node is connected to a corresponding one of the gate lines. The gate drive circuit also includes a switching circuit configured to charge the Q node based on a second clock signal. The switching circuit has an inverter circuit configured to control the voltage of the Q node based on the second clock signal.

Abstract: A liquid crystal display is provided comprising an LCD panel including data lines formed along a column direction, gate lines formed along a row direction perpendicular to the column direction, and a plurality of pixels arranged in a matrix pattern at intersections of the data lines and the gate lines, a data driver that supplies data voltages to the data lines, and a gate driver that sequentially supplies gate pulses to the gate lines. Subpixels of each of the pixels share one data line through which a data voltage is sequentially charged to the subpixels in a time-division manner. A column-directional length of each of the subpixels is longer than a row-directional length of each of the subpixels.