Abstract: A backlight includes a light source and one or more light recycling films. The light source generates light that exits the light source with an angular exit distribution. The light recycling films are oriented in relation to the light source so that the prism peaks of the recycling films are oriented away from the light source. The recycling films have a range of optimal incident angles that allow light to pass through the recycling films without recycling. The components of the light source, the characteristics of the recycling films, or both, are configured to control the overlap between the exit distribution of the light source and the optimal incident angle range of the recycling films.

Abstract: Provided are a memory device formed using one or more source materials not containing hydrogen as a constituent element and a method of manufacturing the memory device.

Abstract: Provided is a multi-chip package light emitting diode (LED) device including a plurality of LED chips within a single package. The LED device may include a base substrate, a multi-chip package for a LED on the base substrate, and a light radiator surrounding the multi-chip package and radiating light emitted by the multi-chip package for a LED, wherein the multi-chip package for a LED may include a plurality of LED chips on a single wafer substrate.

Abstract: A transistor, an inverter including the transistor, and methods of manufacturing the inverter and the transistor. A gate insulating layer of the transistor has a charge trap region. A threshold voltage may be moved in a positive (+) direction by trapping charges in the charge trap region. The transistor may be an enhancement mode oxide thin-film transistor (TFT) and may be used as an element of the inverter.

Abstract: A multi-layered memory device is provided. The multi-layered memory device includes two or more memory units and an active circuit unit arranged between each of the two or more memory units. The active circuit includes a decoder. Each memory unit includes one or more memory layers. Each memory layer includes a memory array.

Abstract: A multi-layered memory device is provided. The multi-layered memory device includes two or more memory units and an active circuit unit arranged between each of the two or more memory units. The active circuit includes a decoder. Each memory unit includes one or more memory layers. Each memory layer includes a memory array.

Abstract: An inverter device includes at least a first transistor connected between a power source node and ground. The first transistor includes a first gate and a first terminal that are internally capacitive-coupled to control a boost voltage at a boost node. The first terminal is one of a first source and a first drain of the first transistor.

Abstract: Disclosed is an apparatus and a method for displaying 3D images, which do not need to be reversed, so that users can watch the 3D images without modification in a 3D image system. The 3D images display extracts characteristic information regarding a plurality of imaging devices from left and right images taken by the imaging devices, selects an image among the left and right images, determines a reference element in the selected image, determines a selection element corresponding to the reference element in the non-selected image; calculates a disparity value between the left and right images by using the reference element and the selection element, determines whether the left and right images are normal or not by using the disparity value, and corrects the left and right images based on the determination result.

Abstract: A multi-layered memory device is provided. The multi-layered memory device includes two or more memory units and an active circuit unit arranged between each of the two or more memory units. The active circuit includes a decoder. Each memory unit includes one or more memory layers. Each memory layer includes a memory array.

Abstract: An inverter device includes at least a first transistor connected between a power source node and ground. The first transistor includes a first gate and a first terminal that are internally capacitive-coupled to control a boost voltage at a boost node. The first terminal is one of a first source and a first drain of the first transistor.

Abstract: Provided is a method of manufacturing an oxide semiconductor thin film transistor using a transparent oxide semiconductor as a material for a channel. The method of manufacturing the oxide semiconductor thin film transistor includes forming a passivation layer on a channel layer and performing an annealing process for one hour or more at a temperature of about 100° C. or above.

Abstract: Provided is a method of manufacturing an oxide semiconductor thin film transistor using a transparent oxide semiconductor as a material for a channel. The method of manufacturing the oxide semiconductor thin film transistor includes forming a passivation layer on a channel layer and performing an annealing process for one hour or more at a temperature of about 100° C. or above.

Abstract: Example embodiments provide a method of operating a non-volatile memory in which the non-volatile memory may only be changed from a first state to a second state and may not be changed from the second state to the first state during a programming operation.

Abstract: An apparatus to form semiconductor devices includes an inner tube and an outer tube disposed to surround the inner tube. A plate is disposed at first open end of the inner tube to reduce variation between pressures at a first portion and a second portion inside the inner tube. The sum of areas of through-holes disposed on the plate is 10 to 60 percent of the entire area of the plate. The through-holes may include a first through-hole that is disposed at a central portion of the plate, and second through-holes disposed at an edge portion of the plate. The second through-holes are annularly arranged to surround the first through-hole.

Abstract: A transistor, an inverter including the transistor, and methods of manufacturing the inverter and the transistor. A gate insulating layer of the transistor has a charge trap region. A threshold voltage may be moved in a positive (+) direction by trapping charges in the charge trap region. The transistor may be an enhancement mode oxide thin-film transistor (TFT) and may be used as an element of the inverter.

Abstract: Provided is a non-volatile memory device that may include a plurality of variable resistors, each of the variable resistors having first and second terminals, the plurality of variable resistors arranged as a first layer of a plurality of layers and having data storage capability, at least one common bit plane arranged as a second layer of the plurality of layers and coupled to the first terminal of each of the variable resistors of the first layer, and a plurality of bit lines coupled to the second terminal of each of the variable resistors of the first layer.

Abstract: Light-emitting diodes, and methods of manufacturing the light-emitting diode, are provided wherein a plurality of nano-rods may be formed on a reflection electrode. The plurality of nano-rods extend perpendicularly from an upper surface of the reflection electrode. Each of the nano-rods includes a first region doped with a first type dopant, a second region doped with a second type dopant that is an opposite type to the first type dopant, and an active region between the first region and the second region. A transparent insulating layer may be formed between the plurality of nano-rods. A transparent electrode may be formed on the plurality of nano-rods and the transparent insulating layer.

Abstract: A touch panel may include a plurality of piezoelectric nanowires between a plurality of first transparent electrodes and plurality second transparent electrodes that cross each other; an ultrasonic wave generator configured to generate ultrasonic waves from the piezoelectric nanowires; and at least one ultrasonic wave echo sensor configured to detect ultrasonic waves that are generated from the plurality of piezoelectric nanowires and return to the plurality of piezoelectric nanowires after colliding with an object approaching the plurality of piezoelectric nanowires.

Abstract: Provided are a memory device formed using one or more source materials not containing hydrogen as a constituent element and a method of manufacturing the memory device.

Abstract: A circular polarizer composite including a plane polarizer, a first quarter-wavelength retarder, a cholesteric liquid crystal (CLC) film and a second quarter-wavelength retarder, wherein optical axes of the first quarter-wavelength retarder and the second quarter-wavelength retarder are perpendicularly crossed to each other. Also disclosed is an optical system including the circular polarizer composite and an emissive display module.