Patents by Inventor Yu-Chen Hsu

Yu-Chen Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11018241
    Abstract: The present disclosure provides an integrated circuit. The integrated circuit includes a semiconductor substrate; and a passive polysilicon device disposed over the semiconductor substrate. The passive polysilicon device further includes a polysilicon feature; and a plurality of electrodes embedded in the polysilicon feature.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: May 25, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Harry-Hak-Lay Chuang, Kong-Beng Thei, Sheng-Chen Chung, Chiung-Han Yeh, Lee-Wee Teo, Yu-Ying Hsu, Bao-Ru Young
  • Publication number: 20210141213
    Abstract: A light path adjustment mechanism includes a support, a carrier, an optical plate member, a permanent magnet and an electromagnet. The carrier is disposed in the support and connected to the support by a first elastic member and a second elastic member, the first elastic member and the second elastic member are configured to twist substantially about a first axial direction, and the optical plate member is disposed on the carrier. An attractive force or a repulsive force generated between the permanent magnet and the electromagnet acts in a direction substantially perpendicular to the first axial direction, and one end of the carrier is provided with the permanent magnet or the electromagnet.
    Type: Application
    Filed: January 22, 2021
    Publication date: May 13, 2021
    Inventors: Sheng-Ya HSU, Yu-Chen CHANG, Han-Min CHIU, WEI-SZU LIN
  • Publication number: 20200321326
    Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.
    Type: Application
    Filed: June 22, 2020
    Publication date: October 8, 2020
    Inventors: Yao-Chun Chuang, Yu-Chen Hsu, Hao Chun Liu, Chita Chuang, Chen-Cheng Kuo, Chen-Shien Chen
  • Patent number: 10692848
    Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: June 23, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Chun Chuang, Yu-Chen Hsu, Hao Chun Liu, Chita Chuang, Chen-Cheng Kuo, Chen-Shien Chen
  • Publication number: 20200116758
    Abstract: A probe module includes a circuit board and at least one probe formed on a probe installation surface of the circuit board by a microelectromechanical manufacturing process and including a probe body and a probe tip. The probe body includes first and second end portions and a longitudinal portion having first and second surfaces facing toward opposite first and second directions. The probe tip extends from the probe body toward the first direction and is processed with a gradually narrowing shape by laser cutting. The first and/or second end portion has a supporting seat protruding from the second surface toward the second direction and connected to the probe installation surface, such that the longitudinal portion and the probe tip are suspended above the probe installation surface. The probe has a tiny pinpoint for detecting tiny electronic components, and its manufacturing method is time-saving and high in yield rate.
    Type: Application
    Filed: October 8, 2019
    Publication date: April 16, 2020
    Applicant: MPI CORPORATION
    Inventors: Yu-Chen HSU, Bang-Shun LIU, Ming-Ta HSU, Fuh-Chyun TANG, Shao-Lun WEI, Ya-Fan KU, Yu-Wen WANG
  • Publication number: 20200006311
    Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.
    Type: Application
    Filed: September 12, 2019
    Publication date: January 2, 2020
    Inventors: Yao-Chun Chuang, Yu-Chen Hsu, Haochun Liu, Chita Chuang, Chen-Cheng Kuo, Chen-Shien Chen
  • Patent number: 10436818
    Abstract: A method of making a cantilever MEMS probe module includes the steps of forming a cantilever MEMS probe on a first surface of a circuit substrate by a MEMS fabrication process in a way that the cantilever MEMS probe has a support post electrically and mechanically connected with an electric contact of the first surface, a cantilever arm connected with the support post, and a needle connected with the cantilever arm, and forming a through hole penetrating through the first surface and a second surface opposite to the first surface of the circuit substrate and corresponding in position to the needle and a part of the cantilever arm by using a cutting tool to cut the circuit substrate from the second surface toward the first surface of the circuit substrate. A probe module made by the method is disclosed too.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: October 8, 2019
    Assignee: MPI CORPORATION
    Inventors: Yu-Chen Hsu, Yu-Wen Wang, Horng-Kuang Fan, Mao-Fa Shen
  • Publication number: 20190231926
    Abstract: A bone graft composition promoting osteogenic capacity is provided. The bone graft composition includes an osteoinductive component including statins and a biodegradable polymer and an osteoconductive matrix including a biodegradable calcium phosphate ceramic, wherein the amount of the calcium phosphate ceramic is about 70 to 95 wt % based on the total weight of the bone graft composition. The bone graft composition can achieve the optimal release control characteristics of the statins in the osteoinductive component.
    Type: Application
    Filed: January 29, 2019
    Publication date: August 1, 2019
    Inventors: SUNG-CHING CHEN, PO-HONG LAI, KAI-CHUN CHANG, YU-CHEN HSU
  • Patent number: 10366971
    Abstract: A structure includes a first package component, and a second package component over and bonded to the first package component. A supporting material is disposed in a gap between the first package component and the second package component. A molding material is disposed in the gap and encircling the supporting material.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: July 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chen Hsu, Yu-Feng Chen, Han-Ping Pu, Meng-Tse Chen, Guan-Yu Chen
  • Publication number: 20190212368
    Abstract: A probe card includes a space transformer, a printed circuit board and a plurality of welding elements. The space transformer is disposed with a plurality of first conductive protrusions. Each of the first conductive protrusions has a first end surface. The printed circuit board is disposed with a plurality of second conductive protrusions. Each of the second conductive protrusions has a second end surface. The welding elements are respectively and electrically connected between each of the second end surfaces and the corresponding first end surface. A first surface of the space transformer away from the printed circuit board has a first degree of flatness. A second surface of the printed circuit board away from the space transformer has a second degree of flatness. The first degree of flatness is less than the second degree of flatness.
    Type: Application
    Filed: January 4, 2019
    Publication date: July 11, 2019
    Inventors: Hsien-Ta HSU, Yu-Chen HSU, Ching-Hua WU, Kuan-Chun CHOU, Horng-Kuang FAN
  • Patent number: 10290919
    Abstract: An electronic device is provided, including a display module, an input module, a hinge module, and an antenna. The hinge module connects the display module and the input module and has a first side and an opposite second side. The antenna is disposed in the hinge module and is situated on the first side. When the display module is rotated with respect to the input module, the hinge module forces the antenna to move from the first side to the second side.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: May 14, 2019
    Assignee: WISTRON CORP.
    Inventors: Yu Chen Hsu, Ching Pin Hsu, Chien An Chou
  • Publication number: 20190006736
    Abstract: An electronic device is provided, including a display module, an input module, a hinge module, and an antenna. The hinge module connects the display module and the input module and has a first side and an opposite second side. The antenna is disposed in the hinge module and is situated on the first side. When the display module is rotated with respect to the input module, the hinge module forces the antenna to move from the first side to the second side.
    Type: Application
    Filed: September 29, 2017
    Publication date: January 3, 2019
    Inventors: Yu Chen Hsu, Ching Pin Hsu, Chien An Chou
  • Publication number: 20180267083
    Abstract: A microelectromechanical probe has tail, head and body portions, and includes a pinpoint layer having a planarized top surface where a structural layer having first and second sides, a cutting face and a front terminal surface adjoining the first and second sides is disposed. The cutting face descends from the top surface of the structural layer toward the pinpoint layer to the front terminal surface. The front terminal surface extends from a front end of the cutting face to the top surface of the pinpoint layer. The pinpoint layer has a pinpoint protruding over the front terminal surface and located at the head portion. Within the head portion, the pinpoint layer is greater in hardness and less in electrical conductivity than the structural layer. The probe makes small probing marks, is highly recognizable in an automatic pinpoint recognition process, and can be conveniently installed.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 20, 2018
    Inventors: Shao-Lun WEI, Yu-Chen HSU, Mao-Fa SHEN, Neng-Hsuan KUO, Chien-Yu LIN, Ching-Kai CHU
  • Publication number: 20180024163
    Abstract: A method of making a cantilever MEMS probe module includes the steps of forming a cantilever MEMS probe on a first surface of a circuit substrate by a MEMS fabrication process in a way that the cantilever MEMS probe has a support post electrically and mechanically connected with an electric contact of the first surface, a cantilever arm connected with the support post, and a needle connected with the cantilever arm, and forming a through hole penetrating through the first surface and a second surface opposite to the first surface of the circuit substrate and corresponding in position to the needle and a part of the cantilever arm by using a cutting tool to cut the circuit substrate from the second surface toward the first surface of the circuit substrate. A probe module made by the method is disclosed too.
    Type: Application
    Filed: July 18, 2017
    Publication date: January 25, 2018
    Inventors: YU-CHEN HSU, YU-WEN WANG, HORNG-KUANG FAN, MAO-FA SHEN
  • Patent number: 9780046
    Abstract: An embodiment device includes a semiconductor substrate and an interconnect structure over the semiconductor substrate. The interconnect structure includes a functional circuit region and a first portion of a seal ring spaced apart from the functional circuit region by a buffer zone. The device also includes a passivation layer over the interconnect structure and a second portion of the seal ring over the passivation layer and connected the first portion of the seal ring. The second portion of the seal ring is disposed in the buffer zone.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: October 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Yu Pan, Han-Ping Pu, Pei-Haw Tsao, Yu-Chen Hsu
  • Publication number: 20170176497
    Abstract: A microelectromechanical probe is manufactured by a MEMS manufacturing process forming a probe body and a cutting process providing a pinpoint portion a cutting face. The probe has a top surface, a body portion, and a pinpoint portion extended in a probing direction from the body portion and provided with first and second sides and a probing end oriented in the probing direction. The cutting face is provided on the top surface, adjoins the first and second sides and the probing end, and has at least one cut mark formed by the cutting process, extended from the first side to the second side and non-parallel to the probing direction. The cutting face descends from an edge cut mark to the probing end.
    Type: Application
    Filed: December 15, 2016
    Publication date: June 22, 2017
    Inventors: Shao-Lun WEI, Yu-Chen HSU, Mao-Fa SHEN, Chih-Hao HSU
  • Patent number: 9673184
    Abstract: A package includes a first package component having a top surface, a second package component bonded to the top surface of the first package component, and a plurality of electrical connectors at the top surface of the first package component. A molding material is over the first package component and molding the second package component therein. The molding material includes a first portion overlapping the second package component, wherein the first portion includes a first top surface, and a second portion encircling the first portion and molding bottom portions of the plurality of electrical connectors therein. The second portion has a second top surface lower than the first top surface.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: June 6, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chen Hsu, Chun-Hung Lin, Yu-Feng Chen, Han-Ping Pu
  • Publication number: 20170141052
    Abstract: An embodiment device includes a semiconductor substrate and an interconnect structure over the semiconductor substrate. The interconnect structure includes a functional circuit region and a first portion of a seal ring spaced apart from the functional circuit region by a buffer zone. The device also includes a passivation layer over the interconnect structure and a second portion of the seal ring over the passivation layer and connected the first portion of the seal ring. The second portion of the seal ring is disposed in the buffer zone.
    Type: Application
    Filed: November 13, 2015
    Publication date: May 18, 2017
    Inventors: Hsin-Yu Pan, Han-Ping Pu, Pei-Haw Tsao, Yu-Chen Hsu
  • Publication number: 20160172348
    Abstract: A structure includes a first package component, and a second package component over and bonded to the first package component. A supporting material is disposed in a gap between the first package component and the second package component. A molding material is disposed in the gap and encircling the supporting material.
    Type: Application
    Filed: February 19, 2016
    Publication date: June 16, 2016
    Inventors: Yu-Chen Hsu, Yu-Feng Chen, Han-Ping Pu, Meng-Tse Chen, Guan-Yu Chen
  • Publication number: 20160155733
    Abstract: A method comprises depositing a protection layer over a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.
    Type: Application
    Filed: February 8, 2016
    Publication date: June 2, 2016
    Inventors: Yao-Chun Chuang, Yu-Chen Hsu, Hao-Juin Liu, Chita Chuang, Chen-Cheng Kuo, Chen-Shien Chen