Abstract: A decoding method for a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The decoding method includes: reading first data from memory cells of the rewritable non-volatile memory module, wherein the first data includes a first bit stored in a first memory cell; obtaining a storage state of at least one second memory cell which is different from the first memory cell; obtaining first reliability information corresponding to the first bit according to the storage state of the second memory cell, wherein the first reliability information is different from default reliability information corresponding to the first bit; and decoding the first data according to the first reliability information. Therefore, a decoding efficiency can be improved.

Abstract: A 3D model reconstruction method includes: providing, by one or more laser emitters, laser beams; capturing, by a depth camera on an electronic device, a depth data of a target object when that the electronic device moves around the target object; detecting, by one or more light sensors on the electronic device, the laser beams emitted by the one or more laser emitters to obtain a camera pose initial value of the depth camera accordingly; and performing, by a processing circuit, a 3D reconstruction of the target object using the depth data based on the camera pose initial value to output a 3D model of the target object.

Abstract: A data encoding method, a memory control circuit unit and a memory storage device are provided. The method includes: writing a first data into a first physical programming unit of a first physical programming unit group among a plurality of physical programming unit groups; writing a second data into a second physical programming unit of a second physical programming unit group among the plurality of physical programming unit groups; encoding the first data and the second data to generate an encoded data; and writing the encoded data into a third physical programming unit group among the plurality of physical programming unit groups.

Abstract: An error processing method for a rewritable non-volatile memory module, a memory storage device and a memory controlling circuit unit are provided. The rewritable non-volatile memory module includes a plurality of memory cells. The error processing method includes: sending a first read command sequence for reading a plurality of bits from the memory cells; performing a first decoding on the bits; determining whether each error belongs to a first type error or a second type error if the bits have at least one error; recording related information of a first error in the at least one error if the first error belongs to the first type error; and not recording the related information of the first error if the first error belongs to the second type error. Accordingly, errors with particular type may be processed suitably.

Abstract: A data writing method for a rewritable non-volatile memory module having a plurality of physical erasing units and a memory control circuit unit and a memory storage apparatus using the same are provided. Each of the physical erasing units has a plurality of physical programming unit sets, and each of the physical programming unit sets has a plurality of physical programming unit. The method includes receiving data and arranging the data to generate a first data stream and a second data stream. The method also includes encoding the first data stream and the second data stream to generate a third data stream, and issuing a programming command sequence to write the first data stream, the second data stream and the third data stream respectively into a first physical programming unit, a second physical programming unit and a third physical programming unit of a physical programming unit set.

Abstract: Provided are a method, system, and computer program product for processing read and write requests in a storage controller. A host adaptor in the storage controller receives a write request from a host system for a storage address in a storage device. The host adaptor sends write information indicating the storage address updated by the write request to a device adaptor in the storage controller. The host adaptor writes the write data to a cache in the storage controller. The device adaptor indicates the storage address indicated in the write information to a modified storage address list stored in the device adaptor, wherein the modified storage address list indicates modified data in the cache for storage addresses in the storage device.

Abstract: The memory programming method includes: applying a first programming parameter set to program first data stream into a first physical programming unit, and the first physical programming unit is composed of memory cells at intersections between a first bit line string of a physical erasing unit and a first word line layer of the physical erasing unit. The memory programming method further includes applying a second programming parameter set to program the first data stream into all of the memory cells of the first physical programming unit again after completely programming the first data stream into all of the memory cells of the first physical programming unit.

Abstract: A memory management method, a memory storage device and a memory controlling circuit unit are provided. The method includes: programming data into a plurality of memory cells of a rewritable non-volatile memory module; determining whether a storage state of the data conforms with a first condition or a second condition based on a default bias range and a threshold voltage distribution of the memory cells storing the data; performing a first operation if the storage state of the data conforms with the first condition; and performing a second operation if the storage state of the data conforms with the second condition. Accordingly, the probability of misidentifying the valid data as the invalid data may be reduced.

Abstract: The memory programming method includes: applying a first programming parameter set to program first data stream into a first physical programming unit, and the first physical programming unit is composed of memory cells at intersections between a first bit line string of a physical erasing unit and a first word line layer of the physical erasing unit. The memory programming method further includes applying a second programming parameter set to program the first data stream into all of the memory cells of the first physical programming unit again after completely programming the first data stream into all of the memory cells of the first physical programming unit.

Abstract: A read voltage tracking method, a memory storage device and a memory control circuit unit are provided. The method includes obtaining a plurality of test read voltages corresponding to a plurality of voltage adjustment values, and obtaining an optimal read voltage according to the voltage adjustment values. The step of obtaining the test read voltages includes obtaining a second test read voltage by adjusting a first test read voltage according to a first voltage adjustment value, and obtaining a third test read voltage by adjusting the second test read voltage according to a second voltage adjustment value, and the first test read voltage is a preset test read voltage, the first voltage adjustment value is a preset voltage adjustment value, and the first voltage adjustment value is different from the second voltage adjustment value.

Abstract: There is a method and system for capability-based resource allocation in a software-defined environment that performs the following steps (not necessarily in the following order): (i) determining a set of capability characteristics for a plurality of workload resources within a software-defined environment; (ii) determining a set of workload components for a specified workload; and (iii) identifying a set of workload resources from the plurality of workload resources to allocate to the specified workload based, at least in part, on the set of capability characteristics corresponding to each workload within the set of workload resources. A workload component of the set of workload components has a unique set of workload characteristics.

Abstract: A decoding method for a rewritable non-volatile memory module is provided according to an exemplary embodiment of the disclosure. The method includes: obtaining usage state information of first memory cells; reading second memory cells by a first read voltage level to obtain at least one first bit and reading the second memory cells by a second read voltage level to obtain at least one second bit according to the usage state information, wherein the first bit corresponds to a storage state of a first part of memory cells among the second memory cells, the second bit corresponds to a storage state of a second part of memory cell among the second memory cells, and the first read voltage level is different from the second read voltage level; and decoding third bits including the first bit and the second bit. Therefore, a decoding efficiency can be improved.

Abstract: An I/O enclosure module is provided with one or more I/O enclosures having a plurality of slots for receiving electronic devices. A host adapter is connected a first slot of the I/O enclosure module and is configured to connect a host to the I/O enclosure. A device adapter is connected to a second slot of the I/O enclosure module and is configured to connect a storage device to the I/O enclosure module. A flash cache is connected to a third slot of the I/O enclosure module and includes a flash-based memory configured to cache data associated with data requests handled through the I/O enclosure module. A primary processor complex manages data requests handled through the I/O enclosure module by communicating with the host adapter, device adapter, and flash cache to manage to the data requests.

Abstract: The present disclosure provides a memory management method for a rewritable non-volatile memory module. The rewritable non-volatile memory module includes physical programming units, each of which includes multiple bits. The memory management method includes: identifying a first physical programming unit by applying a predetermined read voltage, where the first physical programming unit is identified as in a fully-erased status; identifying a second and a third physical programming units which are programmed before the first physical programming unit; acquiring status data of the second and the third physical programming unit; computing a difference of the status data between the second and the third physical programming unit; if the difference is larger than a threshold, identifying the second physical programming unit as in a program failure status.

Abstract: A data programming method, a memory storage device and a memory control circuit unit are provided. The method includes: receiving first data and programming the first data into a first lower physical programming unit; receiving second data; in response to the second data to be programmed into a first upper physical programming unit corresponding to the first lower physical programming unit, performing a first data obtaining operation which does not include reading the first lower physical programming unit by using a default read voltage; and programming the second data into the first upper physical programming unit according to the third data obtained through the first data obtaining operation.

Abstract: Provided are a method, system, and computer program product for processing read and write requests in a storage controller. A host adaptor in the storage controller receives a write request from a host system for a storage address in a storage device. The host adaptor sends write information indicating the storage address updated by the write request to a device adaptor in the storage controller. The host adaptor writes the write data to a cache in the storage controller. The device adaptor indicates the storage address indicated in the write information to a modified storage address list stored in the device adaptor, wherein the modified storage address list indicates modified data in the cache for storage addresses in the storage device.

Abstract: An efficient cloning mechanism is provided for a distributed storage environment, where, for example, a private cloud computing environment and a public cloud computing environment are included in a hybrid cloud computing environment (on-premise object storage to off-premise computation resources), to improve computation workloads. The disclosed algorithm forms an efficient cloning mechanism in a hybrid storage environment where the read/write speed of data from the disk is not limited by its angular velocity.

Abstract: A memory programming method for a rewritable non-volatile memory module having memory cells is provided. The memory programming method includes: performing a first programming process on the memory cells according to write data and obtaining a first programming result of the first programming process; grouping the memory cells into programming groups according to the first programming result; and performing a second programming process on the memory cells according to the write data. The second programming process includes: programming a first programming group among the programming groups by using a first program voltage; and programming a second programming group among the programming groups by using a second program voltage. The first program voltage and the second program voltage are different. Moreover, a memory control circuit unit and a memory storage device are provided.

Abstract: An exposure value adjustment apparatus, method, and non-transitory tangible machine-readable medium thereof are provided. The exposure value adjustment apparatus includes a camera module and a processor. The camera module captures a reference image by a base exposure value. The processor generates a histogram of the reference image, divides the histogram into a low partial histogram, a middle partial histogram, and a high partial histogram by a first threshold and a second threshold, decides a high exposure value according to the low partial histogram and the middle partial histogram, decides a low exposure value according to the high partial histogram and the middle partial histogram, and decides a middle exposure value according to the high exposure value and the low exposure value. The low exposure value is lower than the high exposure value, and the middle exposure value is between the high exposure value and the low exposure value.

Abstract: A method for generating a random number, a memory storage device and a control circuit are provided. The method includes: writing data into a plurality of memory cells; reading at least one of the memory cells repeatedly according to a first read voltage to obtain a plurality of sensing currents; and generating the random number according to the sensing currents.