Patents by Inventor Yu-Chi Pan

Yu-Chi Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210296483
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially coplanar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 23, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li HUANG, Hsin-Che CHIANG, Yu-Chi PAN, Chun-Ming YANG, Chun-Sheng LIANG, Ying-Liang CHUANG, Ming-Hsi YEG
  • Patent number: 11031500
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: June 8, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li Huang, Chun-Sheng Liang, Ming-Hsi Yeh, Ying-Liang Chuang, Hsin-Che Chiang, Chun-Ming Yang, Yu-Chi Pan
  • Publication number: 20200044073
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Application
    Filed: February 27, 2019
    Publication date: February 6, 2020
    Applicant: Taiwam Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li HUANG, Chun-Sheng Liang, Ming-Hsi Yeh, Ying-Liang Chuang, Hsin-Che Chiang, Chun-Ming Yang, Yu-Chi Pan