Patents by Inventor Yu-Chung Shen

Yu-Chung Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210357145
    Abstract: A data writing method for a rewritable non-volatile memory module is provided according to embodiments of the disclosure. The method includes: writing first-type data into a first physical unit at a first write speed; and writing second-type data into a second physical unit at a second write speed. The first-type data is different from the second-type data, and the first write speed is different from the second write speed.
    Type: Application
    Filed: July 3, 2020
    Publication date: November 18, 2021
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei-Cheng Li, Yu-Chung Shen, Wei-Liang Huang, Chao-Kai Zhang
  • Patent number: 9317418
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: April 19, 2016
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Publication number: 20140297936
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Application
    Filed: June 17, 2014
    Publication date: October 2, 2014
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Patent number: 8837248
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: September 16, 2014
    Assignee: Phison Electronics Corp.
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Patent number: 8826461
    Abstract: A method and a system for protecting data, a storage device, and a storage device controller are provided. In the present method, when a host accesses data in the storage device, whether the host performs a play operation or a copy operation on the data is first determined. If the host performs the play operation on the data, the storage device continues to execute the play operation so as to allow the host to access the data. On the other hand, if the host performs the copy operation on the data, the storage device executes an interference procedure so as to prevent or retard the data from being copied into the host.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: September 2, 2014
    Assignee: Phison Electronics Corp.
    Inventors: Hsiang-Hsiung Yu, Yu-Chung Shen, Yun-Chieh Chen
  • Patent number: 8806301
    Abstract: A data writing method for writing data from a host system into a flash memory chip is provided, and the flash memory chip has a plurality of physical blocks. The method includes receiving a host writing command and write data thereof, and executing the host writing command. The method also includes giving a data program command for writing the write data into one of the physical blocks of the flash memory chip, and giving a command for determining whether data stored in the physical block has any error bit. Accordingly, the method can effectively ensure the correctness of data to be written into the flash memory chip.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: August 12, 2014
    Assignee: Phison Electronics Corp.
    Inventors: Hsiang-Hsiung Yu, Yi-Hsiang Huang, Chung-Lin Wu, Yu-Chung Shen
  • Patent number: 8416621
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: April 9, 2013
    Assignee: Phison Electronics Corp.
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Patent number: 8255656
    Abstract: A storage device, a memory controller, and a data protection method are provided. The method includes when receiving a read command sent by a host, adopting a corresponding output flow rate limit to determine an operation that is executed on read data corresponding to the read command by the host according to location information included in the read command or a type of a transmission interface between the host and the storage device. The method also includes executing an interference procedure by the storage device to prevent the read data from being copied to the host or slow down the speed of copying the read data to the host when identifying that the operation is a copy operation.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: August 28, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Hsiang-Hsiung Yu, Chung-Lin Wu, Yi-Hsiang Huang, Yu-Chung Shen
  • Patent number: 8230162
    Abstract: A block management method for managing blocks of a flash memory storage device is provided. The flash memory storage device includes a flash memory controller. The block management method includes the following steps. At least a part of the blocks is grouped into a first partition and a second partition. Whether an authentication code exists is determined. When the authentication code exists, the blocks belonging to the first partition are provided for a host system to access, so the host system displays the first partition and hides the second partition. An authentication information is received from the host system. Whether the authentication information and the authentication code are identical is authenticated. When the authentication information and the authentication code are identical, the blocks belonging to the second partition are provided for the host system to access, so the host system displays the second partition and hides the first partition.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: July 24, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Hsiang-Hsiung Yu, Yi-Hsiang Huang, Chung-Lin Wu, Yu-Chung Shen
  • Publication number: 20120089766
    Abstract: A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system.
    Type: Application
    Filed: February 14, 2011
    Publication date: April 12, 2012
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Hsiang-Hsiung Yu, Ta-Chuan Wei, Yun-Chieh Chen, Yu-Chung Shen
  • Publication number: 20110145482
    Abstract: A block management method for managing blocks of a flash memory storage device is provided. The flash memory storage device includes a flash memory controller. The block management method includes the following steps. At least a part of the blocks is grouped into a first partition and a second partition. Whether an authentication code exists is determined. When the authentication code exists, the blocks belonging to the first partition are provided for a host system to access, so the host system displays the first partition and hides the second partition. An authentication information is received from the host system. Whether the authentication information and the authentication code are identical is authenticated. When the authentication information and the authentication code are identical, the blocks belonging to the second partition are provided for the host system to access, so the host system displays the second partition and hides the first partition.
    Type: Application
    Filed: February 12, 2010
    Publication date: June 16, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Hsiang-Hsiung Yu, Yi-Hsiang Huang, Chung-Lin Wu, Yu-Chung Shen
  • Publication number: 20110087950
    Abstract: A data writing method for writing data from a host system into a flash memory chip is provided, and the flash memory chip have a plurality of physical blocks. The method includes receiving a host writing command and write data thereof, and executing the host writing command. The method also includes giving a data program command for writing the write data into one of the physical blocks to the flash memory chip, and giving a command for determining whether data stored in the physical block has any error bit. Accordingly, the method can effectively ensure the correctness of data to be written into the flash memory chip.
    Type: Application
    Filed: November 19, 2009
    Publication date: April 14, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Hsiang-Hsiung Yu, Yi-Hsiang Huang, Chung-Lin Wu, Yu-Chung Shen
  • Publication number: 20110066818
    Abstract: A storage device, a memory controller, and a data protection method are provided. The method includes when receiving a read command sent by a host, adopting a corresponding output flow rate limit to determine an operation that is executed on read data corresponding to the read command by the host according to location information included in the read command or a type of a transmission interface between the host and the storage device. The method also includes executing an interference procedure by the storage device to prevent the read data from being copied to the host or slow down the speed of copying the read data to the host when identifying that the operation is a copy operation.
    Type: Application
    Filed: June 24, 2010
    Publication date: March 17, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Hsiang-Hsiung Yu, Chung-Lin Wu, Yi-Hsiang Huang, Yu-Chung Shen
  • Publication number: 20110067118
    Abstract: A method and a system for protecting data, a storage device, and a storage device controller are provided. In the present method, when a host accesses data in the storage device, whether the host performs a play operation or a copy operation on the data is first determined. If the host performs the play operation on the data, the storage device continues to execute the play operation so as to allow the host to access the data. On the other hand, if the host performs the copy operation on the data, the storage device executes an interference procedure so as to prevent or retard the data from being copied into the host.
    Type: Application
    Filed: November 20, 2009
    Publication date: March 17, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Hsiang-Hsiung Yu, Yu-Chung Shen, Yun-Chieh Chen