Abstract: Techniques are described for implementing a split-select-block (split-SEL) complementary metal-oxide semiconductor (CMOS) image sensor (CIS) pixel physical architecture, such as for reducing noise in low-light application contexts. The split-SEL CIS pixel physical architecture can include a pixel block with one or more photodiodes. Above the photodiodes, there can be: a first oxide diffusion region with a reset block and a gain block disposed thereon; and a second oxide diffusion region with a select block disposed thereon. Below the photodiodes, there can be a third oxide diffusion region with a source follower (SF) block (e.g., a square-gate SF transistor) disposed thereon. A trace can be routed through the set of photodiodes to couple the source of the SF block with the select block. The architecture permits an appreciable increase in the physical gate length and/or other features.

Abstract: A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the ordinary FD node. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Abstract: A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. All of the front-end circuit, the signal storage circuit and the output circuit are coupled to a common floating diffusion (FD) node. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage of the signal storage circuit. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to voltage levels of the common FD node, respectively.

Abstract: A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the signal storage circuit. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Abstract: A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. The signal storage circuit is coupled to the front-end circuit, and the output circuit is coupled to the signal storage circuit. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to the other voltage levels, respectively.

Abstract: A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. All of the front-end circuit, the signal storage circuit and the output circuit are coupled to a common floating diffusion (FD) node. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage of the signal storage circuit. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to voltage levels of the common FD node, respectively.

Abstract: A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the ordinary FD node. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Abstract: A pixel circuit includes a front-end circuit, a signal storage circuit, and an output circuit. The signal storage circuit is coupled to the front-end circuit, and the output circuit is coupled to the signal storage circuit. The front-end circuit is arranged to generate pixel signals. The signal storage circuit is arranged to store the pixel signals generated by the front-end circuit, wherein when the pixel circuit is selected for performing a read-out operation, the pixel signals stored in the signal storage circuit are pulled up from original voltage levels to other voltage levels higher than the original voltage levels according to a voltage increment applied to a control voltage. When the pixel circuit is selected for performing the read-out operation, the output circuit generates output signals on an output terminal according to the other voltage levels, respectively.

Abstract: A pixel circuit is disclosed. The pixel circuit includes a photodiode (PD), a transmission circuit, a reset circuit, a signal storage circuit and a buffer circuit. The transmission circuit is coupled between the PD and an ordinary floating diffusion (FD) node. The reset circuit is coupled to the ordinary FD node. The signal storage circuit is coupled to the ordinary FD node. The buffer circuit is coupled to the signal storage circuit. The signal storage circuit may store a PD signal on a specific node having a reduced leakage path in comparison with the ordinary FD node during a holding phase of the pixel circuit, wherein the holding phase is a time interval starting from a first time point at which the PD signal is stored on the specific node and ending at a second time point at which the pixel circuit is selected for performing a read-out operation.

Abstract: A pixel structure of an image sensor is provided and includes following units. A crystalline layer of a first doping type is formed on a substrate. A photodiode region is formed in the crystalline layer. A gate of a source follower transistor is formed on a top surface of the crystalline layer. A reset gate is formed on the top surface of the crystalline layer. A doped region of a second doping type is formed in the crystalline layer and formed between the reset gate and the gate of the source follower. The first doping type is different from the second doping type, and the photodiode region is connected to the doped region under the top surface of the crystalline layer as an anti-blooming path.

Abstract: A pixel structure of an image sensor is provided and includes following units. A crystalline layer of a first doping type is formed on a substrate. A photodiode region is formed in the crystalline layer. A gate of a source follower transistor is formed on a top surface of the crystalline layer. A reset gate is formed on the top surface of the crystalline layer. A doped region of a second doping type is formed in the crystalline layer and formed between the reset gate and the gate of the source follower. The first doping type is different from the second doping type, and the photodiode region is connected to the doped region under the top surface of the crystalline layer as an anti-blooming path.

Abstract: The invention is directed to a method of operating an image sensor. A first integration is performed on a first photodiode of a pixel circuit to obtain at least one first image signal. A second integration is performed on a second photodiode of the pixel circuit to obtain a second image signal, the first photodiode having a photodiode area larger than the second photodiode. A third integration is performed by collecting blooming charge overflowing from the first photodiode to obtain an overflow image signal. The first integration has longest integration time and the third integration has shortest integration time among the first integration, the second integration and the third integration.

Abstract: The invention is directed to a method of operating an image sensor. A first integration is performed on a first photodiode of a pixel circuit to obtain at least one first image signal. A second integration is performed on a second photodiode of the pixel circuit to obtain a second image signal, the first photodiode having a photodiode area larger than the second photodiode. A third integration is performed by collecting blooming charge overflowing from the first photodiode to obtain an overflow image signal. The first integration has longest integration time and the third integration has shortest integration time among the first integration, the second integration and the third integration.

Abstract: An image sensor includes a substrate, multiple pixel regions separately disposed in the substrate, and a pick up region including a doping region and a pick up plug obliquely disposed on the doping region and directly contacting the doping region.

Abstract: An image sensor includes a substrate, multiple pixel regions separately disposed in the substrate, and a pickup region including a doping region and a pick up plug obliquely disposed on the doping region and directly contacting the doping region.

Abstract: The present invention provides an image sensor and a fabricating method of the image sensor. The image sensor comprises: a first type epitaxial layer, a photodiode region, a first type well region, a gate region of a source follower transistor, and a first type implant isolation region. The first type well region is formed within the first type epitaxial layer with a first horizontal distance to the photodiode region and a vertical distance to a surface of the first type epitaxial layer. The gate region of a source follower transistor is formed on the surface of the first type epitaxial layer and above the first type well region, and has a second horizontal distance to the photodiode region. There is a distance between the first type implant isolation region and the first type well region as an anti-blooming path.

Abstract: The present invention provides an image sensor and a fabricating method of the image sensor. The image sensor comprises: a first type epitaxial layer, a photodiode region, a first type well region, a gate region of a source follower transistor, and a first type implant isolation region. The first type well region is formed within the first type epitaxial layer with a first horizontal distance to the photodiode region and a vertical distance to a surface of the first type epitaxial layer. The gate region of a source follower transistor is formed on the surface of the first type epitaxial layer and above the first type well region, and has a second horizontal distance to the photodiode region. There is a distance between the first type implant isolation region and the first type well region as an anti-blooming path.

Abstract: An image sensor structure, which comprises: a pixel; a first metal line; a second metal line, located under the first metal line; a conductive region, located under the second metal line; and at least one dummy contact, provided between the second metal line and the conductive region, wherein the second metal line and the conductive region are not electrically connected to each other via the dummy contact