Patents by Inventor Yu-Hua Chen

Yu-Hua Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10700161
    Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure. A substrate structure obtained by the manufacturing method of the substrate structure is provided.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: June 30, 2020
    Assignee: Unimicron Technology Corp.
    Inventors: Yu-Hua Chen, Fu-Yang Chen, Chun-Hsien Chien, Chien-Chou Chen, Wei-Ti Lin
  • Patent number: 10685922
    Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: June 16, 2020
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Pu-Ju Lin, Cheng-Ta Ko, Yu-Hua Chen, Tzyy-Jang Tseng, Ra-Min Tain
  • Publication number: 20200161518
    Abstract: A light-emitting diode package including a carrier structure, a patterned conductive layer, at least one chip, a dielectric layer, at least one first conductive via, a build-up circuit structure, and at least one light-emitting diode is provided. The patterned conductive layer is disposed on the carrier structure. The chip is disposed on the carrier structure. The dielectric layer is disposed on the carrier structure and encapsulates the chip and the patterned conductive layer. The first conductive via penetrates the dielectric layer and is electrically connected to the patterned conductive layer. The build-up circuit structure is disposed on the dielectric layer and electrically connected to the first conductive via. The light-emitting diode is disposed on the build-up circuit structure.
    Type: Application
    Filed: February 21, 2019
    Publication date: May 21, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Yi-Cheng Lin, Yu-Hua Chen, Chun-Hsien Chien, Chien-Chou Chen, Cheng-Hui Wu
  • Patent number: 10658282
    Abstract: A package substrate structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The vias and the pads are disposed on the first substrate, and fills the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar is disposed between the first substrate and the second substrate, where each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills the gaps between the conductive pillars. A bonding method of the package substrate structure is also provided.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: May 19, 2020
    Assignee: Unimicron Technology Corp.
    Inventors: Cheng-Ta Ko, Kai-Ming Yang, Yu-Hua Chen, Tzyy-Jang Tseng
  • Patent number: 10651358
    Abstract: A light emitting device package structure includes a substrate, a circuit layer structure, a light emitting device, a first redistribution layer, a conductive connector, a second redistribution layer, and a chip. The circuit layer structure is disposed over the substrate, and the circuit layer structure includes a first circuit layer. The light emitting device is disposed over the circuit layer structure and is electrically connected with the first circuit layer. The first redistribution layer is disposed over the light emitting device and includes a second circuit layer and a conductive contact contacting the second circuit layer. The conductive connector connects the first circuit layer and the second circuit layer. The second redistribution layer is disposed over the first redistribution layer and includes a third circuit layer contacting the conductive contact. The chip is disposed over the second redistribution layer and is electrically connected with the third circuit layer.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: May 12, 2020
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Pei-Wei Wang, Cheng-Ta Ko, Yu-Hua Chen, De-Shiang Liu, Tzyy-Jang Tseng
  • Publication number: 20200118989
    Abstract: A light emitting device package structure includes: a substrate structure including a substrate and a first circuit layer, the substrate having a first surface, the first circuit layer over the first surface; a chip over the substrate structure and electrically connected to the first circuit layer; a conductive connector over the substrate structure and electrically connected to the first circuit layer; a redistribution structure over the conductive connector, the redistribution structure including a first redistribution layer and a second redistribution layer over the first redistribution layer, the first redistribution layer including a second circuit layer electrically connected to the first circuit layer and a conductive contact in contact with the second circuit layer, the second redistribution layer including a third circuit layer in contact with the conductive contact; and a light emitting device over the redistribution structure and electrically connected to the third circuit layer.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 16, 2020
    Inventors: Pei-Wei WANG, Cheng-Ta KO, De-Shiang LIU, Yu-Hua CHEN
  • Patent number: 10588214
    Abstract: A stacked structure includes a circuit board, an electronic component, metallic cores, and insulating cladding layers. The circuit board includes first bonding pads. The electronic component includes second bonding pads that are opposite to the first bonding pads. Each metallic core is connected to a corresponding first bonding pad and a corresponding second bonding pad. The metallic cores have a curved surface interposed between the corresponding first bonding pad and the corresponding second bonding pad. The insulating cladding layers are separated from each other and cover the curved surfaces of the metallic cores.
    Type: Grant
    Filed: August 18, 2019
    Date of Patent: March 10, 2020
    Assignee: UNIMICRON TECHNOLOGY CORP.
    Inventors: Tzyy-Jang Tseng, Kai-Ming Yang, Pu-Ju Lin, Cheng-Ta Ko, Yu-Hua Chen
  • Publication number: 20200075711
    Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure. A substrate structure obtained by the manufacturing method of the substrate structure is provided.
    Type: Application
    Filed: October 15, 2018
    Publication date: March 5, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Yu-Hua Chen, Fu-Yang Chen, Chun-Hsien Chien, Chien-Chou Chen, Wei-Ti Lin
  • Publication number: 20200043890
    Abstract: A package structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The pads are disposed on the first substrate, and fill in the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills in the gaps between the conductive pillars. A bonding method of the package structure is also provided.
    Type: Application
    Filed: October 5, 2018
    Publication date: February 6, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Cheng-Ta Ko, Kai-Ming Yang, Yu-Hua Chen
  • Publication number: 20200043839
    Abstract: A package substrate structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The vias and the pads are disposed on the first substrate, and fills in the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar is disposed between the first substrate and the second substrate, where each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills in the gaps between the conductive pillars. A bonding method of the package substrate structure is also provided.
    Type: Application
    Filed: October 23, 2018
    Publication date: February 6, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Cheng-Ta Ko, Kai-Ming Yang, Yu-Hua Chen, Tzyy-Jang Tseng
  • Publication number: 20200013744
    Abstract: A circuit board element including an insulating layer, a circuit layer, a protective layer, a plurality of solder balls, and a dielectric layer is provided. The circuit layer is disposed on the insulating layer. The protective layer is disposed on the circuit layer and has a plurality of openings exposing the circuit layer. The plurality of solder balls are disposed on the protective layer and embedded in the corresponding openings. The dielectric layer is disposed between the solder balls and the protective layer. A manufacturing method of a circuit board element is also provided.
    Type: Application
    Filed: November 6, 2018
    Publication date: January 9, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Yu-Chung Hsieh, Chun-Hsien Chien, Yu-Hua Chen
  • Publication number: 20200006610
    Abstract: A light emitting device package structure includes a substrate, a circuit layer structure, a light emitting device, a first redistribution layer, a conductive connector, a second redistribution layer, and a chip. The circuit layer structure is disposed over the substrate, and the circuit layer structure includes a first circuit layer. The light emitting device is disposed over the circuit layer structure and is electrically connected with the first circuit layer. The first redistribution layer is disposed over the light emitting device and includes a second circuit layer and a conductive contact contacting the second circuit layer. The conductive connector connects the first circuit layer and the second circuit layer. The second redistribution layer is disposed over the first redistribution layer and includes a third circuit layer contacting the conductive contact. The chip is disposed over the second redistribution layer and is electrically connected with the third circuit layer.
    Type: Application
    Filed: September 25, 2018
    Publication date: January 2, 2020
    Inventors: Pei-Wei WANG, Cheng-Ta KO, Yu-Hua CHEN, De-Shiang LIU, Tzyy-Jang TSENG
  • Publication number: 20190380200
    Abstract: An embedded component structure including a circuit board, an electronic component, a dielectric layer and a connection circuit layer and a manufacturing method thereof is provided. The circuit board has a through hole and includes a core layer, a first circuit layer, and a second circuit layer. The first circuit layer and the second circuit layer are disposed on the core layer. The through hole penetrates the first circuit layer and the core layer. The electronic component including a plurality of connection pads is disposed within the through hole where the dielectric layer is filled in. The Young's modulus of the core layer is greater than the Young's modulus of the dielectric layer. The connection circuit layer covers and contacts a first electrical connection surface of the first circuit layer and at least one of a second electrical connection surface of each of the connection pads. A manufacturing method of an embedded component structure is also provided.
    Type: Application
    Filed: August 15, 2019
    Publication date: December 12, 2019
    Applicant: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Yu-Hua Chen, Chun-Hsien Chien, Wen-Liang Yeh, Ra-Min Tain
  • Publication number: 20190373713
    Abstract: A stacked structure includes a circuit board, an electronic component, metallic cores, and insulating cladding layers. The circuit board includes first bonding pads. The electronic component includes second bonding pads that are opposite to the first bonding pads. Each metallic core is connected to a corresponding first bonding pad and a corresponding second bonding pad. The metallic cores have a curved surface interposed between the corresponding first bonding pad and the corresponding second bonding pad. The insulating cladding layers are separated from each other and cover the curved surfaces of the metallic cores.
    Type: Application
    Filed: August 18, 2019
    Publication date: December 5, 2019
    Inventors: Tzyy-Jang TSENG, Kai-Ming YANG, Pu-Ju LIN, Cheng-Ta KO, Yu-Hua CHEN
  • Publication number: 20190348356
    Abstract: A package carrier structure includes an insulating substrate, a first wiring layer, a second wiring layer, at least one conductive via, a plurality of first and second conductive pads, a first insulating layer, a plurality of first and second conductive structures, and an encapsulated layer. The first and second wiring layers are disposed on the upper and lower surfaces of the insulating substrate respectively. The conductive via penetrates through the insulating substrate and electrically connected to the first and second wiring layers. The first and second conductive pads are disposed on the upper surface and electrically connected to the first wiring layer. The first insulating layer is disposed on the upper surface and exposing the first and second conductive pads. The first and second conductive structures are disposed on the first and second conductive pads respectively. The lower surface of the insulating substrate is covered by the encapsulation layer.
    Type: Application
    Filed: July 6, 2018
    Publication date: November 14, 2019
    Inventors: Yu-Chung Hsieh, Chun-Hsien Chien, Yu-Hua Chen
  • Publication number: 20190250502
    Abstract: A mask structure and a manufacturing method of the mask structure are provided. The mask structure includes a transparent substrate, a patterned metal layer, and a plurality of microlens structures. The patterned metal layer is disposed on the transparent substrate and exposing a portion of the transparent substrate. The microlens structures are disposed on the transparent substrate exposed by a portion of the patterned metal layer and being in contact with the portion of the patterned metal layer.
    Type: Application
    Filed: April 26, 2019
    Publication date: August 15, 2019
    Applicant: Unimicron Technology Corp.
    Inventors: Pu-Ju Lin, Shih-Lian Cheng, Yu-Hua Chen, Cheng-Ta Ko, Jui-Jung Chien, Wei-Tse Ho
  • Publication number: 20190239362
    Abstract: A package structure is disclosed herein. The package structure includes an insulating composite layer, a sealant disposed on the insulating composite layer, a first chip embedded in the sealant and having a plurality of first conductive pads exposed through the sealant, a circuit layer module having a plurality of circuit layers and a plurality of dielectric layers having a plurality of conductive vias, a second chip embedded in the circuit layer module and has a plurality of second conductive pads electrically connected to the circuit layers through the conductive vias, and a protecting layer having a plurality of openings disposed on the circuit layer module, in which the openings expose a portion of the circuit layer module.
    Type: Application
    Filed: April 10, 2019
    Publication date: August 1, 2019
    Inventors: Kai-Ming YANG, Chen-Hao LIN, Cheng-Ta KO, John Hon-Shing LAU, Yu-Hua CHEN, Tzyy-Jang TSENG
  • Patent number: 10324370
    Abstract: A manufacturing method of a circuit substrate is provided. A substrate is provided. A positive photoresist layer is coated on the substrate. Once exposure process is performed on the positive photoresist layer disposed on the substrate so as to simultaneously form concaves with at least two different depths.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: June 18, 2019
    Assignee: Unimicron Technology Corp.
    Inventors: Pu-Ju Lin, Shih-Lian Cheng, Yu-Hua Chen, Cheng-Ta Ko, Jui-Jung Chien, Wei-Tse Ho
  • Publication number: 20190139907
    Abstract: A package structure includes a redistribution structure, a chip, one or more structural reinforcing elements, and a protective layer. The redistribution structure includes a first circuit layer and a second circuit layer disposed over the first circuit layer. The first circuit layer is electrically connected to the second circuit layer. The chip is disposed over the redistribution structure and electrically connected to the second circuit layer. The one or more structural reinforcing elements are disposed over the redistribution structure. The structural reinforcing element has a Young's modulus in a range of of 30 to 200 GPa. The protective layer overlays the chip and a sidewall of the structural reinforcing element.
    Type: Application
    Filed: January 7, 2019
    Publication date: May 9, 2019
    Inventors: Pu-Ju LIN, Cheng-Ta KO, Yu-Hua CHEN, Tzyy-Jang TSENG, Ra-Min TAIN
  • Patent number: 10211139
    Abstract: A chip package structure including a molding compound, a carrier board, a chip, a plurality of conductive pillars and a circuit board is provided. The carrier board includes a substrate and a redistribution layer. The substrate has a first surface and a second surface. The redistribution layer is disposed on the first surface. The chip and the conductive pillars are disposed on the redistribution layer. The molding compound covers the chip, the conductive pillars, and the redistribution layer. The circuit board is connected with the carrier board, wherein the circuit board is disposed on the molding compound, such that the chip is located between the substrate and the circuit board, and the chip and the redistribution layer are electrically connected with the circuit board through the conductive pillars. Heat generated by the chip is transmitted through the substrate from the first surface to the second surface to dissipate.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: February 19, 2019
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Yu-Hua Chen, Ra-Min Tain