Patents by Inventor Yu-Hung Cheng

Yu-Hung Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150243763
    Abstract: The present disclosure relates to a method of generating a transistor device having an epitaxial layer disposed over a recessed active region. The epitaxial layer improves transistor device performance. In some embodiments, the method is performed by providing a semiconductor substrate. An epitaxial growth is performed to form an epitaxial layer onto the semiconductor substrate. An electrically insulating layer is then formed onto the epitaxial layer, and a gate structure is formed onto the electrically insulating layer. By forming the epitaxial layer over the semiconductor substrate the surface roughness of the semiconductor substrate is improved, thereby improving transistor device performance.
    Type: Application
    Filed: February 24, 2014
    Publication date: August 27, 2015
    Inventors: Yu-Hung Cheng, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee, Tung-I Lin, Wei-Li Chen
  • Patent number: 9099324
    Abstract: A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes an epitaxial layer and a dielectric material. The epitaxial layer is in a trench of the semiconductor and is peripherally enclosed thereby, in which the epitaxial layer is formed by performing etch and epitaxy processes. The etch and epitaxy process includes etching out a portion of a sidewall of the trench and a portion of a bottom surface of the trench and forming the epitaxial layer conformal to the remaining portion of the sidewall and the remaining portion of the bottom surface. The dielectric material is peripherally enclosed by the epitaxial layer.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: August 4, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Hung Cheng, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Ru-Liang Lee, Tung-I Lin, Wei-Li Chen
  • Patent number: 9064688
    Abstract: A method includes etching a semiconductor substrate to form a recess, wherein the recess extends from a top surface of the semiconductor substrate into the semiconductor substrate. An enhanced cleaning is then performed to etch exposed portions of the semiconductor substrate. The exposed portions are in the recess. The enhanced cleaning is performed using process gases including hydrochloride (HCl) and germane (GeH4). After the enhanced cleaning, an epitaxy is performed to grow a semiconductor region in the recess.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: June 23, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Wu-Ping Huang, Chii-Horng Li, Tze-Liang Lee
  • Publication number: 20150115397
    Abstract: A semiconductor device includes a semiconductor substrate and a trench isolation. The trench isolation is located in the semiconductor substrate, and includes an epitaxial layer and a dielectric material. The epitaxial layer is in a trench of the semiconductor and is peripherally enclosed thereby, in which the epitaxial layer is formed by performing etch and epitaxy processes. The etch and epitaxy process includes etching out a portion of a sidewall of the trench and a portion of a bottom surface of the trench and forming the epitaxial layer conformal to the remaining portion of the sidewall and the remaining portion of the bottom surface. The dielectric material is peripherally enclosed by the epitaxial layer.
    Type: Application
    Filed: October 24, 2013
    Publication date: April 30, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Hung CHENG, Cheng-Ta WU, Yeur-Luen TU, Chia-Shiung TSAI, Ru-Liang LEE, Tung-I LIN, Wei-Li CHEN
  • Publication number: 20150108430
    Abstract: A transistor device includes a substrate having a first region and a second region, a first semiconductor layer of a first semiconductor material having a first portion over the first region and a second portion over the second region, the first portion being separated from the second portion, a second semiconductor layer of a second semiconductor material over the second portion of the first semiconductor layer, a first transistor of a first conductivity type, the first transistor disposed within the first region and having a first set of source/drain regions formed in the first semiconductor layer, and a second transistor of a second conductivity type, the second transistor disposed within the second region and having a second set of source/drain regions formed in the second semiconductor layer. The second conductivity type is different than the second conductivity type, and the second semiconductor material is different from the first semiconductor material.
    Type: Application
    Filed: January 6, 2015
    Publication date: April 23, 2015
    Inventors: Yu-Hung Cheng, Ching-Wei Tsai, Yeur-Luen Tu, Tung-I Lin, Wei-Li Chen
  • Publication number: 20150041761
    Abstract: A method for forming a backside illuminated photo-sensitive device includes forming a gradated sacrificial buffer layer onto a sacrificial substrate, forming a uniform layer onto the gradated sacrificial buffer layer, forming a second gradated buffer layer onto the uniform layer, forming a silicon layer onto the second gradated buffer layer, bonding a device layer to the silicon layer, and removing the gradated sacrificial buffer layer and the sacrificial substrate.
    Type: Application
    Filed: August 9, 2013
    Publication date: February 12, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd .
    Inventors: Yu-Hung Cheng, Yen-Chang Chu, Cheng-Ta Wu, Yeur-Luen Tu, Chia-Shiung Tsai, Xiaomeng Chen
  • Patent number: 8946060
    Abstract: A method for fabricating a semiconductor device, the method includes forming a gate stack over a major surface of a substrate. The method further includes recessing the substrate to form source and drain recess cavities adjacent to the gate stack in the substrate. The method further includes selectively growing a strained material in the source and drain recess cavities in the substrate using an LPCVD process, wherein the LPCVD process is performed at a temperature of about 660 to 700° C. and under a pressure of about 13 to 50 Torr, using SiH2Cl2, HCl, GeH4, B2H6, and H2 as reaction gases.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: February 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Chii-Horng Li, Tze-Liang Lee
  • Publication number: 20140367768
    Abstract: A method for fabricating a semiconductor device includes forming an isolation feature in a substrate, forming a gate stack over the substrate, forming a source/drain (S/D) recess cavity in the substrate, where the S/D recess cavity is positioned between the gate stack and the isolation feature. The method further includes forming an epitaxial (epi) material in the S/D recess cavity, where the epi material has an upper surface which including a first crystal plane. Additionally, the method includes performing a redistribution process to the epi material in the S/D recess cavity using a chlorine-containing gas, where the first crystal plane is transformed to a second crystal plane after the redistribution.
    Type: Application
    Filed: September 2, 2014
    Publication date: December 18, 2014
    Inventors: Yen-Ru LEE, Ming-Hua YU, Tze-Liang LEE, Chii-Horng LI, Pang-Yen TSAI, Lilly SU, Yi-Hung LIN, Yu-Hung CHENG
  • Publication number: 20140342522
    Abstract: A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate in a wafer; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. The step of performing the selective epitaxial growth includes performing a first growth stage with a first growth-to-etching (E/G) ratio of process gases used in the first growth stage; and performing a second growth stage with a second E/G ratio of process gases used in the second growth stage different from the first E/G ratio.
    Type: Application
    Filed: July 30, 2014
    Publication date: November 20, 2014
    Inventors: Yu-Hung Cheng, Yi-Hung Lin, Tze-Liang Lee, Chii-Horng Li
  • Publication number: 20140264493
    Abstract: A semiconductor device includes a substrate, a gate stack having at least one gate vertex directed to an area in the substrate below the gate stack. The semiconductor device also includes a source structure having at least one vertex directed toward the area in the substrate and a drain structure having at least one vertex directed toward the area in the substrate.
    Type: Application
    Filed: April 26, 2013
    Publication date: September 18, 2014
    Inventors: Yu-Hung Cheng, Ching-Wei Tsai, Wen-Hsing Hsieh, Cheng-Ta Wu, Yeur-Luen Tu
  • Patent number: 8835267
    Abstract: A method for fabricating a semiconductor device is disclosed. A strained material is formed in a cavity of a substrate and adjacent to an isolation structure in the substrate. The strained material has a corner above the surface of the substrate. The disclosed method provides an improved method for forming the strained material adjacent to the isolation structure with an increased portion in the cavity of a substrate to enhance carrier mobility and upgrade the device performance. In an embodiment, the improved formation method is achieved using an etching process to redistribute the strained material by removing at least a portion of the corner to be located in the cavity.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: September 16, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Ru Lee, Ming-Hua Yu, Tze-Liang Lee, Chii-Horng Li, Pang-Yen Tsai, Lilly Su, Yi-Hung Lin, Yu-Hung Cheng
  • Patent number: 8828850
    Abstract: A method for forming a semiconductor structure includes forming a gate stack over a semiconductor substrate in a wafer; forming a recess in the semiconductor substrate and adjacent the gate stack; and performing a selective epitaxial growth to grow a semiconductor material in the recess to form an epitaxy region. The step of performing the selective epitaxial growth includes performing a first growth stage with a first growth-to-etching (E/G) ratio of process gases used in the first growth stage; and performing a second growth stage with a second E/G ratio of process gases used in the second growth stage different from the first E/G ratio.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: September 9, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Chii-Horng Li, Tze-Liang Lee, Yi-Hung Lin
  • Publication number: 20140134818
    Abstract: The present disclosure provides an integrated circuit device and method for manufacturing the integrated circuit device. The disclosed method provides substantially defect free epitaxial features. An exemplary method includes forming a gate structure over the substrate; forming recesses in the substrate such that the gate structure interposes the recesses; and forming source/drain epitaxial features in the recesses. Forming the source/drain epitaxial features includes performing a selective epitaxial growth process to form an epitaxial layer in the recesses, and performing a selective etch back process to remove a dislocation area from the epitaxial layer.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 15, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY. LTD.
    Inventors: Yu-Hung Cheng, Tsz-Mei Kwok, Chun Hsiung Tsai, Jeff J. Xu
  • Publication number: 20130252392
    Abstract: A method includes etching a semiconductor substrate to form a recess, wherein the recess extends from a top surface of the semiconductor substrate into the semiconductor substrate. An enhanced cleaning is then performed to etch exposed portions of the semiconductor substrate. The exposed portions are in the recess. The enhanced cleaning is performed using process gases including hydrochloride (HCl) and germane (GeH4). After the enhanced cleaning, an epitaxy is performed to grow a semiconductor region in the recess.
    Type: Application
    Filed: March 22, 2012
    Publication date: September 26, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Wu-Ping Huang, Chii-Horng Li, Tze-Liang Lee
  • Patent number: 8530316
    Abstract: A method for fabricating a semiconductor device, the method including growing a first semiconductor structure comprising a first semiconductor material on a surface of a substrate, wherein growing the first semiconductor structure includes forming a semiconductor particle comprising the first semiconductor material on a second semiconductor structure of the semiconductor device. The method further includes forming a protection layer of a second semiconductor material on the first semiconductor structure, wherein forming the protection layer includes forming the protection layer on the semiconductor particle. The method further includes removing a portion of the protection layer, wherein removing the portion of the protection layer includes fully removing the protection layer on the semiconductor particle and the semiconductor particle.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: September 10, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Jhi-Cherng Lu, Ming-Hua Yu, Chii-Horng Li, Tze-Liang Lee
  • Patent number: 8455930
    Abstract: A semiconductor device having a substrate including a major surface, a gate stack comprising a sidewall over the substrate and a spacer over the substrate adjoining the sidewall of the gate stack. The spacer having a bottom surface having an outer point that is the point on the bottom surface farthest from the gate stack. An isolation structure in the substrate on one side of the gate stack has an outer edge closest to the spacer. A strained material below the major surface of the substrate disposed between the spacer and the isolation structure having an upper portion and a lower portion separated by a transition plane at an acute angle to the major surface of the substrate.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: June 4, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Chii-Horng Li, Tze-Liang Lee
  • Patent number: 8446126
    Abstract: A power bank apparatus with speaker combines the function of power bank and the function of speaker. The power bank apparatus not only charges the portable electronic apparatuses but also supplies power to the internal speaker. The voice or music of the portable electronic apparatus is amplified by the speaker of the power bank apparatus to improve the quality of the voice or music.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: May 21, 2013
    Assignee: Cooler Master Co., Ltd.
    Inventor: Yu-Hung Cheng
  • Publication number: 20130122675
    Abstract: A method for fabricating a semiconductor device, the method including growing a first semiconductor structure comprising a first semiconductor material on a surface of a substrate, wherein growing the first semiconductor structure includes forming a semiconductor particle comprising the first semiconductor material on a second semiconductor structure of the semiconductor device. The method further includes forming a protection layer of a second semiconductor material on the first semiconductor structure, wherein forming the protection layer includes forming the protection layer on the semiconductor particle. The method further includes removing a portion of the protection layer, wherein removing the portion of the protection layer includes fully removing the protection layer on the semiconductor particle and the semiconductor particle.
    Type: Application
    Filed: January 8, 2013
    Publication date: May 16, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung CHENG, Jhi-Cherng LU, Ming-Hua YU, Chii-Horng LI, Tze-Liang LEE
  • Publication number: 20130084682
    Abstract: A method for fabricating a semiconductor device is disclosed. A strained material is formed in a cavity of a substrate and adjacent to an isolation structure in the substrate. The strained material has a corner above the surface of the substrate. The disclosed method provides an improved method for forming the strained material adjacent to the isolation structure with an increased portion in the cavity of a substrate to enhance carrier mobility and upgrade the device performance. In an embodiment, the improved formation method is achieved using an etching process to redistribute the strained material by removing at least a portion of the corner to be located in the cavity.
    Type: Application
    Filed: September 29, 2011
    Publication date: April 4, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Ru LEE, Ming-Hua YU, Tze-Liang LEE, Chii-Horng LI, Pang-Yen TSAI, Lilly SU, Yi-Hung LIN, Yu-Hung CHENG
  • Patent number: 8377784
    Abstract: The present disclosure discloses an exemplary method for fabricating a semiconductor device comprises selectively growing a material on a top surface of a substrate; selectively growing a protection layer on the material; and removing a portion of the protection layer in an etching gas.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: February 19, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Cheng, Jhi-Cherng Lu, Ming-Hua Yu, Chii-Horng Li, Tze-Liang Lee