Abstract: A method for fabricating a high electron mobility transistor (HEMT) includes the steps of forming a buffer layer on a substrate, forming a barrier layer on the buffer layer, forming a p-type semiconductor layer on the barrier layer, forming a gate electrode layer on the p-type semiconductor layer, and patterning the gate electrode layer to form a gate electrode. Preferably, the gate electrode includes an inclined sidewall.

Abstract: A system includes one or more data processors configured to run a basic input/output system (BIOS) service and a bootloader configuration manager for tuning kernel parameters. The system further includes a non-transitory computer-readable storage medium containing instructions which, when executed on the one or more data processors, cause the one or more data processors to perform operations. The operations include receiving administrative inputs and checking the administrative inputs against a checklist to determine whether any errors are introduced by the administrative inputs. The operations further include writing the administrative inputs to a temporal configuration file in response to no errors being introduced by the administrative inputs. The operations further include exporting the temporal configuration file to a designated output path. The exported temporal configuration file includes kernel parameter settings for configuring a bootloader of a computing device.

Abstract: A memory device is provided, including a memory array, a driver circuit, and recover circuit. The memory array includes multiple memory cells. Each memory cell is coupled to a control line, a data line, and a source line and, during a normal operation, is configured to receive first and second voltage signals. The driver circuit is configured to output at least one of the first voltage signal or the second voltage signal to the memory cells. The recover circuit is configured to output, during a recover operation, a third voltage signal, through the driver circuit to at least one of the memory cells. The third voltage signal is configured to have a first voltage level that is higher than a highest level of the first voltage signal or the second voltage signal, or lower than a lowest level of the first voltage signal or the second voltage signal.

Abstract: An antenna apparatus includes a feeding antenna inside an electronic device and one or more antenna elements, such as a floating metal antenna, disposed on a rear cover of the electronic device. The floating metal antenna and a feeding antenna inside the electronic device may form a coupling antenna structure. The feeding antenna may be an antenna fastened on an antenna support (which may be referred to as a support antenna). The feeding antenna may alternatively be a slot antenna formed by slitting on a metal middle frame of the electronic device. The antenna apparatus may be implemented in limited design space, thereby effectively saving antenna design space inside the electronic device. The antenna apparatus may generate excitation of a plurality of resonance modes, so that antenna bandwidth and radiation characteristics can be improved.

Abstract: Various embodiments of the present disclosure are directed towards a memory device including a first bottom electrode layer over a substrate. A ferroelectric switching layer is disposed over the first bottom electrode layer. A first top electrode layer is disposed over the ferroelectric switching layer. A second bottom electrode layer is disposed between the first bottom electrode layer and the ferroelectric switching layer. The second bottom electrode layer is less susceptible to oxidation than the first bottom electrode layer.

Abstract: The present invention relates to a phosphine precursor for the preparation of a quantum dot, and a quantum dot prepared therefrom. Using the phosphine precursor for the preparation of a quantum dot of the present invention, a quantum dot with improved luminous efficiency and higher luminous color purity can be provided.

Abstract: An input switching circuit dynamically connects, based on an input mapping table, input streams to inputs of a wavefront pre-transform circuit. An output switching circuit dynamically connects, based on an output mapping table, output data at outputs of the wavefront pre-transform circuit to transport streams. A controller controls, based on a wiping command, at least one of the input and output switching circuits to alter at least one of the input and output mapping tables such that the at least one of the input and output switching circuits is disabled for connection. A first subset of the transport streams operates in a foreground mode available to a user and is transported for storage in remote storage sites at a network and a second subset of the transport streams operates in a background mode available to an administrator and is not transported for storage in the remote storage sites.

Abstract: During operation, a computer system may receive information indicating: a number of genetic molecules associated with normal tissue in a sample, and a number of tumor genetic molecules associated with a tumor in the sample. Then, the computer system may determine a sample-specific dynamic quality metric based at least in part on: a type of cancer, sequencing coverage of one or more cancer-specific genomic targets, and a first ratio of the number of tumor genetic molecules to a sum of the number tumor genetic molecules and the number of genetic molecules or a second ratio of the number of tumor genetic molecules to the number of genetic molecules. Next, based at least in part on a comparison of the sample-specific dynamic quality metric and a threshold, the computer system may selectively provide an indication of whether a mutation or the type of cancer is present in the sample.

Abstract: A sensing device is provided. The sensing device includes a substrate, a circuit layer, a photosensitive element, a light-shielding layer, and a conductive layer. The circuit layer is disposed on the substrate. The photosensitive element is disposed on the substrate and is electrically connected to the circuit layer. The light-shielding layer is disposed on the photosensitive element and has an opening. The opening overlaps the photosensitive element. The conductive layer is disposed on the light-shielding layer. In addition, the conductive layer passes through the opening and is electrically connected to the photosensitive element. A method of manufacturing a sensing device is also provided.

Abstract: A system includes a processor, and a display, a reader, a switch, a scale, a memory device, intake-type buttons and output-type buttons that are connected to the processor. The processor controls the display to display an identification number obtained by using the reader to read an identifier. The switch is operated to enable the processor to operate in an intake mode or an output mode. When operating in the intake (output) mode, the processor controls the display to display a symbol corresponding to one of the intake-type (output-type) buttons that is determined to be pressed, and in response to receipt of weight data from the scale, controls the display to display a value of pre-intake (post-output) weight obtained based on the weight data, and stores the value of pre-intake (post-output) weight in the memory device.

Abstract: A method for performing communications specification version control of a memory device in predetermined communications architecture with aid of compatibility management, associated apparatus and computer-readable medium are provided.

Abstract: A three-dimensional (3D) NAND memory structure may include material layers arranged in a vertical stack including alternating horizontal insulating layers and wordline layers. The material layers may be etched to form a landing pad. A vertical wordline may extend through one or more of the horizontal wordline layers beneath the landing pad. The vertical wordline may be conductively connected to a top horizontal wordline, and the vertical wordline may be insulated from any of the horizontal wordlines that the vertical wordline extends through beneath the top horizontal wordline. A liner may also be formed over a top horizontal wordline at the landing pad.

Abstract: A method for making a IC is provided, including: identifying, in a schematic, first and second edge elements, which edge elements including devices whose layout patterns are configured to conform to a first layout grid; identifying all the elements between the first and second edge elements, at least one of the identified elements including a device whose layout pattern is configured to conform to a second layout grid that is finer than the first layout grid; and calculating a spatial quantity of a combined layout pattern of the identified elements between the first and second edge elements to determine whether the combined layout pattern conforms to the first layout grid.

Abstract: A fire-spreading prevention and flame-retardant material includes a gel carrier, a first flame retardant, a second flame retardant, a first flame barrier, a second flame barrier and an adhesive. The first flame retardant uses a collosol way to be distributed in the gel carrier. The second flame retardant uses the collosol way to be distributed in the gel carrier. The first flame barrier uses the collosol way to be distributed in the gel carrier. The second flame barrier uses the collosol way to be distributed in the gel carrier. The adhesive is dissolved in the gel carrier to improve a property of the gel carrier.

Abstract: A fire-spreading prevention battery module includes a plurality of battery cells, a plurality of fire-spreading prevention pads, an upper battery frame, a plurality of upper electrode plates, a lower battery frame, a plurality of first lower electrode plates and two second lower electrode plates. Each battery cell is formed in a cylinder shape. Each fire-spreading prevention pad wraps a peripheral surface of one battery cell. The plurality of the upper electrode plates are mounted on an upper surface of the upper battery frame. The plurality of the first lower electrode plates are mounted to a middle of a lower surface of the lower battery frame. The two second lower electrode plates are mounted to two ends of the lower surface of the lower battery frame. The plurality of the first lower electrode plates are arranged between the two second lower electrode plates.

Abstract: An electronic device includes a first transistor, a second transistor, and a sensing circuit coupled to at least one of the first transistor and the second transistor. The sensing circuit includes a diode, a third transistor, and a fourth transistor. The diode has a first terminal. The third transistor has a first terminal and a second terminal. The first terminal of the third transistor is coupled to the first terminal of the diode. The fourth transistor has a first terminal coupled to the second terminal of the third transistor, and a second terminal coupled to a data driver.

Abstract: Disclosed herein is a method for alleviating osteoarthritis using a composition containing an isolated strain of Lactobacillus delbrueckii subsp. lactis LDL557 which is deposited at Deutsche Sammlung von Mikroorganismen and Zellkulturen GmbH under an accession number DSM 33617.

Abstract: A circuit structure for hot-press bonding includes a first substrate, a second substrate and a conductive adhesive layer. The circuit structure further includes a first conductive layer having a plurality of connection electrodes arranged on the first substrate, a second conductive layer including a plurality of backup electrodes respectively corresponding to the connection electrodes, an insulating layer arranged between the first conductive layer and the second conductive layer, and a plurality of conductive via arranged in the insulating layer and connected to corresponding connection electrodes and backup electrodes to provide current conduction paths therebetween, thus provide additional conduction path for the connection electrodes even the connection electrodes have fracture and enhance yield and connection reliability.

Abstract: Methods and systems for meta-learning are described for automating learning of child tasks with a single neural network. The order in which tasks are learned by the neural network can affect performance of the network, and the meta-learning approach can use a task-level curriculum for multi-task training. The task-level curriculum can be learned by monitoring a trajectory of loss functions during training. The meta-learning approach can learn to adapt task loss balancing weights in the course of training to get improved performance on multiple tasks on real world datasets. Advantageously, learning to dynamically balance weights among different task losses can lead to superior performance over the use of static weights determined by expensive random searches or heuristics. Embodiments of the meta-learning approach can be used for computer vision tasks or natural language processing tasks, and the trained neural networks can be used by augmented or virtual reality devices.