Abstract: A read-out circuit and a read-out method for a three-dimensional memory, comprises a read reference circuit and a sensitive amplifier, the read reference circuit produces read reference current capable of quickly distinguishing reading low-resistance state unit current and reading high-resistance state unit current. The read reference circuit comprises a reference unit, a bit line matching module, a word line matching module and a transmission gate parasitic parameter matching module. With respect to the parasitic effect and electric leakage of the three-dimensional memory in the plane and vertical directions, the present invention introduces the matching of bit line parasite parameters, leakage current and transmission gate parasitic parameters into the read reference current, and introduces the matching of parasitic parameters of current mirror into the read current, thereby eliminating the phenomenon of pseudo reading and reducing the read-out time.

Abstract: A VR integrated machine and a running method thereof are provided. The VR integrated machine includes a heat generating device, a heat conducting member and thermoelectric conversion member, the heat conducting member is connected with the heat generating device, the thermoelectric conversion member has a first end connected with the heat conducting member, and is configured to generate electrical energy and to supply the electrical energy to the UR integrated machine.

Abstract: Described is a process to clean up junction interfaces for fabricating semiconductor devices involving forming low-resistance electrical connections between vertically separated regions. An etch can be performed to remove silicon oxide on silicon surface at the bottom of a recessed feature. Described are methods and apparatus for etching up the bottom oxide of a hole or trench while minimizing the effects to the underlying epitaxial layer and to the dielectric layers on the field and the corners of metal gate structures. The method for etching features involves a reaction chamber equipped with a combination of capacitively coupled plasma and inductive coupled plasma. CHxFy gases and plasma are used to form protection layer, which enables the selectively etching of bottom silicon dioxide by NH3—NF3 plasma. Ideally, silicon oxide on EPI is removed to ensure low-resistance electric contact while the epitaxial layer and field/corner dielectric layers are—etched only minimally or not at all.

Abstract: A wearable device, an electronic system, an electronic device, a tactile feedback method and a storage medium are provided. The wearable device with tactile feedback includes an electromagnetic coil set, a driving circuit and a control circuit, the driving circuit is coupled with the electromagnetic coil set; the control circuit is configured to control the driving circuit to generate and output a coil current corresponding to the electromagnetic coil set to the electromagnetic coil set according to a control command; and the electromagnetic coil set is configured to receive the coil current and generate the tactile feedback based on the coil current.

Abstract: A device for monitoring and identifying a mountain torrent and debris flow and a method for early warning of disasters relate to the technical field of debris flow protection. The device includes a computation device, sensors, an amplifier and an analog-to-digital converter. The sensors convert an acquired impact force signal into a digital signal by the amplifier and the analog-to-digital converter, and transmits the digital signal to the computation device. The computation device utilizes the digital signal to compute an energy coefficient of a liquid impact signal and a solid-liquid impact energy ratio, and a debris flow mode is monitored and identified in combination with a threshold range of the energy coefficient and a threshold range of the solid-liquid impact energy ratio. The device identifies the nature of the mountain torrent and debris flow through time-frequency analysis of an impact force signal generated by the debris flow to sensors.

Abstract: Embodiments of the disclosure provide methods which reduce or eliminate lateral growth of a selective tungsten layer. Further embodiments provide an integrated clean and deposition method which improves the selectivity of selectively deposited tungsten on trench structures. Additional embodiments provide methods for forming a more uniform and selective bottom-up gap fill for trench structures with improved film properties.

Abstract: Embodiments of the disclosure relate to methods of depositing tungsten. Some embodiments of the disclosure provide methods for depositing tungsten which are performed at relatively low temperatures. Some embodiments of the disclosure provide methods in which the ratio between reactant gasses is controlled. Some embodiments of the disclosure provide selective deposition of tungsten. Some embodiments of the disclosure provide methods for depositing tungsten films at a low temperature with relatively low roughness, stress and impurity levels.

Abstract: Methods and apparatus for processing substrates are provided herein. In some embodiments, a process kit for a substrate support includes: an upper edge ring made of quartz and having an upper surface and a lower surface, wherein the upper surface is substantially planar and the lower surface includes a stepped lower surface to define a radially outermost portion and a radially innermost portion of the upper edge ring.

Abstract: Described is a process to clean up junction interfaces for fabricating semiconductor devices involving forming low-resistance electrical connections between vertically separated regions. An etch can be performed to remove silicon oxide on silicon surface at the bottom of a recessed feature. Described are methods and apparatus for etching up the bottom oxide of a hole or trench while minimizing the effects to the underlying epitaxial layer and to the dielectric layers on the field and the corners of metal gate structures. The method for etching features involves a reaction chamber equipped with a combination of capacitively coupled plasma and inductive coupled plasma. CHxFy gases and plasma are used to form protection layer, which enables the selectively etching of bottom silicon dioxide by NH3—NF3 plasma. Ideally, silicon oxide on EPI is removed to ensure low-resistance electric contact while the epitaxial layer and field/corner dielectric layers are—etched only minimally or not at all.

Abstract: Methods for pre-cleaning substrates having metal and dielectric surfaces are described. A substrate comprising a surface structure with a metal bottom, dielectric sidewalls, and a field of dielectric is exposed to a dual plasma treatment in a processing chamber to remove chemical residual and/or impurities from the metal bottom, the dielectric sidewalls, and/or the field of the dielectric and/or repair surface defects in the dielectric sidewalls and/or the field of the dielectric. The dual plasma treatment comprises a direct plasma and a remote plasma.

Abstract: Provided is a processing chamber configured to contain a semiconductor substrate in a processing region of the chamber. The processing chamber includes a remote plasma unit and a direct plasma unit, wherein one of the remote plasma unit or the direct plasma unit generates a remote plasma and the other of the remote plasma unit or the direct plasma unit generates a direct plasma. The combination of a remote plasma unit and a direct plasma unit is used to remove, etch, clean, or treat residue on a substrate from previous processing and/or from native oxide formation. The combination of a remote plasma unit and direct plasma unit is used to deposit thin films on a substrate.

Abstract: A lithium-ion battery cathode material and a method for preparing the same are disclosed. The lithium-ion battery cathode material includes a layered cathode material matrix and a defect layer. The layered cathode material matrix includes body layers and lithium layers, and the body layer includes a transition metal layer and a lithium layer. The defect layer includes atoms with a periodic arrangement different from that of atoms in the matrix or with content different from that of an element in the matrix. The defect layer is parallel to a 003 crystal plane of the layered cathode material matrix, and dimensions of the defect layer are 0.1 nm to 50 nm in at least one direction and 10 nm to 5000 nm in at least another direction.

Abstract: Methods for pre-cleaning substrates having metal and dielectric surfaces are described. The substrate is exposed to a strong reductant to remove contaminants from the metal surface and damage the dielectric surface. The substrate is then exposed to an oxidation process to repair the damage to the dielectric surface and oxidize the metal surface. The substrate is then exposed to a weak reductant to reduce the metal oxide to a pure metal surface without substantially affecting the dielectric surface. Processing tools and computer readable media for practicing the method are also described.

Abstract: Embodiments of a blocker plate for use in a substrate process chamber are disclosed herein. In some embodiments, a blocker plate for use in a substrate processing chamber configured to process substrates having a given diameter includes: an annular rim; a central plate disposed within the annular rim; and a plurality of spokes coupling the central plate to the annular rim.

Abstract: A method for interactions in a live broadcast room includes: in response to opening a question interaction function in a live broadcast room, displaying a question panel interface in a first display area of the live broadcast room, wherein the question panel interface comprises a display card for each piece of question information and each display card comprises an answer control and an end control; and in response to triggering the answer control, displaying the target display card on top of remaining display cards on the question panel interface, and replacing the answer control with the end control.

Abstract: Methods and apparatus for selectively depositing a tungsten layer atop a dielectric surface.

Abstract: A generating method of conference image and an image conference system are provided. In the method, a user and one or more tags in a captured actual image are identified. The moving behavior of the user is tracked, and the position of the viewing range in the actual image is adjusted according to the moving behavior. The virtual image corresponding to the tag is synthesized according to the position relation between the user and the tag, to generate a conference image.

Abstract: An interaction method between reality and virtuality and an interaction system between reality and virtuality are provided in the embodiments of the present invention. A marker is provided on a controller. A computing apparatus is configured to determine control position information of the controller in a space according to the marker in an initial image captured by an image capturing apparatus; determine object position information of a virtual object image in the space corresponding to the marker according to the control position information; and integrate the initial image and the virtual object image according to the object position information, to generate an integrated image. The integrated image is used to be played on a display. Accordingly, an intuitive operation is provided.

Abstract: Embodiments of the disclosure relate to methods of depositing tungsten. Some embodiments of the disclosure provide methods for depositing tungsten which are performed at relatively low temperatures. Some embodiments of the disclosure provide methods in which the ratio between reactant gasses is controlled. Some embodiments of the disclosure provide selective deposition of tungsten. Some embodiments of the disclosure provide methods for depositing tungsten films at a low temperature with relatively low roughness, stress and impurity levels.

Abstract: A display device, a virtual reality display apparatus and a display device control method. The display device includes: a liquid crystal panel, which includes a plurality of sub-pixel groups and a first black matrix, each of the sub-pixel groups including n consecutive rows of sub-pixels, the first black matrix being disposed between two adjacent sub-pixel groups, and n being any positive integer, and a backlight, which includes a plurality of sub-light source groups and a second black matrix, which second black matrix is disposed between two adjacent sub-light source groups, each of the sub-light source groups being disposed in one-to-one correspondence with each of the sub-pixel groups, and the second black matrix having the same light-shielding region as the first black matrix.