Abstract: A USB charger circuit includes at least a converter, a control circuitry, a first resistor, a second resistor, an error amplifier, a sense resistor and a diode. The converter has a transistor. The control circuitry is coupled to the transistor. The control circuitry is used for producing a drive signal to the transistor. The first resistor is connected between the output node of the converter and a first node. The second resistor is connected between the first node and a second node. The error amplifier is coupled to receive a voltage divided by the first resistor and the second resistor to compare to a reference voltage. The sense resistor is connected between the second node and ground. The diode is connected between the output node of the converter and a first node.

Abstract: A power supply voltage switch circuit for selecting a power supply voltage of an integrated circuit according to a first control signal. The power supply voltage switch circuit contains a high voltage selecting module for generating an output voltage according to the higher of a first and a second voltages; a level shifting module electrically connected to the high voltage selecting module to receive the output voltage as power supply, for performing level shifting to a first control signal according to the output voltage; and a selecting switch module electrically connected to the level shifting module for selectively outputting the first or the second voltage as the power supply voltage of the integrated circuit according to the level-shifted first control signal.

Abstract: A display device includes a display monitor including a first plane facing a user and a second plane opposite to the first plane, and a support arm including a first end connected to the second plane and a second end. The display device further includes a base positioned below the display monitor for supporting the display monitor on a surface. The base includes a first side facing the user, a second side opposite to the first side and connected to the second end of the support arm, and a receiving part for receiving an electronic device selectively. The electronic device is selectively received in the receiving part from a bottom of the first plane of the display monitor.

Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated package products.

Abstract: A delay circuit and related apparatus for providing a longer delay time, such that when a level of an input signal changes, a level of an output signal changes accordingly after the predetermined delay time. The delay circuit has a storage unit, a current generator, a voltage generator for providing a reference voltage, a differential amplifier, and a feedback control module. The current generator starts to provide a charging current to the storage unit when the input signal changes level, such that an output charging voltage of the storages unit is gradually charged to reach the reference voltage. The feedback control module is capable of dynamically decreasing the charging current provided to the storage unit as the charging voltage is approaching the reference voltage, and the amplifier will change the level of the output voltage when the charging voltage reaches the reference voltage.

Abstract: A power supply voltage switch circuit for selecting a power supply voltage of an integrated circuit according to a first control signal. The power supply voltage switch circuit contains a high voltage selecting module for generating an output voltage according to the higher of a first and a second voltages; a level shifting module electrically connected to the high voltage selecting module to receive the output voltage as power supply, for performing level shifting to a first control signal according to the output voltage; and a selecting switch module electrically connected to the level shifting module for selectively outputting the first or the second voltage as the power supply voltage of the integrated circuit according to the level-shifted first control signal.

Abstract: An option fuse circuit, which can be viewed as a latch-type option fuse circuit, is manufactured with a standard single-poly CMOS manufacturing process. The option fuse circuit includes a non-volatile memory module for storing a logic bit in a data program status, a data control circuit electrically connected to the non-volatile memory module for controlling operations of the option fuse circuit, and an output circuit electrically connected to the data control circuit for outputting the logic data bit in a data read status.

Abstract: A strengthened window-type semiconductor package is provided. A substrate having an opening is mounted with at least a chip in a manner that, an active surface of the chip covers and partly exposed to the opening, and electrically connected to the substrate by bonding wires formed through the opening. An elastic non-conductive material is applied over the chip exclusive of the active surface. An upper encapsulant is formed to encapsulate the chip and the non-conductive material, and a lower encapsulant is formed to encapsulate the bonding wires and seal the opening. With provision of the non-conductive material for encapsulating the chip before forming the upper encapsulant, the chip can be prevented from cracking particularly at corner and edge positions that encounter relatively greater thermal stress during subsequent fabrication processes such as curing of the upper encapsulant and thermal cycles.

Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated package products.

Abstract: A delay circuit and related apparatus for providing a longer delay time, such that when a level of an input signal changes, a level of an output signal changes accordingly after the predetermined delay time. The delay circuit has a storage unit, a current generator, a voltage generator for providing a reference voltage, a differential amplifier, and a feedback control module. The current generator starts to provide a charging current to the storage unit when the input signal changes level, such that an output charging voltage of the storages unit is gradually charged to reach the reference voltage. The feedback control module is capable of dynamically decreasing the charging current provided to the storage unit as the charging voltage is approaching the reference voltage, and the amplifier will change the level of the output voltage when the charging voltage reaches the reference voltage.

Abstract: A memory including a plurality of memory cells, a sensing load, a reference load, a control circuit and a comparator. Each of the memory cells can store a bit data and provide a driving current according to the bit data. The sensing load is driven by the driving current and a driving voltage to generate a sensing voltage, and the reference load is driven by the driving voltage to generate a reference voltage. The control circuit can control the driving voltage to drive the sensing load or the reference load such that the sensing voltage or the reference voltage is kept constant while the driving current changes. The comparator is for comparing the sensing voltage with the reference voltage and therefore determining the bit data stored in the memory cell that provides the driving current.

Abstract: An option fuse circuit, which can be viewed as a latch-type option fuse circuit, is manufactured with a standard single-poly CMOS manufacturing process. The option fuse circuit includes a non-volatile memory module for storing a logic bit in a data program status, a data control circuit electrically connected to the non-volatile memory module for controlling operations of the option fuse circuit, and an output circuit electrically connected to the data control circuit for outputting the logic data bit in a data read status.

Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated-package products.

Abstract: A device and method for data sensing includes turning off a first and a second program switches while turning on a first and a second switches in order to output a first current corresponding to a first data from a first memory cell to a biasing circuit, also to output a second current corresponding to a second data from the biasing circuit to a second memory cell, and to charge or discharge a loading node using a difference of the first and the second currents to sense a loading voltage.

Abstract: The present invention includes a nonvolatile memory structure comprising: nonvolatile memory cell area including write/erase pins, address pins and data input/output pins; conductive contact pads arranged at the periphery area of the nonvolatile memory cell area for power input to operate the nonvolatile memory cell, wherein the conductive contact pads are connected to a power selecting from a positive power, a negative power or the combination thereof. The conductive contact pads include a positive power pin or a negative power pin for providing the operating power.

Abstract: A multi-chip semiconductor package and a fabrication method thereof are provided. A substrate having an upper surface and a lower surface is prepared. At least a first chip is mounted on the upper surface of the substrate. A non-conductive material is applied over predetermined area on the first chip and the upper surface of the substrate. At least a second chip is mounted on the non-conductive material, and formed with at least a suspending portion free of interference in position with the first chip, wherein the non-conductive material is dimensioned in surface area at least corresponding to the second chip, so as to allow the suspending portion to be supported on the non-conductive material. With the second chip being completely supported on the non-conductive material without causing a conventional chip-crack problem, structural intactness and reliability can be effectively assured for fabricated-package products.

Abstract: A strengthened window-type semiconductor package is provided. A substrate having an opening is mounted with at least a chip in a manner that, an active surface of the chip covers and partly exposed to the opening, and electrically connected to the substrate by bonding wires formed through the opening. An elastic non-conductive material is applied over the chip exclusive of the active surface. An upper encapsulant is formed to encapsulate the chip and the non-conductive material, and a lower encapsulant is formed to encapsulate the bonding wires and seal the opening. With provision of the non-conductive material for encapsulating the chip before forming the upper encapsulant, the chip can be prevented from cracking particularly at corner and edge positions that encounter relatively greater thermal stress during subsequent fabrication processes such as curing of the upper encapsulant and thermal cycles.

Abstract: A memory including a plurality of memory cells, a sensing load, a reference load, a control circuit and a comparator. Each of the memory cells can store a bit data and provide a driving current according to the bit data. The sensing load is driven by the driving current and a driving voltage to generate a sensing voltage, and the reference load is driven by the driving voltage to generate a reference voltage. The control circuit can control the driving voltage to drive the sensing load or the reference load such that the sensing voltage or the reference voltage is kept constant while the driving current changes. The comparator is for comparing the sensing voltage with the reference voltage and therefore determining the bit data stored in the memory cell that provides the driving current.