Patents by Inventor YuQing Yang

YuQing Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11963431
    Abstract: A mask for forming a trench in a flexible bendable region of a flexible display panel is provided. The mask includes a first region, a second region, and a third region sandwiched between the first and second regions in a first direction, and the third region has the same pattern as a pattern of a trench to be formed. Light transmission properties of the first and second regions are the same as each other, but are opposite to a light transmission property of the third region. An edge of at least one of the first and second regions proximal to the third region has a plurality of protrusions, and each of the plurality of protrusions has a vertex angle that is at a side proximal to the third region and is not more than 90°. A flexible display panel and a manufacturing method thereof are further provided.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: April 16, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qian Hu, Yuqing Yang, Fan Yang
  • Publication number: 20240097627
    Abstract: A class D amplifier is provided, including: a first comparator, configured to generate a first comparison result based on a positive end input signal and a triangular wave; a second comparator, configured to generate a second comparison result based on a negative end input signal and the triangular wave; an exclusive OR gate, configured to generate a first control signal based on the first comparison result and the second comparison result; a first AND gate, configured to generate a positive end PMW output based on the first comparison result and the first control signal; and a second AND gate, configured to generate a negative end PMW output based on the second comparison result and the first control signal; and an output stage, configured to generate the positive end output signal and the negative end output signal correspondingly based on the positive end PMW output and the negative end PMW output.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 21, 2024
    Applicant: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Kai MAO, Long HUANG, Junjun ZHANG, Yuqing YANG
  • Patent number: 11903276
    Abstract: Provided are a display panel, a manufacturing method therefor, and a display device. The display panel comprises a hole in a display region and comprises: a substrate; a drive circuit layer comprising a thin film transistor; a wire, connected to the thin film transistor; one or more isolation members surrounding the hole, disposed on the side of the drive circuit layer, and located between the wire and the hole, at least one isolation member comprising a first and a second isolation layer, and an orthographic projection of a surface of the first isolation layer away from the substrate is inside that of the second isolation layer on the substrate; a planarization layer, on the side of the drive circuit layer and covering the wire; and an anode, on the side of the planarization layer and connected to the wire by a via penetrating the planarization layer.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: February 13, 2024
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhen Zhang, Ning Zhao, Xinwei Wu, Xudong An, Yue Wei, Yuqing Yang
  • Publication number: 20240049570
    Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate has an opening region, a display region, and an opening peripheral region between the opening region and the display region, and includes a base substrate, the opening peripheral region includes a first barrier dam and an insulating protection layer, the first barrier dam at least partially surrounds the opening region, the insulating protection layer includes at least one first material removal region, and a projection of the first material removal region on the base substrate is overlapped with a projection of the first barrier dam on the base substrate; in the at least one first material removal region, a material of the insulating protection layer is at least partially removed, to form a recess portion in the insulating protection layer or a through hole penetrating the insulating protection layer.
    Type: Application
    Filed: April 29, 2021
    Publication date: February 8, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Liudong ZHU, Yiyang ZHANG, Qun MA, Chenxing WAN, Jiahao GUO, Yuqing YANG
  • Publication number: 20230419116
    Abstract: Embodiments of the present disclosure include systems and methods for providing sparsity for neural network models based on sparsity attributes. A first neural network model definition is received. The first neural network model definition specifies a neural network model comprising a set of tensors and a set of sparsity attribute values for elements of a tensor in the set of tensors. The set of sparsity attribute values for the tensor are propagated to elements of a subset of the set of tensors to form a second neural network model definition. The neural network model is generated based on the second neural network model definition.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Inventors: Ningxin ZHENG, Quanlu ZHANG, Yuqing YANG, Lingxiao MA, Fan YANG, Yang WANG, Mao YANG, Lidong ZHOU
  • Patent number: 11647658
    Abstract: A color shift compensation method, a display panel and a display device are provided.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: May 9, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qun Ma, Yuqing Yang, Qiang Huang
  • Patent number: 11641765
    Abstract: A backplane, a display device and a method of manufacturing a backplane are provided. The backplane includes a base substrate; an inorganic layer on the base substrate, the inorganic layer including a plurality of protrusions; a metal layer covering atop of each protrusion and partial side wall near the top, the metal layer covering adjacent protrusions being disconnected; and a light-emitting layer covering the metal layer and the inorganic layer between the adjacent protrusions, the light-emitting layer being disconnected at regions of the protrusions not covered by the metal layer.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: May 2, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhen Zhang, Xinwei Wu, Kangguan Pan, Lei Deng, Huimin Cao, Fei Li, Wei Huang, Fuwei Zou, Xia Tang, Xijie Peng, Lin Wen, Xudong An, Junjie Zhao, Yue Wei, Yuqing Yang
  • Patent number: 11624244
    Abstract: A connecting structure for a drill collar of a logging while drilling instrument and drill collar sub male and female joints are provided. The connecting structure for a drill collar of a logging while drilling instrument includes a male connecting joint and a female connecting joint matched with each other. The male connecting joint and the female connecting joint are rotatable relative to each other. Electrical passages are respectively arranged in the male and female connecting joints. One of the male and female connecting joints is provided with a multi-core coaxial electrical male connector connected with the electrical passage, and the other is correspondingly provided with a multi-core coaxial electrical female connector connected with the electrical passage. The male connecting joint is coaxially nested in the female connecting joint. The multi-core coaxial electrical male connector is inserted into and fitted to the multi-core coaxial electrical female connector.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: April 11, 2023
    Assignee: CHINA OILFIELD SERVICES, LIMITED
    Inventors: Yongren Feng, Zhongli Bao, Qiang Yu, Xiaofei Qin, Lin Huang, Xingfang Wu, Yuqing Yang, Jibin Zou
  • Patent number: 11568821
    Abstract: A array substrate includes: a first sub-pixel, a second sub-pixel and a dummy sub-pixel that are located in a display region; a luminance attenuation degree of the first sub-pixel is greater than that of the second sub-pixel along a target direction; and a light-emitting layer of the dummy sub-pixel is configured to emit light having a color the same as that of light emitted by the first sub-pixel. As the dummy sub-pixel further includes the connecting electrode electrically connecting the pixel circuit with the light-emitting layer of the dummy sub-pixel the luminance attenuation of the first sub-pixel may be effectively compensated by driving the dummy sub-pixel to emit light.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: January 31, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chaoqun Zhang, Yuqing Yang, Xiping Li, Jiajian Guan
  • Publication number: 20220399416
    Abstract: A display substrate includes a substrate, at least one inorganic film, metal film(s) and organic film(s), the at least one inorganic film is disposed on the substrate; at least one edge portion of the entire at least one inorganic film is step-shaped. The metal film(s) are disposed on a side of the at least one inorganic film facing away from the substrate. A metal film includes a conductive pattern and residual pattern(s), and an orthographic projection of a residual pattern on the substrate is located within an orthographic projection of a step-shaped edge portion of the at least one inorganic film on the substrate. An organic film is disposed on a side of the metal film facing away from the substrate, and an edge portion of the organic film covers the residual pattern of the metal film.
    Type: Application
    Filed: March 8, 2021
    Publication date: December 15, 2022
    Inventors: Linhong HAN, Yi ZHANG, Weiyun HUANG, Yiyang ZHANG, Yue LONG, Youngyik KO, Shikai QIN, Yuqing YANG, Pengfei YU, Yang ZHOU
  • Publication number: 20220399413
    Abstract: The present disclosure provides a display substrate, including: a base substrate having an opening region, a transition region surrounding the opening region and a pixel region surrounding the opening region; at least one ink-jet printing dam in the transition region and surrounding the opening region; and at least one conductive film layer in the transition region, where an orthographic projection of the conductive film layer on the base substrate is overlapped with an orthographic projection of the ink-jet printing dam on the base substrate. In the technical solution of the present disclosure, the conductive film layer is intended to absorb and conduct heat, so as to reduce the heat on the ink-jet printing dam.
    Type: Application
    Filed: July 14, 2021
    Publication date: December 15, 2022
    Inventors: Xiaoyan YANG, Yuqing YANG, Xiping LI, Huiyang YU, Fengxia TAN, Yong ZHUO, Hui LI, Wei ZHANG, Jonguk KWAK, Shicheng SUN, Xinwei WU, Cunzhi LI, Dongsheng ZHAO
  • Patent number: 11527738
    Abstract: A display substrate and a preparation method thereof, and a display device are provided. The preparation method includes: forming a display region and a non-display region including an opening region; forming a first barrier wall between the display region and the opening region, in which the first barrier wall surrounds the opening region and includes a first metal layer structure, and a recess is formed on at least one side surface, surrounding the opening region, of the first metal layer structure; and after the first barrier wall is formed, forming a conductive layer pattern in the display region and on the first barrier wall. The forming the conductive layer pattern includes: forming a conductive material layer in the display region and on the first barrier wall, the conductive material layer being disconnected at the first barrier wall; and patterning the conductive material layer to form the conductive layer pattern.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: December 13, 2022
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Zhen Zhang, Yuqing Yang, Yue Wei, Yiyang Zhang, Lei Deng
  • Patent number: 11521936
    Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a base, a first insulating layer disposed above the base, a first alignment pattern disposed in the peripheral area on a surface of the first insulating layer facing away from the base, and a second alignment pattern disposed in the peripheral area at a side of the first insulating layer away from the base. An orthographic projection of the second alignment pattern on the base and an orthographic projection of the first alignment pattern on the base have a non-overlapping region therebetween, and the second alignment pattern is in contact with the first insulating layer in the non-overlapping region. Adhesion between the second alignment pattern and the first insulating layer is greater than adhesion between the second alignment pattern and the first alignment pattern.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: December 6, 2022
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
    Inventors: Zhen Zhang, Xinwei Wu, Huimin Cao, Kangguan Pan, Fei Li, Yuqing Yang, Yue Wei
  • Publication number: 20220310722
    Abstract: Provided are a display motherboard, a preparation method thereof, a display substrate and a display device. The display motherboard includes a plurality of display substrate regions and a cutting region located at a periphery of each of the plurality of display substrate regions; the display motherboard includes a driving structure layer arranged in each of the plurality of display substrate regions and a marking structure layer arranged in each cutting region, wherein the marking structure layer includes a cutting mark layer; and a planarization layer arranged on the driving structure layer and the marking structure layer, and covering the marking structure layer.
    Type: Application
    Filed: December 29, 2020
    Publication date: September 29, 2022
    Inventors: Linhong HAN, Yi ZHANG, Guangzhou ZHAO, Yiyang ZHANG, Yuqing YANG, Tingliang LIU, Pengfei YU, Yang ZHOU, Qun MA, Xiping LI, Shikai QIN, Weiyun HUANG, Yue LONG
  • Publication number: 20220293059
    Abstract: A array substrate includes: a first sub-pixel, a second sub-pixel and a dummy sub-pixel that are located in a display region; a luminance attenuation degree of the first sub-pixel is greater than that of the second sub-pixel along a target direction; and a light-emitting layer of the dummy sub-pixel is configured to emit light having a color the same as that of light emitted by the first sub-pixel. As the dummy sub-pixel further includes the connecting electrode electrically connecting the pixel circuit with the light-emitting layer of the dummy sub-pixel the luminance attenuation of the first sub-pixel may be effectively compensated by driving the dummy sub-pixel to emit light.
    Type: Application
    Filed: October 24, 2019
    Publication date: September 15, 2022
    Inventors: Chaoqun Zhang, Yuqing Yang, Xiping Li, Jiajian Guan
  • Patent number: 11411059
    Abstract: The disclosure provides a display substrate motherboard, a manufacturing method thereof, a display panel motherboard and a manufacturing method of a display substrate. The display substrate motherboard includes a base substrate including multiple substrate areas, each substrate area including a display region and a pad region; a display structure layer located on the base substrate and including a pixel defining layer and multiple film layers located between the pixel defining layer and the base substrate, a blocking region is arranged between any two adjacent substrate areas; a portion of the display structure layer in the blocking region has a first groove therein, a portion of the display structure layer between the first groove and the pad region adjacent thereto constitutes a first spacer region; a thickness of the portion of the display structure layer in the first spacer region is less than that in the display region.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: August 9, 2022
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD
    Inventors: Xuhui Cheng, Daji Wang, Yuqing Yang, Zhen Zhang, Xiping Li, Fuwei Zou, Yiyang Zhang, Huiyang Yu
  • Publication number: 20220181426
    Abstract: The present disclosure provides an array substrate, a method for manufacturing an array substrate and a display panel. The array substrate includes: a base having a display area, a peripheral area surrounding the display area, and a visible area located between the display area and the peripheral area; a plurality of voltage signal lines disposed on the base; a metal strip disposed on the base, the voltage signal lines are coupled to the metal strip, at least a portion of the metal strip is located in the visible area, and the portion of the metal strip located in the visible area is provided with an opening.
    Type: Application
    Filed: January 20, 2021
    Publication date: June 9, 2022
    Inventors: Gong CHEN, Yuqing YANG, Yiyang ZHANG, Zheng BAO, Zhiyong YANG, Yang ZHOU, Huijun LI, Tingliang LIU, Huijuan YANG, Xin ZHANG, Meng ZHANG, Xiaofeng JIANG, Hao ZHANG, Yu WANG
  • Patent number: 11289021
    Abstract: A pixel circuit, a display panel, a display device and a driving method are provided. The pixel circuit provides an initial signal having an excitation pulse to a control electrode of a driving transistor through a reset circuit in advance; and the initial signal having a preset voltage is provided to the control electrode of the driving transistor after a preset duration.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: March 29, 2022
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Zihua Li, Qi Liu, Guoping Zhang, Jing Liu, Yuqing Yang, Xiping Li
  • Publication number: 20220077423
    Abstract: A display substrate and a preparation method thereof, and a display device are provided. The preparation method includes: forming a display region and a non-display region including an opening region; forming a first barrier wall between the display region and the opening region, in which the first barrier wall surrounds the opening region and includes a first metal layer structure, and a recess is formed on at least one side surface, surrounding the opening region, of the first metal layer structure; and after the first barrier wall is formed, forming a conductive layer pattern in the display region and on the first barrier wall. The forming the conductive layer pattern includes: forming a conductive material layer in the display region and on the first barrier wall, the conductive material layer being disconnected at the first barrier wall; and patterning the conductive material layer to form the conductive layer pattern.
    Type: Application
    Filed: July 12, 2019
    Publication date: March 10, 2022
    Inventors: Zhen ZHANG, Yuqing YANG, Yue WEI, Yiyang ZHANG, Lei DENG
  • Publication number: 20220069054
    Abstract: Provided are a display panel, a manufacturing method therefor, and a display device. The display panel comprises a hole in a display region and comprises: a substrate; a drive circuit layer comprising a thin film transistor; a wire, connected to the thin film transistor; one or more isolation members surrounding the hole, disposed on the side of the drive circuit layer, and located between the wire and the hole, at least one isolation member comprising a first and a second isolation layer, and an orthographic projection of a surface of the first isolation layer away from the substrate is inside that of the second isolation layer on the substrate; a planarization layer, on the side of the drive circuit layer and covering the wire; and an anode, on the side of the planarization layer and connected to the wire by a via penetrating the planarization layer.
    Type: Application
    Filed: October 12, 2020
    Publication date: March 3, 2022
    Inventors: Zhen Zhang, Ning Zhao, Xinwei Wu, Xudong An, Yue Wei, Yuqing Yang