Patents by Inventor Yu Wu

Yu Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11927712
    Abstract: Disclosed herein is a method for eccentricity correction. This method may dispose a downhole tool into a borehole. The downhole tool may comprise a measuring assembly that has at least one transducer, determining a beam pattern from the at least one transducer, determining a center of the measurement assembly in the borehole with the beam pattern, calculating a beam pattern factor with at least the beam pattern, calculating an angle factor with at least the beam pattern, calculating an eccentricity factor with at least the beam pattern factor and the angle factor, and creating an eccentricity corrected image with at least the eccentricity factor.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: March 12, 2024
    Assignee: Halliburton Energy Services, Inc.
    Inventors: Yu Weng, Peng Li, Chung Chang, Richard Coates, Rodney Allen Marlow, Xiang Wu, Yao Ge, Jing Jin
  • Patent number: 11928121
    Abstract: Mechanisms are provided to implement a visual analytics pipeline. The mechanisms generate, from an input database of records, a chronology-aware graph data structure of a plurality of records based features specified in an ontology data structure. The chronology-aware graph data structure has vertices representing one or more of events or records based features corresponding to events, and edges representing chronological relationships between events. The mechanisms execute a chronology-aware graph query on the chronology-aware graph data structure to generate a filtered set of vertices and corresponding features corresponding to criteria of the chronology-aware graph query.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: March 12, 2024
    Assignee: International Business Machines Corporation
    Inventors: Andrea Giovannini, Joy Tzung-Yu Wu, Tanveer Syeda-Mahmood, Ashutosh Jadhav
  • Patent number: 11926335
    Abstract: Methods, systems, and non-transitory computer-readable media are configured to perform operations comprising determining a symmetric scenario for a scenario; training a first machine learning model for the scenario based on first training data generated from second training data for the symmetric scenario; and generating a prediction for the scenario based on the first machine learning model.
    Type: Grant
    Filed: June 26, 2023
    Date of Patent: March 12, 2024
    Assignee: PlusAI, Inc.
    Inventors: Yu Wang, Yongzuan Wu
  • Publication number: 20240074823
    Abstract: A robotic bronchoscopy navigation method, performed by a processing control device, includes: performing a navigation procedure according to obtained navigation image, the navigation procedure including: determining whether the navigation image has a node, if the navigation image does not have the node, controlling a bending part of a robotic bronchoscopy to move toward an image center of the navigation image, if the navigation image has the node, calculating a distance between the bronchoscopy and the node, controlling the bending part to move according to a default branch when the distance is smaller than a threshold of distance, and determining whether the default branch is a destination branch where a destination is located, if the default branch is not the destination branch, obtaining another navigation image, and performing the navigation procedure on the another navigation image, and if the default branch is the destination branch, outputting a notification.
    Type: Application
    Filed: November 29, 2022
    Publication date: March 7, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: An-Peng WANG, Chien-Yu WU, Cheng-Peng KUAN, Shu HUANG
  • Publication number: 20240074761
    Abstract: An implantable rotator cuff muscle suture spacer with pressure sensing is provided, formed by a semiconductor manufacture procedure, including a base layer, made of a polymer material and having flexibility, and further including a first configuration region and a second configuration region, where the base layer is folded at imaginary fold line positions of the first configuration region and the second configuration region, so that the first configuration region is located above the second configuration region; a first electrode region, deposited on the first configuration region; a second electrode region, deposited on the second configuration region, corresponding to a position below the first electrode region, and configured to obtain a pressure sensing value; an inductance coil, deposited on the second configuration region and surrounding the second electrode region; and a capacitor layer, coated above a surface of the base layer to form a dielectric substance.
    Type: Application
    Filed: September 6, 2023
    Publication date: March 7, 2024
    Inventors: WEN CHENG KUO, HSIANG-YU WU, SONG-CHENG HONG
  • Publication number: 20240079278
    Abstract: A method includes forming a pad layer. The pad layer includes a first portion over a first part of a semiconductor substrate, and a second portion over a second part of the semiconductor substrate. The first portion has a first thickness, and the second portion has a second thickness smaller than the first thickness. The semiconductor substrate is then annealed to form a first oxide layer over the first part of the semiconductor substrate, and a second oxide layer over the second part of the semiconductor substrate. The pad layer, the first oxide layer, and the second oxide layer are removed. A semiconductor layer is epitaxially grown over and contacting the first part and the second part of the semiconductor substrate.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 7, 2024
    Inventors: Jhih-Yong Han, Wen-Yen Chen, Yi-Ting Wu, Tsai-Yu Huang, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20240080079
    Abstract: Provided are CSI feedback and receiving methods, apparatuses, a device, and a storage medium. The method includes: a terminal determines PMI, the PMI includes at least one of: first base vector information, second base vector information, second coefficient amplitude information or phase information; for one transmission layer, a frequency domain resource in one preset frequency domain unit corresponds to one precoding vector, the precoding vector is a linear combination of first base vectors, and weighting coefficients used in the linear combination of the first base vectors are first coefficients; on multiple frequency domain units contained in a CSI feedback band, a vector composed of first coefficients corresponding to a same first base vector is a linear combination of second base vectors, and weighting coefficients used in the linear combination of the second base vectors are second coefficients; and the terminal feeds back CSI containing the PMI to a base station.
    Type: Application
    Filed: October 30, 2023
    Publication date: March 7, 2024
    Applicant: ZTE Corporation
    Inventors: Hao WU, Yijian CHEN, Guozeng ZHENG, Yong LI, Zhaohua LU, Yu Ngok LI
  • Publication number: 20240076422
    Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Inventors: Jing-Cherng TSAI, Jen-Long WU, Wen-Hao KANG, Kuei-Pin LIN, Jing-Yu LEE, Jun-Ye HONG, Zih-Yu SHIH, Cheng-Hung CHIANG, Gang-Wei SHEN, Yu-Chuan SUNG, Chung-Hua WENG, Hsing-Ya CHEN
  • Publication number: 20240078979
    Abstract: An electronic device including a display device is provided. The display device includes a sharing area, a junction area, and a privacy area. The junction area is positioned between the sharing area and the privacy area. The display device includes a privacy panel. A transmittance of the privacy panel corresponding to the sharing area is greater than a transmittance of the privacy panel corresponding to the junction area, and the transmittance of the privacy panel corresponding to the junction area is greater than a transmittance of the privacy panel corresponding to the privacy area.
    Type: Application
    Filed: August 8, 2023
    Publication date: March 7, 2024
    Applicants: Innolux Corporation, CARUX TECHNOLOGY PTE. LTD.
    Inventors: Li-Wei Sung, Chia-Hsien Lin, Cheng-Wu Lin, Yu-Ming Wu
  • Publication number: 20240080692
    Abstract: Methods, systems, and devices for wireless communications are described. In some wireless communications systems, a user equipment (UE) and a network entity may utilize multi-port mobility reference signals to assist with spatial based mobility procedures. The UE may receive a reference signal that is associated with multiple antenna ports. The UE may measure a multi-dimensional channel response based on the reference signal. The multi-dimensional channel response may be associated with measured channel metrics corresponding to the multiple antenna ports. The UE may transmit a report that includes a channel measurement vector based on the multi-dimensional channel response. The channel measurement vector may indicate multiple measured channel metrics for one or more dimensions of the multi-dimensional channel response. The network entity may transmit a message that indicates one or more metrics associated with mobility management for the UE based on the report that indicates the channel measurement vector.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Inventors: Jing Jiang, Jae Won Yoo, Yongle Wu, Lei Xiao, Hari Sankar, Alexei Yurievitch Gorokhov, Yu Zhang, Wei Yang, Jing Lei
  • Patent number: 11920473
    Abstract: A device for integrated control of acid wastewater plugging and discharging of an abandoned mine includes an airtight wall, a central controller, a CO2 gas source, an agent bucket, a siphon pipe I and a liquid storage bucket are arranged on the outer side of the airtight wall, and a plurality of monitoring sensors are arranged in the inner side of the airtight wall, and the monitoring sensors are electrically connected to the central controller; and a flood discharge valve is arranged at the bottom of the airtight wall. The device is miniaturized and operates for a long time with low power consumption, thereby achieving long-term unattended operation and maintenance.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: March 5, 2024
    Assignee: Nanchang University
    Inventors: Daishe Wu, Jianlong Li, Yu Xu, Zhifei Ma
  • Patent number: 11923386
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first photodetector disposed in a first pixel region of a semiconductor substrate and a second photodetector disposed in a second pixel region of the semiconductor substrate. The second photodetector is laterally separated from the first photodetector. A first diffuser is disposed along a back-side of the semiconductor substrate and over the first photodetector. A second diffuser is disposed along the back-side of the semiconductor substrate and over the second photodetector. A first midline of the first pixel region and a second midline of the second pixel region are both disposed laterally between the first diffuser and the second diffuser.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Kazuaki Hashimoto, Wei-Chieh Chiang, Cheng Yu Huang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 11919790
    Abstract: An anaerobic-AO-SACR combined advanced nitrogen removal system for high ammonia-nitrogen wastewater, in which high ammonia-nitrogen wastewater first enters an anaerobic reactor to remove most of organic matters from the wastewater, effluent water enters an AO reactor for nitrogen removal by pre-denitrification in an anoxic zone and for removal of the remaining organic matters and nitrification of ammonia nitrogen in an aerobic zone, and then the effluent water enters an intermediate pool. Meanwhile, under the control of a water quality testing device and a PLC controller, a part of raw water is introduced into the intermediate pool to adjust the carbon nitrogen ratio of the wastewater.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: March 5, 2024
    Assignee: SHANDONG JIANZHU UNIVERSITY
    Inventors: Kai Wang, Daoji Wu, Fengxun Tan, Congwei Luo, Xiaoxiang Cheng, Hongye Li, Yu Tian
  • Publication number: 20240072115
    Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.
    Type: Application
    Filed: February 13, 2023
    Publication date: February 29, 2024
    Inventors: Wei-Xiang You, Wei-De Ho, Hsin Yang Hung, Meng-Yu Lin, Hsiang-Hung Huang, Chun-Fu Cheng, Kuan-Kan Hu, Szu-Hua Chen, Ting-Yun Wu, Wei-Cheng Tzeng, Wei-Cheng Lin, Cheng-Yin Wang, Jui-Chien Huang, Szuya Liao
  • Publication number: 20240070081
    Abstract: This application discloses a method and system of using HMB as a cache of physical address mapping table. The method comprises: arranging physical addresses in order of logical addresses, physical mapping entries corresponding to a plurality of consecutive physical addresses form one table unit, and a logical address corresponding to a first entry of each table unit is used as an index of the table unit; determining HMB size, dividing all table units into a plurality of sections according to the HMB size, each section comprises a plurality of table units, each section is divided into a plurality of ways; calculating a metadata according to logical address corresponding to the first entry of the table unit to be stored and the HMB size, the metadata comprises a section number and a way number; writing the metadata and the table unit to be stored into the HMB. This application uses HMB as L2P address mapping table cache of SSD controller, saving or avoiding use cost of DRAM on SSD, and reducing SSD size.
    Type: Application
    Filed: August 4, 2023
    Publication date: February 29, 2024
    Inventors: Jian WU, Dishi LAI, Yu ZHAO
  • Publication number: 20240074282
    Abstract: The present application provides a displaying base plate and a displaying device, which relates to the technical field of displaying. The displaying device can ameliorate the problem of screen greening caused by electrostatic charges, thereby improving the effect of displaying. The displaying base plate includes an active area and a non-active area connected to the active area, the non-active area includes an edge region and a first-dam region, and the first-dam region is located between the active area and the edge region; the displaying base plate further includes: a substrate; an anti-static layer disposed on the substrate, wherein the anti-static layer is located at least within the edge region; and a driving unit and a touch unit that are disposed on the substrate, wherein the driving unit is located within the active area.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yu Zhao, Yong Zhuo, Wei He, Yanxia Xin, Qun Ma, Xiping Li, Jianpeng Liu, Kui Fang, Cheng Tan, Xueping Li, Yihao Wu, Xiaoyun Wang, Haibo Li, Xiaoyan Yang
  • Publication number: 20240071776
    Abstract: A chip packaging structure and a method for fabricating the same are provided. The chip package structure includes a conductive substrate, a dam and a metal shielding layer. The conductive substrate includes a substrate, vias and electrodes. The substrate has first and second board surfaces opposite to each other. The vias penetrate through the first board surface and the second board surface, and a part of the vias is disposed in a first die-bonding region on which a chip is to be arranged. The electrodes extend from the first board surface to the second board surface through the vias. The dam is formed on the first board surface to surround the first die-bonding region, and the dam has a height higher than that of the chip. The metal shielding layer covers the dam and a part of the first board surface that do not overlap with the electrodes.
    Type: Application
    Filed: December 2, 2022
    Publication date: February 29, 2024
    Inventors: DEI-CHENG LIU, CHIA-SHUAI CHANG, MING-YEN PAN, JIAN-YU SHIH, JHIH-WEI LAI, SHIH-HAN WU
  • Publication number: 20240071656
    Abstract: A circuit protection device includes a first temperature sensitive resistor, a second temperature sensitive resistor, an electrically insulating multilayer, a first and second electrode layer, and at least one external electrode. The first temperature sensitive resistor and the second temperature sensitive resistor are electrically connected in parallel, and have a first upper electrically conductive layer and a second lower electrically conductive layer, respectively. The electrically insulating multilayer includes an upper insulating layer, a middle insulating layer, and a lower insulating layer. The upper insulating layer is between the first upper electrically conductive layer and the first electrode layer. The middle layer is laminated between the first temperature sensitive resistor and the second temperature sensitive resistor. The lower insulating layer is between the second lower electrically conductive layer and the second electrode layer.
    Type: Application
    Filed: January 13, 2023
    Publication date: February 29, 2024
    Inventors: Chien Hui WU, Yung-Hsien CHANG, Cheng-Yu TUNG, Ming-Hsun LU, Yi-An SHA
  • Publication number: 20240066635
    Abstract: A laser machining device includes a pulsed laser generator, an accommodation chamber, a bandwidth broadening unit and a pulse compression unit. The pulsed laser generator is configured to emit a pulsed laser. The accommodation chamber has a gas inlet. The bandwidth broadening unit is disposed in the accommodation chamber, and is configured to broaden a frequency bandwidth of the pulsed laser to obtain a broad bandwidth pulsed laser. The pulse compression unit is disposed in the accommodation chamber. The bandwidth broadening unit and the pulse compression unit are arranged in order along a laser propagation path, and the pulse compression unit is configured to compress a pulse duration of the broad bandwidth pulsed laser.
    Type: Application
    Filed: October 5, 2022
    Publication date: February 29, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Chi LEE, Bo-Han CHEN, Chih-Hsuan LU, Ping-Han WU, Zih-Yi LI, Shang-Yu HSU
  • Publication number: 20240071538
    Abstract: The present disclosure provides a multi-state one-time programmable (MSOTP) memory circuit including a memory cell and a programming voltage driving circuit. The memory cell includes a MOS storage transistor, a first MOS access transistor and a second MOS access transistor electrically connected to store two bits of data. When the memory cell is in a writing state, the programming voltage driving circuit outputs a writing control potential to the gate of the MOS storage transistor, and when the memory cell is in a reading state, the programming voltage driving circuit outputs a reading control potential to the gate of the MOS storage transistor.
    Type: Application
    Filed: August 22, 2023
    Publication date: February 29, 2024
    Inventors: CHEN-FENG CHANG, YU-CHEN LO, TSUNG-HAN LU, SHU-CHIEH CHANG, CHUN-HAO LIANG, DONG-YU WU, MENG-LIN WU