Abstract: An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.

Abstract: An integrated circuit package including integrated circuit dies with slanted sidewalls and a method of forming are provided. The integrated circuit package may include a first integrated circuit die, a first gap-fill dielectric layer around the first integrated circuit die, a second integrated circuit die underneath the first integrated circuit die, and a second gap-fill dielectric layer around the second integrated circuit die. The first integrated circuit die may include a first substrate, wherein a first angle is between a first sidewall of the first substrate and a bottom surface of the first substrate, and a first interconnect structure on the bottom surface of the first substrate, wherein a second angle is between a first sidewall of the first interconnect structure and the bottom surface of the first substrate. The first angle may be larger than the second angle.

Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.

Abstract: A package structure includes a first RDL, an adhesive layer and a first electronic component. Upper bumps and conductive pads are provided on a first upper surface and a first lower surface of the first RDL, respectively. The adhesive layer is located on the first upper surface of the first RDL and surrounds the upper bumps. The first electronic component is mounted on the adhesive layer and includes conductors which are visible from an active surface of the first electronic component and joined to the upper bumps, the active surface of the first electronic component faces toward the first upper surface of the first RDL. Two adhesive surfaces of the adhesive layer are adhered to the first upper surface of the first RDL and the active surface of the first electronic component, respectively.

Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.

Abstract: Synthetic amino acid-modified polymers and methods of making the same and using the same are disclosed. The synthetic amino acid-modified polymers possess distinct thermosensitive, improved water-erosion resistant, and enhanced mechanical properties, and are suitable of reducing or preventing formation of postoperative tissue adhesions. Additionally, the amino acid-modified polymers can also be used as a vector to deliver pharmaceutically active agents.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes an insulation layer. A bottom electrode via is disposed in the insulation layer. The bottom electrode via includes a conductive portion and a capping layer over the conductive portion. A barrier layer surrounds the bottom electrode via. A magnetic tunneling junction (MTJ) is disposed over the bottom electrode via.

Abstract: The present invention relates to a composition comprising an amino acid-modified polymer, a carboxypolysaccharide, and may further include a metal ion for anti-adhesion and vector application. More specifically, the invention relates to a thermosensitive composition having enhanced mechanical and improved water-erosion resistant properties for efficiently preventing tissue adhesions and can serve as a vector with bio-compatible, bio-degradable/absorbable, and in-vivo sustainable properties.

Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.

Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.

Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.

Abstract: An anti-floating circuit including a first pull-high circuit, a first pull-low circuit and a first control circuit is provided. The first pull-high circuit includes a first P-type transistor and a second P-type transistor and is coupled to a first power terminal. The first pull-low circuit includes a first N-type transistor and a second N-type transistor and is coupled to a second power terminal. A first path is between the first P-type transistor and the first N-type transistor. A second path is between the second P-type transistor and the second N-type transistor. A third path is between the first P-type transistor and the second power terminal. In the first mode, the control circuit turns on the first and second paths and turns off the third path. In the second mode, the control circuit turns off the first and second paths and turns on the third path.

Abstract: A driving method for a display panel is provided. The display panel includes a plurality of pixel circuits arranged in an array. Each of the pixel circuits respectively includes a first switch and a second switch coupled in series. The driving method for the display panel includes following steps. Plural first pulse signals are periodically received in a de-stress mode through a control terminal of the first switch of each of the pixel circuits, where the first pulse signals include a first pulse width. Plural second pulse signals are sequentially and periodically received in the de-stress mode through a control terminal of the second switch of each of the pixel circuits, where the second pulse signals include a second pulse width, and each of the pixel circuits receives the first pulse signals and the second pulse signals at different times.

Abstract: A driving method for a display panel is provided. The display panel includes a plurality of pixel circuits arranged in an array. Each of the pixel circuits respectively includes a first switch and a second switch coupled in series. The driving method includes following steps. A first driving signal is received during an update period through a control terminal of the first switch of each of the pixel circuits, so that the first switch of each of the pixel circuits is continuously turned on during the update period. A second driving signal is sequentially received during the update period through a control terminal of the second switch of each of the pixel circuits.

Abstract: A driving method for a display panel is provided. The display panel includes a plurality of pixel circuits arranged in an array. Each of the pixel circuits respectively includes a first switch and a second switch coupled in series. The driving method for the display panel includes following steps. Plural first pulse signals are periodically received in a de-stress mode through a control terminal of the first switch of each of the pixel circuits, where the first pulse signals include a first pulse width. Plural second pulse signals are sequentially and periodically received in the de-stress mode through a control terminal of the second switch of each of the pixel circuits, where the second pulse signals include a second pulse width, and each of the pixel circuits receives the first pulse signals and the second pulse signals at different times.

Abstract: A driving method for a display panel is provided. The display panel includes a plurality of pixel circuits arranged in an array. Each of the pixel circuits respectively includes a first switch and a second switch coupled in series. The driving method includes following steps. A first driving signal is received during an update period through a control terminal of the first switch of each of the pixel circuits, so that the first switch of each of the pixel circuits is continuously turned on during the update period. A second driving signal is sequentially received during the update period through a control terminal of the second switch of each of the pixel circuits.

Abstract: A display apparatus and a driving method of a display panel thereof are provided. The display apparatus includes a gate driver circuit providing a plurality of gate driving signals, a switch driver circuit providing a plurality of switch driving signals and the display panel having a plurality of pixels arranged in an array. Each of the pixels includes a first switch, a second switch and a storage capacitor coupled in series, wherein the first switch is controlled by the corresponding switch driving signal, and the second switch is controlled by the corresponding gate driving signal. During a frame update period, the gate driving signals are enabled sequentially, and an enabling period of each of switch driving signal is overlapped with enabling periods of a part of gate driving signals. During an operation waiting period, the gate driving signals are enabled periodically.

Abstract: A display apparatus and a driving method of a display panel thereof are provided. The display apparatus includes a gate driver circuit providing a plurality of gate driving signals, a switch driver circuit providing a plurality of switch driving signals and the display panel having a plurality of pixels arranged in an array. Each of the pixels includes a first switch, a second switch and a storage capacitor coupled in series, wherein the first switch is controlled by the corresponding switch driving signal, and the second switch is controlled by the corresponding gate driving signal. During a frame update period, the gate driving signals are enabled sequentially, and an enabling period of each of switch driving signal is overlapped with enabling periods of a part of gate driving signals. During an operation waiting period, the gate driving signals are enabled periodically.

Abstract: An identifiable modular electronic device is provided, which includes a base main body, a plurality of external modules, a rotating ring, a plurality of first magnetic induction modules, a second magnetic induction module and a processing module. The base main body includes a plurality of sockets. Each external module can be plugged into each socket. A slot is disposed at a side of each external module. Each external module includes a first magnetic body. Each first magnetic induction module induces each corresponding first magnetic body to produce a magnetic flux signal. The rotating ring sheathes and is fixed on the base main body. The rotating ring is disposed with a plurality of latches, and one of the latches is disposed with a second magnetic body. The rotating ring is rotated from the OFF position to the ON position.

Abstract: An electronic device with modulization parts includes a first main body, a first wireless transmission port having a first circuit board and a first induction pad, a second main body detachably coupled to the first main body, and a second wireless transmission port having a second circuit board, a second induction pad, an induction cap and an elastic conductive member electrically conducted to the second induction pad and the induction cap. The first circuit board is disposed on the first main body. The first induction pad is electrically connected to the first circuit board. The second circuit board is disposed on the second main body. The elastic conductive member physically supports the induction cap so that the first induction pad induces the second induction pad through the induction cap.