Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.

Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.

Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.

Abstract: An electronic module is provided, which includes a first package and a second package stacked on the first package. The first package has an encapsulant and an electronic element embedded in the encapsulant. The second package has an insulating layer and an antenna structure formed on and extending through the insulating layer. The insulating layer is bonded to the encapsulant with the antenna structure being electrically connected to the electronic element. Since the second package having the antenna structure is stacked on the first package, the invention eliminates the need to increase the area of the first package for mounting the antenna structure and hence allows the electronic module to meet the miniaturization requirement.

Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.

Abstract: An electronic stack structure is provided, including a first substrate, a second substrate stacked on the first substrate through a plurality of passive elements, and an electronic element disposed on at least one of the first substrate and the second substrate. As such, the distance between the first substrate and the second substrate is defined by the height and size of the passive elements. The present disclosure further provides a method for fabricating the electronic stack structure.

Abstract: An electronic module is provided, which includes a first package and a second package stacked on the first package. The first package has an encapsulant and an electronic element embedded in the encapsulant. The second package has an insulating layer and an antenna structure formed on and extending through the insulating layer. The insulating layer is bonded to the encapsulant with the antenna structure being electrically connected to the electronic element. Since the second package having the antenna structure is stacked on the first package, the invention eliminates the need to increase the area of the first package for mounting the antenna structure and hence allows the electronic module to meet the miniaturization requirement.

Abstract: A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art.

Abstract: A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art.

Abstract: A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art.

Abstract: A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art.

Abstract: A surface-mount-enhanced lead frame and a method for fabricating a semiconductor package with the lead frame are proposed, wherein a dam bar structure between any two neighboring lead frames of a lead frame module plate is formed with an indentation and at least a solder metal layer is applied on the bottom surface of the lead frame and the indentation. A singulation process is performed along the indentation to separate the lead frame module plate mounted with semiconductor chips and package body into a plurality of packages. Therefore, the indentation and the solder metal layer applied thereon can provide solder paste improved wettability and increased solder surface, while the semiconductor package with the lead frame is mounted on an external device via a surface-mount-technology, so as to prevent problems of signal transmission owing to separation of solder joint from solder open.

Abstract: A disturbing plate structure having at least one down set, applicable in a lead frame-type package in a semiconductor. The disturbing plate has at least a lead frame, a die, a glue layer, a plurality of disturbing plates, a top mold compound, and a bottom mold compound. The lead frame has a plurality of leads. Two disturbing plates are located on two sides of the die. A space is formed by bending a first bent portion and a second bent portion of the disturbing plate down. Finally, the lead frame is encapsulated with a mold compound. By adjusting the size of the space formed by the first bent portion and the second bent portion, the top mold compound section has substantially the same volume as the bottom mold compound section to finish the packaging and forming.