Abstract: A display device includes a substrate, a light emitting element layer disposed on the substrate and including a plurality of light emitting areas each including a light emitting element that emits light, an encapsulation layer disposed on the light emitting element layer, and a light control layer disposed on the encapsulation layer, wherein the light control layer includes a light transmitting film that transmits the light and a light blocking film that blocks the light, and the light transmitting film includes, a first light transmitting portion overlapping the light blocking film in a thickness direction of the substrate, and a plurality of second light transmitting portions each surrounded by the light blocking film, and a thickness of the light blocking film is greater than a thickness of the first light transmitting portion.

Abstract: A display device includes: a first pixel electrode disposed in a first emission area, on a substrate; an insulating layer covering edges of the first pixel electrode; a first light-emitting layer disposed on the first pixel electrode and the insulating layer; a first common electrode disposed on the first light-emitting layer; banks disposed on the insulating layer and surrounding the first emission area; and a first organic pattern surrounding the first emission area, disposed on the banks, and including the same material as the first light-emitting layer. Side surfaces of each of the banks are spaced apart from side surfaces of the insulating layer.

Abstract: An manufacturing method of a display device may include the following steps: forming a transistor on a substrate; forming an insulating layer on the transistor; forming a conductive layer including silver on the insulating layer; forming a photosensitive member on the conductive layer; forming an electrode of a light-emitting element by etching the conductive layer; performing plasma treatment on a structure that comprises the electrode, the plasma treatment using a gas including a halogen; and removing a product that is resulted from the plasma treatment.

Abstract: A display device includes a substrate, a light emitting diode disposed on the substrate and light control patterns overlapping the light emitting diode, the light control patterns including at least three light blocking patterns and at least two organic patterns alternately disposed on the light emitting diode and spaced apart from each other.

Abstract: A display device includes, a light emitting diode disposed on a substrate, and including an emission layer, an encapsulation layer disposed on the light emitting diode, a first layer disposed on the encapsulation layer and including an opening, a light blocking pattern disposed in the opening and extending in a first direction, and a second layer disposed on the first layer and the light blocking pattern. A refractive index of the first layer and a refractive index of the second layer are different from each other.

Abstract: A display device includes: a substrate; a semiconductor on the substrate; a first gate insulating layer on the semiconductor; a gate electrode on the first gate insulating layer, and overlapping with the semiconductor; a signal line spaced from the gate electrode; a sacrificial layer on the signal line, and including an amorphous silicon material; an interlayer insulating layer on the gate electrode and the sacrificial layer; a source electrode on the interlayer insulating layer, and connected to a first region of the semiconductor; a drain electrode on the interlayer insulating layer, and connected to a second region of the semiconductor; and a connecting member on the interlayer insulating layer, and connected to the signal line.

Abstract: A light emitting diode device includes a thin film transistor substrate having a plurality of light emitting areas, a first diode electrode and a second diode electrode on the thin film transistor substrate, a first passivation pattern between the first diode electrode and the second diode electrode, a plurality of micro light emitting diodes on the first passivation pattern, a first bridge pattern on the micro light emitting diodes and electrically connecting the first diode electrode to the micro light emitting diodes, and a second bridge pattern on the first bridge pattern and electrically connecting the second diode electrode to the micro light emitting diodes, wherein each sidewall of each of the micro light emitting diodes and each sidewall of the first passivation pattern form a same plane.

Abstract: A display device includes a transistor disposed on a substrate, an organic layer disposed on the transistor and defining grooves, a first pixel electrode disposed on the organic layer, electrically connected to the transistor, and including a pixel metal layer and a pixel protective layer, the pixel protective layer including at least one of an oxide and a halide and surrounding the pixel metal layer, and a dummy electrode disposed on the organic layer, spaced apart from the transistor, and including a dummy metal layer and a dummy protective layer, the dummy protective layer including at least one of an oxide and a halide and surrounding the dummy metal layer.

Abstract: A method for etching an insulating layer includes: sequentially forming a first gate insulating layer, an amorphous silicon layer, a first interlayer insulating layer, and a second interlayer insulating layer on a substrate; applying a photoresist on the second interlayer insulating layer, and patterning the photoresist through a photo-process; first etching the second interlayer insulating layer and the first interlayer insulating layer until at least a portion of the amorphous silicon layer is exposed by using the patterned photoresist as a mask; second etching the second interlayer insulating layer and the first interlayer insulating layer; third etching the amorphous silicon layer; and fourth etching the first gate insulating layer, wherein an etching gas used in the second etching includes a material having a higher etching selection ratio of the first and second interlayer insulating layers to the amorphous silicon layer than an etching gas used in the first etching.

Abstract: A display device includes a thin film transistor on a base substrate and a signal wiring electrically connected to the thin film transistor. The signal wiring includes a main conductive layer including copper, and a capping layer including titanium the capping layer overlapping a portion of an upper surface of the main conductive layer. The signal wiring has a taper angle in a range of about 70° to about 90°. A thickness of the capping layer is in a range of about 100 ? to about 300 ?, and a thickness of the main conductive layer is in a range of about 1,000 ? to about 20,000 ?.

Abstract: A display device includes the following elements: a semiconductor layer positioned on a substrate; a first gate insulating layer positioned on the semiconductor layer; a first gate conductive layer positioned on the first gate insulating layer; a second gate insulating layer positioned on the first gate conductive layer; a second gate conductive layer positioned on the second gate insulating layer; a first insulating layer positioned on the second gate conductive layer; a first contact hole passing through the first insulating layer, the second gate insulating layer, and the first gate insulating layer; a second contact hole passing through the first insulating layer; and a third contact hole passing through the first insulating layer and the second gate insulating layer. A cross-section of the first insulating layer in a plane perpendicular to the substrate has a curved profile.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A display device includes a display area, anon-display area, and a pad part in the non-display area and exposed to outside the display device. The pad part includes a conductive part, and an insulating part defining an opening exposing the conductive part to outside the pad part. The insulating part includes in order from the conductive part a first insulating layer defining a first opening, and a second insulating layer facing the first insulating layer and defining a second opening which is wider than the first opening.

Abstract: A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.

Abstract: A light emitting display device includes a substrate, a transistor, a first insulating layer, a second insulating layer, a pixel electrode, a conductive member, a third insulating layer, and a light emitting material layer. The transistor overlaps the substrate. The first insulating layer overlaps the transistor. The second insulating layer overlaps the first insulating layer. The pixel electrode directly contacts the second insulating layer and is electrically connected to the transistor. The conductive member directly contacts at least one of the first insulating layer and the second insulating layer. The third insulating layer overlaps the second insulating layer, includes a hole, and includes an opening. The hole exposes the pixel electrode. The opening exposes the conductive member. The light emitting material layer overlaps the pixel electrode inside the hole, overlaps the third insulating layer, and has a discontinuity inside the opening.

Abstract: A display panel includes: a plurality of first electrodes disposed on a via-layer and corresponding to a plurality of pixel areas, respectively; a pixel-defining layer disposed on the via-layer; first opening parts corresponding to central portions of the first electrodes and penetrating through the pixel-defining layer; electrode undercuts corresponding to edges of the first opening parts and provided as gaps between the first electrodes and the pixel-defining layer; a plurality of second opening parts corresponding to peripheries of the first electrodes, respectively, and penetrating through the pixel-defining layer; and via-grooves corresponding to the second opening parts and defined on an upper surface of the via-layer; via-undercuts provided by the pixel-defining layer around the second opening parts and the via-layer around the via-grooves.

Abstract: A display device comprises a transistor layer that includes a display area and a pad area disposed adjacent to the display area, an emission layer disposed in the display area on the transistor layer, a first display insulating layer disposed on the emission layer, and an insulating layer disposed in the pad area on the transistor layer, the insulating layer and the first display insulating layer including a same material, and the insulating layer having a step.

Abstract: A display device includes: a substrate; and a plurality of pixel circuits on the substrate comprising: an active layer including a first region and a second region; a gate insulating layer on the active layer, the gate insulating layer including a first insulating layer overlapping the first region and the second region, a second insulating layer on the first insulating layer and overlapping the first region, and a third insulating layer on the second insulating layer and overlapping the first region and the second region; and a first conductive layer on the gate insulating layer, the first conductive layer including a first gate electrode overlapping the first region to form a driving transistor, and a second gate electrode overlapping the second region to form a switching transistor.

Abstract: A display device is disclosed that includes a substrate, a semiconductor layer, a first conductive layer, and a first gate insulating layer. The semiconductor layer is disposed on the substrate and includes a first area and a second area. The first conductive layer is disposed on the semiconductor layer and includes a first gate pattern overlapping the first area and a second gate pattern overlapping the second area. The first gate insulating layer is disposed between the semiconductor layer and the first conductive layer and includes a first insulating layer overlapping the first area and the second area, a second insulating layer overlapping the first area and the second area, and a third insulating layer not overlapping the first area but overlapping the second area. The second insulating layer is disposed between the first insulating layer and the third insulating layer, and has a dielectric constant greater than that of the third insulating layer.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.