Patents by Inventor Yuh-Sen Chang

Yuh-Sen Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11000923
    Abstract: A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit. The wafer lifting system is configured to receive and move the wafer in the chamber unit, and to provide a vertical distance between the heater and the wafer in the chamber unit.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: May 11, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Yen Chen, Tzi-Yi Shieh, Yuh-Sen Chang, Chung-Li Lee
  • Patent number: 10312118
    Abstract: A bonding apparatus includes a wafer stage, a first chip stage, a first chip transporting device, a second stage and a second chip transporting device. The wafer stage is used for holding a wafer. The first chip stage is used for holding at least one first chip. The first chip transporting device is used for transporting the first chip from the first chip stage onto the wafer. The second chip stage is used for holding at least one second chip. The second chip transporting device is used for transporting the second chip from the second chip stage onto the wafer.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: June 4, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Shan Wu, Yi-Ting Hu, Ming-Tan Lee, Yu-Lin Wang, Yuh-Sen Chang, Pin-Yi Shin, Wen-Ming Chen, Wei-Chih Chen, Chih-Yuan Chiu
  • Patent number: 10163842
    Abstract: A semiconductor structure includes an interconnect structure, at least one first metal pad, at least one second metal pad, at least one first bump, at least one second bump, at least one photosensitive material, and a bonding layer. The first metal pad and the second metal pad are disposed on and electrically connected to the interconnect structure. The first bump is disposed on the first metal pad. The second bump is disposed on the second metal pad. The photosensitive material is disposed on the first bump. The bonding layer is in contact with the photosensitive material and the second bump. The photosensitive material is disposed between the first bump and the bonding layer.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: December 25, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Hung Kuo, Chin-Yu Ku, Yuh-Sen Chang, Hon-Lin Huang, Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji Lii
  • Publication number: 20180301430
    Abstract: A semiconductor structure includes an interconnect structure, at least one first metal pad, at least one second metal pad, at least one first bump, at least one second bump, at least one photosensitive material, and a bonding layer. The first metal pad and the second metal pad are disposed on and electrically connected to the interconnect structure. The first bump is disposed on the first metal pad. The second bump is disposed on the second metal pad. The photosensitive material is disposed on the first bump. The bonding layer is in contact with the photosensitive material and the second bump. The photosensitive material is disposed between the first bump and the bonding layer.
    Type: Application
    Filed: April 18, 2017
    Publication date: October 18, 2018
    Inventors: Chien-Hung Kuo, Chin-Yu Ku, Yuh-Sen Chang, Hon-Lin Huang, Sheng-Yu Wu, Ching-Hui Chen, Mirng-Ji LII
  • Publication number: 20180050425
    Abstract: A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit. The wafer lifting system is configured to receive and move the wafer in the chamber unit, and to provide a vertical distance between the heater and the wafer in the chamber unit.
    Type: Application
    Filed: October 31, 2017
    Publication date: February 22, 2018
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Yen CHEN, Tzi-Yi SHIEH, Yuh-Sen CHANG, Chung-Li LEE
  • Patent number: 9808891
    Abstract: A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit. The wafer lifting system is configured to receive and move the wafer in the chamber unit, and to provide a vertical distance between the heater and the wafer in the chamber unit.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: November 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Yen Chen, Tzi-Yi Shieh, Yuh-Sen Chang, Chung-Li Lee
  • Patent number: 9761468
    Abstract: In accordance with some embodiments, a wafer taping device is provided. The wafer taping device includes a tape delivering along a first direction. The wafer taping device also includes a wafer mount unit disposed below the tape. The wafer mount unit has an upper surface for supporting a wafer and having a notch for allowing a cut mark of the wafer to align with it. The notch is staggered with a second direction in the upper surface, and the second direction is substantially perpendicular to the first direction. In addition, the wafer taping device includes a laminating roller disposed above the wafer mount unit and having a long axis elongated in the second direction. The laminating roller is configured to reciprocate along the first direction for pressing the tape to the wafer.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: September 12, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yuh-Sen Chang, Shang-Hsien Lin, Chih-Yang Chan, Szu-Hsien Lee, Chia-Haw Yeh
  • Publication number: 20150235879
    Abstract: In accordance with some embodiments, a wafer taping device is provided. The wafer taping device includes a tape delivering along a first direction. The wafer taping device also includes a wafer mount unit disposed below the tape. The wafer mount unit has an upper surface for supporting a wafer and having a notch for allowing a cut mark of the wafer to align with it. The notch is staggered with a second direction in the upper surface, and the second direction is substantially perpendicular to the first direction. In addition, the wafer taping device includes a laminating roller disposed above the wafer mount unit and having a long axis elongated in the second direction. The laminating roller is configured to reciprocate along the first direction for pressing the tape to the wafer.
    Type: Application
    Filed: February 17, 2014
    Publication date: August 20, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yuh-Sen CHANG, Shang-Hsien LIN, Chih-Yang CHAN, Szu-Hsien LEE, Chia-Haw YEH
  • Publication number: 20150201502
    Abstract: A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit.
    Type: Application
    Filed: January 16, 2014
    Publication date: July 16, 2015
    Applicant: Taiwan Semiconductor Manufacturing CO., LTD.
    Inventors: Shih-Yen Chen, Tzi-Yi Shieh, Yuh-Sen Chang, Chung-Li Lee
  • Publication number: 20150200118
    Abstract: A bonding apparatus includes a wafer stage, a first chip stage, a first transporting device, a second stage and a second transporting device. The wafer stage is used for holding a wafer. The first chip stage is used for holding at least one first chip. The first transporting device is used for transporting the first chip from the first chip stage onto the wafer. The second chip stage is used for holding at least one second chip. The second transporting device is used for transporting the second chip from the second chip stage onto the wafer.
    Type: Application
    Filed: January 16, 2014
    Publication date: July 16, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Shan WU, Yi-Ting HU, Ming-Tan LEE, Yu-Lin WANG, Yuh-Sen CHANG, Pin-Yi SHIN, Wen-Ming CHEN, Wei-Chih CHEN, Chih-Yuan CHIU
  • Patent number: 7601466
    Abstract: A method for photolithography in semiconductor manufacturing includes providing a mask with first and second focus planes for a wafer. The wafer includes corresponding first and second wafer regions. The first wafer region receives a first image during a first exposure utilizing the first focus plane. The second wafer region receives a second image during a second exposure utilizing the second focus plane.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: October 13, 2009
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Sung Yen, Kuei Shun Chen, Chia-Sui Hsu, Yuh-Sen Chang, Hsiao-Tzu Lu
  • Publication number: 20060177778
    Abstract: A method for photolithography in semiconductor manufacturing includes providing a mask with first and second focus planes for a wafer. The wafer includes corresponding first and second wafer regions. The first wafer region receives a first image during a first exposure utilizing the first focus plane. The second wafer region receives a second image during a second exposure utilizing the second focus plane.
    Type: Application
    Filed: February 9, 2005
    Publication date: August 10, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung-Sung Yen, Kuei Chen, Chia-Sui Hsu, Yuh-Sen Chang, Hsiao-Tzu Lu