Patents by Inventor Yuichi Minoura

Yuichi Minoura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130082400
    Abstract: A HEMT has a compound semiconductor layer, a protection film which has an opening and covers an upper side of the compound semiconductor layer, and a gate electrode which fills the opening and has a shape riding on the compound semiconductor layer, wherein the protection film has a stacked structure of a lower insulating film not containing oxygen and an upper insulating film containing oxygen, and the opening includes a first opening formed in the lower insulating film and a second opening formed in the upper insulating film and wider than the first opening, the first opening and the second opening communicating with each other.
    Type: Application
    Filed: August 6, 2012
    Publication date: April 4, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Toshihiro Ohki, Naoya Okamoto, Yuichi Minoura, Kozo Makiyama, Shirou Ozaki
  • Publication number: 20130083568
    Abstract: An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.
    Type: Application
    Filed: July 23, 2012
    Publication date: April 4, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Kozo MAKIYAMA, Naoya Okamoto, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • Publication number: 20130075750
    Abstract: A semiconductor device includes a first semiconductor layer formed on a substrate; a second semiconductor layer formed on the first semiconductor layer; a third semiconductor layer formed on the second semiconductor layer; a gate electrode formed on the third semiconductor layer; and a source electrode and a drain electrode formed on the second semiconductor layer. The third semiconductor layer is formed with a semiconductor material doped with a p-type impurity element. In the third semiconductor layer, a p-type area is formed immediately below the gate electrode, and a high resistance area having a higher resistance than the p-type area is formed in an area other than the p-type area.
    Type: Application
    Filed: August 13, 2012
    Publication date: March 28, 2013
    Applicant: FUJITSU LIMITED
    Inventor: Yuichi MINOURA
  • Publication number: 20120241758
    Abstract: A compound semiconductor device is provided with a first nitride semiconductor layer of a first conductivity type, a second nitride semiconductor layer of the first conductivity type which is formed over the first nitride semiconctor layer and being in contact with the first nitride semiconductor layer, a third nitride semiconductor layer of a second conductivity type being in contact with the second nitride semiconductor layer, a fourth nitride semiconductor layer of the first conductivity type being in contact with the third nitride semiconductor layer, and an insulating film insulating the first nitride semiconductor layer and the fourth nitride, semiconductor layer from each other. A source electrode is positioned inside an Outer edge of the insulating film in planar view.
    Type: Application
    Filed: June 11, 2012
    Publication date: September 27, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi MINOURA, Toshihide Kikkawa
  • Publication number: 20120217543
    Abstract: At least one kind of impurity selected from, for example, Fe, C, B, Ti, Cr is introduced into at least a buffer layer of a compound semiconductor layered structure from a rear surface of the compound semiconductor layered structure to make a resistance value of the buffer layer high.
    Type: Application
    Filed: December 16, 2011
    Publication date: August 30, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi MINOURA, Toshihide Kikkawa, Toshihiro Ohki
  • Publication number: 20120049955
    Abstract: A compound semiconductor device includes a substrate having an opening formed from the rear side thereof; a compound semiconductor layer disposed over the surface of the substrate; a local p-type region in the compound semiconductor layer, partially exposed at the end of the substrate opening; and a rear electrode made of a conductive material, disposed in the substrate opening so as to be connected to the local p-type region.
    Type: Application
    Filed: June 3, 2011
    Publication date: March 1, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Yuichi MINOURA
  • Publication number: 20110223766
    Abstract: A method for manufacturing a semiconductor device includes: exposing an insulating film including a siloxane bond to an energy beam or plasma; and exposing the insulating film to a gas (excluding N2 and H2O gases) including at least one element selected from the group consisting of hydrogen, carbon, nitrogen and silicon, as an constituent element, wherein, in the exposing to the gas, after a relative permittivity of the insulating film descends by the exposing the insulating film to the gas, the exposing is completed before a time point when the relative permittivity of the insulating film first ascends.
    Type: Application
    Filed: May 20, 2011
    Publication date: September 15, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Yasushi Kobayashi, Yoshihiro Nakata, Yuichi Minoura
  • Publication number: 20110068471
    Abstract: The method of manufacturing a semiconductor device includes forming an insulating film of a silicon compound-group insulation film; forming an opening in the insulation film, applying an active energy beam in an atmosphere containing hydrocarbon gas to form a barrier layer of a crystalline SiC, and forming an interconnection structure of copper in the opening with the barrier layer formed in.
    Type: Application
    Filed: November 29, 2010
    Publication date: March 24, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Yoshihiro Nakata, Yasushi Kobayashi, Yuichi Minoura
  • Publication number: 20110024799
    Abstract: A method for manufacturing a compound semiconductor device includes forming a first compound semiconductor layer over a first substrate, the first compound semiconductor layer containing AlxGa1-xN (0?x<1) having a first band gap; forming a second compound semiconductor layer over the first compound semiconductor layer, the second compound semiconductor layer containing AlyInzGa1-y-zN (0<y<1, 0<y+z?1) having a second band gap larger than the first band gap; forming a compound semiconductor laminated structure over the second compound semiconductor layer; and removing the first compound semiconductor layer while irradiating the first compound semiconductor layer with light having an energy between the first band gap and the second band gap, separating the first substrate from the compound semiconductor laminated structure.
    Type: Application
    Filed: July 28, 2010
    Publication date: February 3, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi Minoura, Toshihide Kikkawa