Patents by Inventor Yuichi Nishimura

Yuichi Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110012260
    Abstract: To provide a method of designing a semiconductor integrated circuit with a high workability also in an increase in a scale of an LSI and an enhancement in an integration and designing a semiconductor integrated circuit system in which an unnecessary radiation is reduced and which is excellent in a heat characteristic, a reverse design flow to that in the conventional art is implemented, and a mounting substrate such as a printed-circuit board is first designed and a package substrate for mounting an LSI is designed based on a result of the design of the mounting substrate, and a layout design of the LSI to be mounted on the package substrate is then carried out.
    Type: Application
    Filed: September 28, 2010
    Publication date: January 20, 2011
    Applicant: Panasonic Corporation
    Inventors: Shinya TOKUNAGA, Mitsumi Ito, Nobufusa Iwanishi, Koichi Seko, Hiroaki Suzuki, Hiroyuki Tanaka, Yuichi Nishimura, Kazuhiko Fujimoto
  • Patent number: 7831949
    Abstract: To provide a method of designing a semiconductor integrated circuit with a high workability also in an increase in a scale of an LSI and an enhancement in an integration and designing a semiconductor integrated circuit system in which an unnecessary radiation is reduced and which is excellent in a heat characteristic, a reverse design flow to that in the conventional art is implemented, and a mounting substrate such as a printed-circuit board is first designed and a package substrate for mounting an LSI is designed based on a result of the design of the mounting substrate, and a layout design of the LSI to be mounted on the package substrate is then carried out.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: November 9, 2010
    Assignee: Panasonic Corporation
    Inventors: Shinya Tokunaga, Mitsumi Ito, Nobufusa Iwanishi, Koichi Seko, Hiroaki Suzuki, Hiroyuki Tanaka, Yuichi Nishimura, Kazuhiko Fujimoto
  • Publication number: 20080022252
    Abstract: To provide a method of designing a semiconductor integrated circuit with a high workability also in an increase in a scale of an LSI and an enhancement in an integration and designing a semiconductor integrated circuit system in which an unnecessary radiation is reduced and which is excellent in a heat characteristic, a reverse design flow to that in the conventional art is implemented, and a mounting substrate such as a printed-circuit board is first designed and a package substrate for mounting an LSI is designed based on a result of the design of the mounting substrate, and a layout design of the LSI to be mounted on the package substrate is then carried out.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 24, 2008
    Inventors: Shinya Tokunaga, Mitsumi Ito, Nobufusa Iwanishi, Koichi Seko, Hiroaki Suzuki, Hiroyuki Tanaka, Yuichi Nishimura, Kazuhiko Fujimoto
  • Patent number: 6443314
    Abstract: Disclosed is a membrane filter system comprising an integral plastic holder (1, 23) having a filter receiving section (2, 24) for receiving a membrane filter (3, 30) that collects target microorganism contained in sample solution, a funnel mount (9, 25) positioned at a level higher than the filter receiving section for carrying thereon a cup-shaped paper funnel (12, 33) adapted to receive the sample solution, and a drainage (7, 28) communicated with the filter receiving section. The funnel has a bottom sheet or a paper filter (14, 35) and a bottom peripheral flange (15, 36) surrounding the bottom sheet. Resin seal means (11, 22) is fitted to the funnel mount to provide liquid-tight engagement between the funnel and the holder. The bottom sheet of the funnel is positioned above the membrane filter and serves as a primary filter for collecting particles in the sample solution larger than the target microorganism before the sample solution reaches the membrane filter.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: September 3, 2002
    Assignee: Elmex Limited
    Inventors: Kazuo Shiraiwa, Shin-ichi Waku, Masamichi Tawara, Yuichi Nishimura
  • Publication number: 20010052491
    Abstract: Disclosed is a membrane filter system comprising an integral plastic holder (1, 23) having a filter receiving section (2, 24) for receiving a membrane filter (3, 30) that collects target microorganism contained in sample solution, a funnel mount (9, 25) positioned at a level higher than the filter receiving section for carrying thereon a cup-shaped paper funnel (12, 33) adapted to receive the sample solution, and a drainage (7, 28) communicated with the filter receiving section. The funnel has a bottom sheet or a paper filter (14, 35) and a bottom peripheral flange (15, 36) surrounding the bottom sheet. Resin seal means (11, 22) is fitted to the funnel mount to provide liquid-tight engagement between the funnel and the holder. The bottom sheet of the funnel is positioned above the membrane filter and serves as a primary filter for collecting particles in the sample solution larger than the target microorganism before the sample solution reaches the membrane filter.
    Type: Application
    Filed: February 26, 2001
    Publication date: December 20, 2001
    Inventors: Kazuo Shiraiwa, Shin-ichi Waku, Masamichi Tawara, Yuichi Nishimura
  • Patent number: 5847968
    Abstract: When a component is placed on a circuit board, a placement position is determined by method of elastic center. Then, it is determined whether the component was placed on the circuit board. After that, connectors are routed between the component and a design candidate component which is already placed. After that, the next component is set, and the above mentioned packaging processing is repeated.
    Type: Grant
    Filed: February 16, 1996
    Date of Patent: December 8, 1998
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinji Miura, Masayuki Tsuchida, Hirokazu Uemura, Hiroyuki Yoshimura, Yuichi Nishimura
  • Patent number: 5559997
    Abstract: According to the printed-circuit board of the preset invention, the circuit modification unit 120 adds a noise reduction component, based on circuit board information inputted to the design information input unit 106. Then, the layout unit 132 sets a layout after the design rule generation unit 133 generates a design rule. The rated value modification unit 124 determines rated values of noise reduction components in accordance with the layout. Thus, design rule generation, noise reduction component addition, and rated value determination are automatically performed to satisfy the electric characteristics of evaluation targets. Consequently, interactive process in designing is reduced and the efficiency of designing can be realized.
    Type: Grant
    Filed: October 4, 1994
    Date of Patent: September 24, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Tsuchida, Hirokazu Uemura, Shinji Miura, Yoshiyuki Saito, Hiroyuki Yoshimura, Yuichi Nishimura, Nobuo Sueda
  • Patent number: 4011411
    Abstract: In an automatic telephone answering and recording device associated with a telephone set connected to a remote calling party through a telephone line wherein the message transmitted from the calling party is recorded, there is provided a sound recording tape provided with a plurality of sound tracks, sound recording and reproducing heads cooperating with the tape, a receiving circuit for receiving a message transmitted from the calling party, head switching means for selecting a head associated with the first sound track, control means responsive to the message received by the receiving circuit for recording the message in the first sound track by the selected head, remote control means responsive to a reproduction request signal transmitted from the calling party for causing the control means to reproduce the message in the first sound track by the selected head, and a line control circuit for transmitting the message reproduced from the first sound track to the remote calling party.
    Type: Grant
    Filed: June 13, 1975
    Date of Patent: March 8, 1977
    Assignee: Iwatsu Electric Co., Ltd.
    Inventor: Yuichi Nishimura