Patents by Inventor Yuichi Yokoyama

Yuichi Yokoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6583461
    Abstract: The semiconductor device comprises a capacitor electrode defining openings which are made in each insulating layer, are communicated with one another and have different diameters at least at their coupling portions, the capacitor electrode is formed to extend along the surfaces of the openings.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: June 24, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yuichi Yokoyama, Shunji Yasumura
  • Patent number: 6461977
    Abstract: An improved etching method allowing the formation of a silicon nitride film with an adequate film thickness at the sidewall portion of a pattern is disclosed. A silicon nitride film formed to cover a stepped pattern is dry-etched, employing plasma of mixed gases containing CH2F2 and O2. As a result, a sidewall spacer of the silicon nitride film is formed at the sidewall of the pattern in a self-aligned manner.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: October 8, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hiroshi Matsuo, Takuji Oda, Yuichi Yokoyama, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
  • Patent number: 6444515
    Abstract: A hard mask insulating layer is formed on a gate electrode which is formed on a main surface of a silicon substrate with a gate insulating layer interposed. An SiN sidewall spacer is directly formed on a thin SiO2 layer which is formed to cover a side surface of the gate electrode. A contact hole is formed to penetrate an interlayer insulating layer formed on an SiN stopper layer and reach the main surface of the silicon substrate.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: September 3, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hiroshi Matsuo, Yuichi Yokoyama, Takuji Oda, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
  • Publication number: 20020028553
    Abstract: The semiconductor device comprises a capacitor electrode defining openings which are made in each insulating layer, are communicated with one another and have different diameters at least at their coupling portions, the capacitor electrode is formed to extend along the surfaces of the openings.
    Type: Application
    Filed: August 27, 2001
    Publication date: March 7, 2002
    Inventors: Yuichi Yokoyama, Shunji Yasumura
  • Patent number: 6352343
    Abstract: Gas-permeable hard contact lenses are produced by hot press-stretching a crosslined gas-permeable hard contact lens material and then machining the press-stretched material. The gas-permeable hard contact lenses are formed from a crosslinked gas permeable hard contact lens material which is hot press-stretched to have a compression ration of 5 to 50% and a compression-flexure fracture strength of 300 to 1,500 g. Efficiently produced gas-permeable hard contact lenses are produced which are free of optical strains, excellent in transparency, small internal stress and comfortable to wear with improved durability strength.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: March 5, 2002
    Assignee: Hoya Healthcare Corporation
    Inventors: Kikuo Mitomo, Tohru Shirafuji, Hideo Suda, Teruhisa Shimizu, Yuichi Yokoyama
  • Publication number: 20010019156
    Abstract: A hard mask insulating layer is formed on a gate electrode which is formed on a main surface of a silicon substrate with a gate insulating layer interposed. An SiN sidewall spacer is directly formed on a thin SiO2 layer which is formed to cover a side surface of the gate electrode. A contact hole is formed to penetrate an interlayer insulating layer formed on an SiN stopper layer and reach the main surface of the silicon substrate.
    Type: Application
    Filed: January 18, 2001
    Publication date: September 6, 2001
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Matsuo, Yuichi Yokoyama, Takuji Oda, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
  • Patent number: 6249015
    Abstract: A hard mask insulating layer is formed on a gate electrode which is formed on a main surface of a silicon substrate with a gate insulating layer interposed. An SiN sidewall spacer is directly formed on a thin SiO2 layer which is formed to cover a side surface of the gate electrode. A contact hole is formed to penetrate an interlayer insulating layer formed on an SiN stopper layer and reach the main surface of the silicon substrate.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: June 19, 2001
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hiroshi Matsuo, Yuichi Yokoyama, Takuji Oda, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
  • Patent number: 6033971
    Abstract: There are provided a semiconductor device, which includes an element isolating oxide film having a good upper flatness, and a method of manufacturing the same. Assuming that t.sub.G represents a thickness of a gate electrode layer 6, a height t.sub.U to an upper surface of a thickest portion of element isolating oxide film 4 from an upper surface of a gate insulating film 5 and an acute angle .theta.i defined between the upper surfaces of element isolating oxide film 4 and gate insulating film are set within ranges expressed by the formula of {.theta.i, t.sub.U .linevert split.0.ltoreq..theta.i.ltoreq.56.6.degree., 0.ltoreq.t.sub.U .ltoreq.0.82t.sub.G }. Thereby, an unetched portion does not remain at an etching step for patterning the gate electrode layer to be formed later. This prevents short-circuit of the gate electrode. Since the element isolating oxide film has the improved flatness, a quantity of overetching in an active region can be reduced at a step of patterning the gate electrode.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: March 7, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kaoru Motonami, Shigeru Shiratake, Hiroshi Matsuo, Yuichi Yokoyama, Kenji Morisawa, Ritsuko Gotoda, Takaaki Murakami, Satoshi Hamamoto, Kenji Yasumura, Yasuyoshi Itoh
  • Patent number: 5994227
    Abstract: An improved etching method allowing the formation of a silicon nitride film with an adequate film thickness at the sidewall portion of a pattern is disclosed. A silicon nitride film formed to cover a stepped pattern is dry-etched, employing plasma of mixed gases containing CH.sub.2 F.sub.2 and O.sub.2. As a result, a sidewall spacer of the silicon nitride film is formed at the sidewall of the pattern in a self-aligned manner.
    Type: Grant
    Filed: July 20, 1998
    Date of Patent: November 30, 1999
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hiroshi Matsuo, Takuji Oda, Yuichi Yokoyama, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
  • Patent number: 5905124
    Abstract: A method for producing 2-hydroxyethyl methacrylate polymers comprising polymerizing 2-hydroxyethyl methacrylate or a monomer mixture thereof containing a halogen compound thorough radical polymerization; method for producing hydrogels comprising subjecting the polymers to a water-imparting treatment; method for producing water-containing soft contact lenses comprising molding the polymers into a shape of contact lens and subjecting them to a water-imparting treatment and method for producing polymers comprising treating at least molding surfaces of molds, which form a cavity of contact lens shape, with a halogen compound and polymerizing 2-hydroxyethyl methacrylate or a monomer mixture thereof in the cavity through radical polymerization are disclosed. According to the present invention, water-containing soft contact lenses with high heat resistance and intermediates therefor are obtained from 2-hydroxyethyl methacrylate of high purity.
    Type: Grant
    Filed: April 22, 1997
    Date of Patent: May 18, 1999
    Assignee: Hoya Corporation
    Inventors: Noriyuki Shoji, Masashi Nomura, Yuichi Yokoyama
  • Patent number: 5900554
    Abstract: When a compressed air is led into a reference pressure chamber along with a boundary between a resin housing and a terminal, such compressed air may cause a wire breaking. A barrier wall for blocking the compressed air from penetrating toward the wire is disposed. The reference pressure chamber is divided into a main chamber and a subchamber by the barrier wall. Since the barrier wall blocks the compressed air, the compressed air can not reach a silicon gel in the main chamber. Therefore, the wire breaking caused by the compressed air when connecting a connector therewith can be precluded.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: May 4, 1999
    Assignee: Nippendenso Co., Ltd.
    Inventors: Horonobu Baba, Tiaki Mizuno, Masahito Imai, Yuichi Yokoyama, Masaki Takakuwa, Yasuki Shimoyama
  • Patent number: 5857135
    Abstract: An image forming apparatus includes a developing device for developing an electrostatic latent image formed in a prescribed region on an image carrier corresponding to an original document with a charged developer to form a developer image on the image carrier, a transfer charger for transferring the developer image onto an image receiving medium from the image carrier, and a pre-transfer charger for applying an electric charge having the same polarity as that of the charged developer to the image carrier before transferring the developer image onto the image receiving medium. The apparatus further includes a controller for controlling the pre-transfer charger so that the electric charge is applied only to a given area extending from a front end of the prescribed region on the image carrier on which the developer image is formed, the given area smaller than the prescribed region.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: January 5, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masatoshi Hayashida, Yuichi Yokoyama
  • Patent number: 5831323
    Abstract: There are provided a semiconductor device, which includes an element isolating oxide film having a good upper flatness, and a method of manufacturing the same. Assuming that t.sub.G represents a thickness of a gate electrode layer 6, a height t.sub.U to an upper surface of a thickest portion of element isolating oxide film 4 from an upper surface of a gate insulating film 5 and an acute angle .theta.i defined between the upper surfaces of element isolating oxide film 4 and gate insulating film are set within ranges expressed by the formula of {.theta.i, t.sub.U .linevert split.0.ltoreq..theta.i.ltoreq.56.6.degree., 0.ltoreq.t.sub.U .ltoreq.0.82t.sub.G }. Thereby, an unetched portion does not remain at an etching step for patterning the gate electrode layer to be formed later. This prevents short-circuit of the gate electrode. Since the element isolating oxide film has the improved flatness, a quantity of overetching in an active region can be reduced at a step of patterning the gate electrode.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: November 3, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kaoru Motonami, Shigeru Shiratake, Hiroshi Matsuo, Yuichi Yokoyama, Kenji Morisawa, Ritsuko Gotoda, Takaaki Murakami, Satoshi Hamamoto, Kenji Yasumura, Yasuyoshi Itoh
  • Patent number: 5780870
    Abstract: A semiconductor device is provided for convenient checking of etching states of semiconductor layers, along with a process for its preparation, wherein a test layer is formed on the same wafer where a semiconductor product is manufactured, and concurrently with and under the same formation conditions as formation a target layer forming a part of the semiconductor product, wherein the test layer is formed on a first layer and on a second layer interposed between a portion of the test layer and the first layer, with one of the first and second layers having the same etching properties as the target layer and the other of the first and second layers having different etching characteristics from the target layer.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: July 14, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Maeda, Yukinori Hirose, Yuichi Yokoyama
  • Patent number: 5747843
    Abstract: An improved semiconductor memory device in which an electric circuit operates normally is provided. A block of memory cells of a dynamic random access memory is provided on a semiconductor substrate. A dummy storage node is provided near a corner portion of the memory cell block. A dummy cell plate is provided such that it covers the dummy storage node and is electrically insulated from a main cell plate of the DRAM.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: May 5, 1998
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Hiroshi Matsuo, Shinya Watanabe, Yuichi Yokoyama, Shinya Inoue
  • Patent number: 5747694
    Abstract: A pressure sensor has a resin housing containing a pressure sensor positioned between a reference pressure chamber and a pressure to be measured. A terminal extends through the housing toward the sensor. A wire connects the terminal to the sensor. When a connector is connected to the terminal, it may compress air around the terminal. The compressed air may travel along the terminal and break the wire connected to the sensor. To prevent such breakage, a barrier wall is provided to block the compressed air from penetrating toward the wire. The reference pressure chamber is divided into a main chamber and a subchamber by the barrier wall. Since the barrier wall blocks the compressed air, the compressed air can not reach a silicon gel on the sensor and the wire in the main chamber. Therefore, the wire is protected.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: May 5, 1998
    Assignee: Nippondenso Co., Ltd.
    Inventors: Horonobu Baba, Tiaki Mizuno, Masahito Imai, Yuichi Yokoyama, Masaki Takakuwa, Yasuki Shimoyama
  • Patent number: 5354629
    Abstract: The nonaqueous electrolyte battery of this invention is provided with a spiral electrode unit comprising a separator laminated between a cathode and an anode rolled into a spiral shape having anode around the outer perimeter. An anode terminal tab disconnects from the outermost one circumference of anode residue after discharge to prevent residual anode deposition on the cathode when power is overdrawn.
    Type: Grant
    Filed: October 9, 1992
    Date of Patent: October 11, 1994
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Akira Kuroda, Atsushi Yamano, Satoshi Narukawa, Yuichi Yokoyama
  • Patent number: 4540761
    Abstract: The oxygen-permeable hard contact lens of this invention produced by polymerizing in a composition composed of 30 to 50% by weight of an alkyl (meth)acrylate, 10 to 40% by weight of a fluorine-containing monomer, 10 to 35% by weight of a silicone (meth)acrylate, 5 to 15% by weight of an unsaturated carboxylic acid and 0.1 to 15% by weight of a di- or tri(meth)acrylate of a dihydric or higher hydric alcohol by raising a temperature continuously or stepwise from 40.degree. to 100.degree. C. and processing the resulting polymer into a lens shape by ordinary mechanical processing and polishing, is excellent in stain resistance, scratch resistance and hydrophilicity.
    Type: Grant
    Filed: March 19, 1984
    Date of Patent: September 10, 1985
    Assignee: Hoya Lens Corporation
    Inventors: Kazunori Kawamura, Shinichi Yamashita, Yuichi Yokoyama, Makoto Tsuchiya