Abstract: An operational amplifier circuit including a differential amplifier circuit and a current mirror circuit. The differential amplifier circuit amplifies a signal which enters a non-inverted input terminal and an inverted input terminal. The differential amplifier circuit receives resulting differential currents from an inverted current inflow terminal and a non-inverted current inflow terminal, and outputs corresponding differential currents from an inverted current outflow terminal and an non-inverted current outflow terminal to the current mirror circuit. The differential current flowing in the terminal is converted into a voltage by a load transistor so that the voltage drives a p-channel transistor, whereas the corresponding differential current flowing out from the terminal is converted into a voltage by a load transistor so that the voltage drives an n-channel transistor.

Abstract: A dielectric resonator apparatus has a main resonator part containing a plurality of resonance circuits, a coupling board with electrodes thereon individually connected to the resonance circuits for capacitively coupling them, and a dielectric board superposed on the coupling board for increasing the capacitive coupling of the resonance circuits by providing floating capacitance therethrough which are connected in parallel to the capacitance between the resonance circuits through the coupling board.

Abstract: A CSMA type transmission system for transmitting digital data among a data processing unit and a number of units connected to a bus, each of the units including a storage for storing an own inherent address data, a group address data common to a plurality of data collecting units and a data-bit position data designated inherently to the units belonging to the same group; an address comparator for comparing a master address or a slave address in a transmission frame on the bus with the group address data; a bit position comparator for counting a synchronous signal at a data portion in the transmission frame and comparing the synchronous signal with the data-bit position data; and a data transmitter for transmitting data synchronously with the synchronous signal at the own inherent bit position in the transmission frame when the master address or the slave address coincides with the contents of the own group address data.

Abstract: A semiconductor integrated circuit device comprises a first circuit block for processing a first signal, a second circuit block for processing a second signal different in frequency and/or signal level from the first signal, a conductor layer representing a substantially zero a.c. impedance and formed on a portion of a semiconductor chip between the first and second circuit blocks, and an isolation region formed in the portion of the semiconductor chip, the conductor layer and the isolation region being connected to each other through at least one contact hole provided between the first and second circuit blocks to prevent the mutual interference between the first and second circuit blocks.