Abstract: In an image projection system, a computing device generates conversion information for converting camera coordinates used by an imaging device and projector coordinates used by an image projection device based on a positional relationship between a projection pattern image and an imaging pattern image, the imaging device images a subject including a person, the computing device detects a first position indicating a position related to the camera coordinates in a specific region in the person, the computing device converts information on the first position into information on a second position indicating a position related to the projector coordinates in the specific region based on the conversion information, and the image projection device projects a warning image for overlapping with an entire region of the specific region based on the information on the second position.

Abstract: In an image projection system, a computing device generates conversion information for converting camera coordinates used by an imaging device and projector coordinates used by an image projection device based on a positional relationship between a projection pattern image and an imaging pattern image, the imaging device images a subject including a person, the computing device detects a first position indicating a position related to the camera coordinates in a specific region in the person, the computing device converts information on the first position into information on a second position indicating a position related to the projector coordinates in the specific region based on the conversion information, and the image projection device projects a warning image for overlapping with an entire region of the specific region based on the information on the second position.

Abstract: A motion sensor device including: an image sensor; first and second light sources; and a controller configured to control the image sensor and the first and second light sources. The controller makes the image sensor capture a first frame with light emitted from the first light source at a first time, makes the image sensor capture a second frame with light emitted from the second light source at a second time, performs masking processing on a first image gotten by capturing the first frame and on a second image gotten by capturing the second frame based on a difference between the first and second images, and obtain information about the distance to an object shot in the first and second images based on the first and second images that have been subjected to the masking processing.

Abstract: An image projection system includes an infrared ray projection apparatus that projects a pattern image for shape measurement toward a projection target, an imaging device that captures the pattern image, a calculation device that acquires three-dimensional shape information of the projection target based on the captured pattern image and converts a content image into a projection content image corresponding to the projection target based on the three-dimensional shape information, and a visible light projection apparatus that is disposed in a different position from the infrared ray projection apparatus and projects the projection content image toward the projection target, in which the calculation device, based on images of a visible light image projected by the visible light projection apparatus and a non-visible light image projected by the infrared ray projection apparatus, executes processing of associating each pixel of the non-visible light image with each pixel of the visible light image.

Abstract: An image projection system includes an infrared ray projection apparatus that projects a pattern image for shape measurement toward a projection target, an imaging device that captures the pattern image, a calculation device that acquires three-dimensional shape information of the projection target based on the captured pattern image and converts a content image into a projection content image corresponding to the projection target based on the three-dimensional shape information, and a visible light projection apparatus that is disposed in a different position from the infrared ray projection apparatus and projects the projection content image toward the projection target, in which the calculation device, based on images of a visible light image projected by the visible light projection apparatus and a non-visible light image projected by the infrared ray projection apparatus, executes processing of associating each pixel of the non-visible light image with each pixel of the visible light image.

Abstract: A motion sensor device according to an embodiment of the present disclosure includes: an image sensor (701); first and second light sources (702, 703); and a controller (710) configured to control the image sensor (701) and the first and second light sources (702, 703). The controller (710) makes the image sensor capture a first frame with light emitted from the first light source at a first time, makes the image sensor capture a second frame with light emitted from the second light source at a second time, performs masking processing on a first image gotten by capturing the first frame and on a second image gotten by capturing the second frame based on a difference between the first and second images, and obtain information about the distance to an object shot in the first and second images based on the first and second images that have been subjected to the masking processing.

Abstract: An object detection device that shares a bus with an external memory and another device includes a data acquisition unit that acquires original image data from the external memory via the bus, a reduction processing unit that generates pieces of reduced image data from the original image data at differing reduction rates after the data acquisition unit acquires the original image data once, and an object detection unit that detects a position at which an object appears in the pieces of reduced image data by performing matching processing on the pieces of reduced image data using a template for the object.

Abstract: This image processing apparatus, for photographed images taken at a predetermined time interval and input sequentially, specifies an image area as the target of predetermined processing. The apparatus (i) has processing capability to generate, in accordance with a particular input photographed image, reduced images at K (K?1) ratios within the predetermined time interval, (ii) selects, for each photographed image that is input, M (M?K) or fewer ratios from among L (L>K) different ratios in accordance with ratios indicated for a photographed image input prior to the photographed image, (iii) compares each of the reduced images generated at the selected M or fewer ratios with template images, and (iv) in accordance with the comparison results, specifies the image area.

Abstract: An object detection device that shares a bus with an external memory and another device includes: a data acquisition unit that acquires original image data from the external memory via the bus; a reduction processing unit that generates pieces of reduced image data from the original image data at differing reduction rates after the data acquisition unit acquires the original image data once; and an object detection unit that detects a position at which an object appears in the pieces of reduced image data by performing matching processing on the pieces of reduced image data using a template for the object.

Abstract: This image processing apparatus, for photographed images taken at a predetermined time interval and input sequentially, specifies an image area as the target of predetermined processing. The apparatus (i) has processing capability to generate, in accordance with a particular input photographed image, reduced images at K (K?1) ratios within the predetermined time interval, (ii) selects, for each photographed image that is input, M (M?K) or fewer ratios from among L (L>K) different ratios in accordance with ratios indicated for a photographed image input prior to the photographed image, (iii) compares each of the reduced images generated at the selected M or fewer ratios with template images, and (iv) in accordance with the comparison results, specifies the image area.

Abstract: A signal processing apparatus capable of efficiently processing bitstream in a small circuit scale includes an input buffer in which a bitstream is stored, a first processor which generates a program for processing a signal B corresponding to a signal A by taking out the signal A from the bitstream stored in the input buffer and by using at least one related signal included in the signal A, the related signal being related to the signal B; and a second processor which acquires the program generated by the first processor and executes the acquired program to process the signal B corresponding to the signal A.

Abstract: A variable length decoder comprises: a first storage unit that stores encoded data; a variable length decoding unit; a second storage unit that stores coefficient data; a reverse quantizing unit; and a reverse DCT unit. The variable length decoding unit includes a control unit, a decoding unit, and an address generating unit. The second storage unit includes an initializing mechanism and is initialized all at once by the control unit in advance of decoding in a macro block unit. Only non-zero quantized data decoded by the decoding unit is stored in an address of the second storage unit generated by the address generating unit. The reverse quantizing unit reads and performs reverse quantization of the quantized data from the second storage unit, the reverse DCT unit performs reverse DCT, and then decoded data is acquired.

Abstract: A variable length decoder comprises: a first storage unit that stores encoded data; a variable length decoding unit; a second storage unit that stores coefficient data; a reverse quantizing unit; and a reverse DCT unit. The variable length decoding unit includes a control unit, a decoding unit, and an address generating unit. The second storage unit includes an initializing mechanism and is initialized all at once by the control unit in advance of decoding in a macro block unit. Only non-zero quantized data decoded by the decoding unit is stored in an address of the second storage unit generated by the address generating unit. The reverse quantizing unit reads and performs reverse quantization of the quantized data from the second storage unit, the reverse DCT unit performs reverse DCT, and then decoded data is acquired.

Abstract: A system which allows signal transmission between circuit blocks is constructed promptly by automatically generating an I/F circuit in response to the adjustment of a timing relationship and to a modification in a waveform on a GUI and automatically inserting the I/F circuit between the circuit blocks or adding the I/F circuit to any of the circuit block. A circuit for outputting an operation enable for a receiving side is generated automatically between a plurality of blocks operating with different frequencies, whereby the use of the circuit blocks is expanded in spite of the different frequencies. Further, the design of a large-scale system is performed efficiently by automatically generating a desired waveform by a simple editing operation, generating a desired signal waveform by forming a combinational circuit of signals in the circuit block, and automatically generating a logic synthesis script.

Abstract: A system which allows signal transmission between circuit blocks is constructed promptly by automatically generating an I/F circuit in response to the adjustment of a timing relationship and to a modification in a waveform on a GUI and automatically inserting the I/F circuit between the circuit blocks or adding the I/F circuit to any of the circuit block. A circuit for outputting an operation enable for a receiving side is generated automatically between a plurality of blocks operating with different frequencies, whereby the use of the circuit blocks is expanded in spite of the different frequencies. Further, the design of a large-scale system is performed efficiently by automatically generating a desired waveform by a simple editing operation, generating a desired signal waveform by forming a combinational circuit of signals in the circuit block, and automatically generating a logic synthesis script.

Abstract: A system which allows signal transmission between circuit locks is constructed promptly by automatically generating an I/F circuit in response to the adjustment of a timing relationship and to a modification in a waveform on a GUI and automatically inserting the I/F circuit between the circuit blocks or adding the I/F circuit to any of the circuit block. A circuit for outputting an operation enable for a receiving side is generated automatically between a plurality of blocks operating with different frequencies, whereby the use of the circuit blocks is expanded in spite of the different frequencies. Further, the design of a large-scale system is performed efficiently by automatically generating a desired waveform by a simple editing operation, generating a desired signal waveform by forming a combinational circuit of signals in the circuit block, and automatically generating a logic synthesis script.

Abstract: A system which allows signal transmission between circuit blocks is constructed promptly by automatically generating an I/F circuit in response to the adjustment of a timing relationship and to a modification in a waveform on a GUI and automatically inserting the I/F circuit between the circuit blocks or adding the I/F circuit to any of the circuit block. A circuit for outputting an operation enable for a receiving side is generated automatically between a plurality of blocks operating with different frequencies, whereby the use of the circuit blocks is expanded in spite of the different frequencies. Further, the design of a large-scale system is performed efficiently by automatically generating a desired waveform by a simple editing operation, generating a desired signal waveform by forming a combinational circuit of signals in the circuit block, and automatically generating a logic synthesis script.

Abstract: A system which allows signal transmission between circuit blocks is constructed promptly by automatically generating an I/F circuit in response to the adjustment of a timing relationship and to a modification in a waveform on a GUI and automatically inserting the I/F circuit between the circuit blocks or adding the I/F circuit to any of the circuit block. A circuit for outputting an operation enable for a receiving side is generated automatically between a plurality of blocks operating with different frequencies, whereby the use of the circuit blocks is expanded in spite of the different frequencies. Further, the design of a large-scale system is performed efficiently by automatically generating a desired waveform by a simple editing operation, generating a desired signal waveform by forming a combinational circuit of signals in the circuit block, and automatically generating a logic synthesis script.

Abstract: In a data processor for updating path metrics in Viterbi decoding, an ACS processing can be efficiently executed with small power consumption. An ACS processing unit obtains an updated path metric through an ACS processing on the basis of pre-update path metrics read from a memory. In the memory, two pre-update path metrics necessary for obtaining one updated path metric are stored in an even address and an odd address having common bits excluding the least significant bits, so that the two pre-update path metrics can be read through one access. In the first cycle, the ACS processing unit makes an access to the memory and obtains a first updated path metric through the ACS processing on the basis of the thus read two pre-update path metrics. In the second cycle, without making any access to the memory, the ACS processing unit obtains a second updated path metric through the ACS processing on the basis of the two pre-update path metrics read in the first cycle.