Patents by Inventor Yuji Suwa

Yuji Suwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11398055
    Abstract: A calculation device comprises a color evaluation unit that acquires a sensor color and four or more reference colors from photography data from a measurement time when an indication object was photographed in a second photography environment; determines coefficients for color conversion between a first and the second photography environments based on the amount of change from color information for the reference colors in the first photography environment, which has been read from a calculation device storage unit, to color information for the reference colors in the second photography environment, which has been acquired from the photography data; and uses the sensor color acquired from the photography data from the measurement time and the color conversion coefficients to correct the sensor color to the color that would have been photographed in the first photography environment by solving a conversion formula including terms representing an affine transformation consisting of translation.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: July 26, 2022
    Assignee: HITACHI, LTD.
    Inventors: Yuji Suwa, Kohhei Aida, Shunsuke Mori, Shigetaka Tsubouchi, Masahiro Kawasaki, Yoshifumi Sekiguchi
  • Publication number: 20220187486
    Abstract: A computer system manages model information for defining a U-Net configured to execute, on the input time-series data, an encoding operation for extracting a feature map relating to the target wave by using downsampling blocks and a decoding operation for outputting data for predicting the first motion time of the target wave by using upsampling blocks, executes the encoding operation and the decoding operation on the input time-series data by using the model information. The downsampling blocks and the upsampling blocks each includes a residual block. The residual block includes a time attention block calculates a time attention for emphasizing a specific time domain in the feature map. The time attention block includes an arithmetic operation for calculating attentions different in time width, and calculates a feature map to which the time attention is added by using the attentions.
    Type: Application
    Filed: August 25, 2021
    Publication date: June 16, 2022
    Inventors: Shimei KO, Shinji NAKAGAWA, Yuji SUWA, Kazuaki TOKUNAGA
  • Publication number: 20220034726
    Abstract: A calculation device includes a storing unit that records discoloration characteristics about a sensor which changes color according to a size of physical quantity and a time when the physical quantity lasts, as a discoloration map with the physical quantity and the time as axes, for every sensor, and a physical quantity converting unit that specifies an area within each discoloration map corresponding to the color information of each sensor measured from a display area including the plural sensors having mutually different discoloration characteristics, calculates an overlapping area when the discoloration maps overlap each other as for the specified areas within the discoloration maps, and specifies a combination of the corresponding physical quantity and time from the position of the overlapping area within the discoloration map.
    Type: Application
    Filed: September 17, 2019
    Publication date: February 3, 2022
    Inventors: Yuji SUWA, Shunsuke MORI, Shigetaka TSUBOUCHI, Masahiro KAWASAKI
  • Publication number: 20210158574
    Abstract: A calculation device comprises a color evaluation unit that acquires a sensor color and four or more reference colors from photography data from a measurement time when an indication object was photographed in a second photography environment; determines coefficients for color conversion between a first and the second photography environments based on the amount of change from color information for the reference colors in the first photography environment, which has been read from a calculation device storage unit, to color information for the reference colors in the second photography environment, which has been acquired from the photography data; and uses the sensor color acquired from the photography data from the measurement time and the color conversion coefficients to correct the sensor color to the color that would have been photographed in the first photography environment by solving a conversion formula including terms representing an affine transformation consisting of translation.
    Type: Application
    Filed: March 20, 2019
    Publication date: May 27, 2021
    Applicant: HITACHI, LTD.
    Inventors: Yuji SUWA, Kohhei AIDA, Shunsuke MORI, Shigetaka TSUBOUCHI, Masahiro KAWASAKI, Yoshifumi SEKIGUCHI
  • Patent number: 10338046
    Abstract: An object of the present invention is to provide an artificial olfactory sensing system capable of sniffing out various odors highly sensitively. The artificial olfactory sensing system includes: plural sensor cells on a lipid membrane of each of which olfactory receptors have developed; and plural ion-sensitive field-effect transistors (ISFETs) that correspondingly exist to the sensor cells on a one-on-one basis. A response signal showing that each of the olfactory receptors of each of the sensor cells has recognized an odor molecule is converted into an electric signal by an ISFET corresponding to each of the sensor cells.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: July 2, 2019
    Assignee: HITACHI, LTD.
    Inventors: Masahiko Ando, Sanato Nagata, Shirun Ho, Yuji Suwa, Mitsuharu Tai, Kenzo Kurotsuchi, Hiromasa Takahashi, Norifumi Kameshiro, Seiichi Suzuki
  • Publication number: 20180267005
    Abstract: An object of the present invention is to provide an artificial olfactory sensing system capable of sniffing out various odors highly sensitively. The artificial olfactory sensing system includes: plural sensor cells on a lipid membrane of each of which olfactory receptors have developed; and plural ion-sensitive field-effect transistors (ISFETs) that correspondingly exist to the sensor cells on a one-on-one basis. A response signal showing that each of the olfactory receptors of each of the sensor cells has recognized an odor molecule is converted into an electric signal by an ISFET corresponding to each of the sensor cells.
    Type: Application
    Filed: January 5, 2015
    Publication date: September 20, 2018
    Applicant: Hitachi, Ltd.
    Inventors: Masahiko ANDO, Sanato NAGATA, Shirun HO, Yuji SUWA, Mitsuharu TAI, Kenzo KUROTSUCHI, Hiromasa TAKAHASHI, Norifumi KAMESHIRO, Seiichi SUZUKI
  • Patent number: 10043963
    Abstract: In order to provide a thermoelectric conversion element which has a high Seebeck coefficient, a low thermal conductivity, and a high performance, even if the material system that has a low environmental load and can reduce the cost is used, the thermoelectric conversion element in which lattice points are classified into two or more kinds (A site and B site), lattices of which the kinds are different are connected to each other, the numbers of lattices of which the kinds are different are different (A site: 2, and B site: 1), and a lattice structure is configured by arranging nanoparticles or semiconductor quantum dots, includes areas of which conductivity types are different.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: August 7, 2018
    Assignee: HITACHI, LTD.
    Inventors: Shin Yabuuchi, Jun Hayakawa, Yosuke Kurosaki, Akinori Nishide, Yuji Suwa
  • Patent number: 9941430
    Abstract: A silicon-based quantum dot device (1) is disclosed. The device comprises a substrate (8) and a layer (7) of silicon or silicon-germanium supported on the substrate which is configured to provide at least one quantum dot (51, 52: FIG. 5). The layer of silicon or silicon-germanium has a thickness of no more than ten monolayers. The layer of silicon or silicon-germanium may have a thickness of no more than eight or five monolayers.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: April 10, 2018
    Assignee: HITACHI, LTD.
    Inventors: Aleksey Andreev, David Williams, Ryuta Tsuchiya, Yuji Suwa
  • Publication number: 20170288076
    Abstract: A silicon-based quantum dot device (1) is disclosed. The device comprises a substrate (8) and a layer (7) of silicon or silicon-germanium supported on the substrate which is configured to provide at least one quantum dot (51, 52: FIG. 5). The layer of silicon or silicon-germanium has a thickness of no more than ten monolayers. The layer of silicon or silicon-germanium may have a thickness of no more than eight or five monolayers.
    Type: Application
    Filed: February 24, 2017
    Publication date: October 5, 2017
    Inventors: Aleksey ANDREEV, David WILLIAMS, Ryuta TSUCHIYA, Yuji SUWA
  • Patent number: 9287456
    Abstract: Provided is an element structure whereby it is possible to produce a silicon-germanium light-emitting element enclosing an injected carrier within a light-emitting region. Also provided is a method of manufacturing the structure. Between the light-emitting region and an electrode there is produced a narrow passage for the carrier, specifically, a one-dimensional or two-dimensional quantum confinement region. A band gap opens up in this section due to the quantum confinement, thereby forming an energy barrier for both electrons and positive holes, and affording an effect analogous to a double hetero structure in an ordinary Group III-V semiconductor laser. Because no chemical elements other than those used in ordinary silicon processes are employed, the element can be manufactured inexpensively, simply by controlling the shape of the element.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: March 15, 2016
    Assignee: HITACHI, LTD.
    Inventors: Yuji Suwa, Shinichi Saito, Etsuko Nomoto, Makoto Takahashi
  • Publication number: 20150357543
    Abstract: In order to provide a thermoelectric conversion element which has a high Seebeck coefficient, a low thermal conductivity, and a high performance, even if the material system that has a low environmental load and can reduce the cost is used, the thermoelectric conversion element in which lattice points are classified into two or more kinds (A site and B site), lattices of which the kinds are different are connected to each other, the numbers of lattices of which the kinds are different are different (A site: 2, and B site: 1), and a lattice structure is configured by arranging nanoparticles or semiconductor quantum dots, includes areas of which conductivity types are different.
    Type: Application
    Filed: January 31, 2013
    Publication date: December 10, 2015
    Applicant: HITACHI, LTD.
    Inventors: Shin YABUUCHI, Jun HAYAKAWA, Yosuke KUROSAKI, Akinori NISHIDE, Yuji SUWA
  • Publication number: 20140175490
    Abstract: Provided is an element structure whereby it is possible to produce a silicon-germanium light-emitting element enclosing an injected carrier within a light-emitting region. Also provided is a method of manufacturing the structure. Between the light-emitting region and an electrode there is produced a narrow passage for the carrier, specifically, a one-dimensional or two-dimensional quantum confinement region. A band gap opens up in this section due to the quantum confinement, thereby forming an energy barrier for both electrons and positive holes, and affording an effect analogous to a double hetero structure in an ordinary Group III-V semiconductor laser. Because no chemical elements other than those used in ordinary silicon processes are employed, the element can be manufactured inexpensively, simply by controlling the shape of the element.
    Type: Application
    Filed: June 12, 2012
    Publication date: June 26, 2014
    Applicant: HITACHI, LTD.
    Inventors: Yuji Suwa, Shinichi Saito, Etsuko Nomoto, Makoto Takahashi
  • Patent number: 8396702
    Abstract: An analyzing apparatus includes a result-data storing unit that determines whether result data that is calculated as a result of analysis is restorable by linear interpolation. If the result data is determined to be unrestorable by the linear interpolation, the result-data storing unit stores the result data in a predetermined storage unit. Moreover, the analyzing apparatus includes a data restoring unit that reads the result data from the storage unit. The data restoring unit performs the linear interpolation using the result data acquired, thereby restoring the result data.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: March 12, 2013
    Assignee: Fujitsu Limited
    Inventors: Kenji Nagase, Eiji Ohta, Yuji Suwa, Toshiro Sato, Atsushi Takeuchi, Kumiko Teramae
  • Patent number: 8008654
    Abstract: A method of manufacturing a thin-film transistor device improves performance of a complementary TFT circuit incorporated in a thin- and light-weighted image display device or a flexible electronic device, and reduces power consumption manufacturing cost. Electrodes forming n-type and p-type TFTs and an organic semiconductor are made of the same material in both types of TFT by a solution-process and/or printable process method. A first polarizable thin-film is formed on an interface between a gate insulator and a semiconductor, and a second polarizable thin film provided on an interface between source and drain electrodes and the semiconductor film. A complementary thin-film transistor device is manufactured by selectively exposing either the n-type TFT area or the p-type TFT area to light to remove the polarizing function from the first and second polarizable thin films.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: August 30, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Takeo Shiba, Tomihiro Hashizume, Yuji Suwa, Tadashi Arai
  • Patent number: 7872257
    Abstract: An n-type TFT and a p-type TFT are realized by selectively changing only a cover coat without changing a TFT material using an equation for applying the magnitude of a difference in the Fermi energy between an interface of semiconductor and an electrode and between an interface of semiconductor and insulator. At this time, in order to configure a predetermined circuit, the process is performed, as a source electrode and a drain electrode of the p-type TFT and a source electrode and a drain electrode of the n-type TFT being connected all, respectively, and an unnecessary interconnection is cut by irradiating light using a scanning laser exposure apparatus or the like.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: January 18, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Tomihiro Hashizume, Yuji Suwa, Masaaki Fujimori, Tadashi Arai, Takeo Shiba
  • Patent number: 7872254
    Abstract: An organic transistor is formed with a low material cost and low manufacturing cost while still providing high performance and a low contact resistance with an organic semiconductor of the transistor. The organic transistor has electrodes whose bodies are formed mainly of an inexpensive first metal and whose surfaces are formed of a second metal that is expensive but provides high performance properties. To obtain stability of this structure with a low cost, a property of the second metal is used in which the second metal is easily segregated on the surface of the first metal in an alloy of the first metal and the second metal.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: January 18, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Yuji Suwa, Tomihiro Hashizume, Masaaki Fujimori
  • Publication number: 20100088566
    Abstract: An analyzing apparatus includes a result-data storing unit that determines whether result data that is calculated as a result of analysis is restorable by linear interpolation. If the result data is determined to be unrestorable by the linear interpolation, the result-data storing unit stores the result data in a predetermined storage unit. Moreover, the analyzing apparatus includes a data restoring unit that reads the result data from the storage unit. The data restoring unit performs the linear interpolation using the result data acquired, thereby restoring the result data.
    Type: Application
    Filed: September 29, 2009
    Publication date: April 8, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Kenji NAGASE, Eiji OHTA, Yuji SUWA, Toshiro SATO, Atsushi TAKEUCHI, Kumiko TERAMAE
  • Patent number: 7671281
    Abstract: An inexpensive multilayer wiring circuit board capable of conducting high frequency switching operation on the circuit while the generation of high frequency noise is being suppressed by reducing the inductance of the circuit in provided. A multilayer wiring circuit board with an uppermost layer designated as a first layer on which parts are mounted; a second layer on which one of a ground layer and an electric power source layer is arranged; a third layer on which the other is arranged; and an insulating layer arranged between the ground layer and the electric power source layer. A resin layer having a thermoplastic adhesion property on both faces is used as material of the insulating layer arranged between the electric power source layer and the ground layer.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: March 2, 2010
    Assignee: Fujitsu Limited
    Inventors: Toshihiro Kusagaya, Yasuhiro Yoneda, Daisuke Mizutani, Kazuhiko Iijima, Yuji Suwa
  • Patent number: 7634391
    Abstract: An IBIS correction tool which can be used assembled in a waveform simulation device and corrects IBIS data for a certain specific power supply voltage V0 to IBIS data for a desired power supply voltage V1 with a higher precision than the past, that is, an IBIS correction tool configured so as to read IBIS data for a power supply voltage V0 as numerical data of x-y coordinates at a data input unit, find a relative ratio (correction coefficient) between this numerical data and numerical data for a power supply voltage V1 on its x-y coordinates at a correction coefficient calculating unit, and obtain corrected IBIS data corrected for the power supply voltage V1 according to that correction coefficient at a corrected IBIS data generating unit.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: December 15, 2009
    Assignee: Fujitsu Limited
    Inventors: Yuji Suwa, Jiro Yoneda
  • Patent number: 7622734
    Abstract: Disclosed are a method for inexpensively reducing the contact resistance between an electrode and an organic semiconductor upon a p-type operation of the organic semiconductor; and a method for inexpensively operating, as an n-type semiconductor, an organic semiconductor that is likely to work as a p-type semiconductor. In addition, also disclosed are a p-cannel FET, an n-channel FET, and a C-TFT which can be fabricated inexpensively. Specifically, a p-type region and an n-type region is inexpensively prepared on one substrate by arranging an organic semiconductor that is likely to work as a p-type semiconductor in a p-channel FET region and an n-channel FET region of a C-TFT; and arranging a self-assembled monolayer between an electrode and the organic semiconductor in the n-channel FET region, which self-assembled monolayer is capable of allowing the organic semiconductor to work as an n-type semiconductor.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: November 24, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Yuji Suwa, Tomihiro Hashizume, Masahiko Ando, Takeo Shiba