Patents by Inventor Yuji Takizawa

Yuji Takizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140191628
    Abstract: A permanent magnet motor in which electromagnetic excitation force of low spatial order is reduced, and influence of a magnetomotive force harmonic of a rotor and torque ripple is reduced. One set of armature windings receives current from a first inverter, and another set of armature windings receives current from a second inverter. Where a pole number of a rotor is M and the number of slots of a stator core is Q, M and Q satisfy M<Q and a greatest common divisor of M and Q is equal to or greater than 3. In the rotor, the iron core is located beyond a radius intermediate the maximum outer radius and the minimum inner radius of the permanent magnets. A phase difference between three-phase currents from the first and second inverters is in a range of electrical angles of 20 to 40 degrees.
    Type: Application
    Filed: December 23, 2011
    Publication date: July 10, 2014
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masatsugu Nakano, Yoshihito Asao, Satoru Akutsu, Ryuichi Takiguchi, Yuji Takizawa, Yu Hirotani
  • Publication number: 20140145547
    Abstract: Provided is a permanent magnet motor that realizes reduction of both cogging torque and torque ripple, and also downsizing and weight reduction together with torque ripple reduction. When two sets of three-phase armature windings are defined such that a first armature winding 30-1 corresponds to U1 phase, V1 phase, and W1 phase and a second armature winding 30-2 corresponds to U2 phase, V2 phase, and W2 phase, U1 phase is provided in both of any adjacent slots of a plurality of slots 27, or at least one of U1 phase and U2 phase is provided in one of any adjacent slots 27, U1 phase, V1 phase, and W1 phase are shifted by an electric angle of 20° to 40° from U2 phase, V2 phase, and W2 phase upon driving, and a slot opening width Ws of a stator iron core 22 is set to satisfy Ws/(2?Rs/Ns)?0.15, where Rs is an inner radius of the stator iron core and Ns is a slot number of the stator iron core.
    Type: Application
    Filed: October 14, 2011
    Publication date: May 29, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masatsugu Nakano, Satoru Akutsu, Yoshihito Asao, Yuji Takizawa, Yu Hirotani, Ryuichi Takiguchi
  • Publication number: 20130234555
    Abstract: Provided is a rotary electric machine, including: a stator; and a rotor provided on the stator so as to be rotatable about a rotation shaft, in which the rotor includes, at an outer circumference thereof, magnetic poles arranged so as to have different polarities alternately, the magnetic poles being formed of a rotor core in which electromagnetic steel plates are stacked, the magnetic poles being excited by permanent magnets which are housed in gaps disposed at an outer circumferential part of the rotor core, and in which the rotor core includes, at an inner circumferential part thereof, in the same stack plane: a short circuit magnetic path connecting magnetic pole pieces which form the magnetic poles; and a protruding portion held in contact with the permanent magnets, which is positioned between magnetic pole pieces which are not connected to the short circuit magnetic path.
    Type: Application
    Filed: September 13, 2012
    Publication date: September 12, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yuji TAKIZAWA, Yu HIROTANI, Ryuichi TAKIGUCHI, Hiroko UEYAMA, Satoru AKUTSU, Masatsugu NAKANO, Tetsuya IWATA
  • Publication number: 20130187510
    Abstract: A coil is configured so that: N conductor wires of wave windings each divided at at least two positions in a circumferential direction are provided in one of a plurality of slots; within a unit of the divided wave windings in which conduction is made, the N conductor wires are connected in one of series and parallel to each other at division positions located at substantially the same circumferential position of conductor-wire end portions; division units of the divided wave windings are connected in series to each other, and a total number of series turns of the series-connected division units of the each phase is a predetermined number of series turns, which does not exceed an upper limit value of a terminal voltage of the rotary electric machine; and the series-connected division units of the each phase have the same total number of series turns.
    Type: Application
    Filed: September 12, 2012
    Publication date: July 25, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Ryuichi TAKIGUCHI, Yuji TAKIZAWA, Yu HIROTANI, Satoru AKUTSU, Masatsugu NAKANO, Tetsuya IWATA
  • Publication number: 20120235533
    Abstract: A rotating electrical machine having a shaft, an iron core having slots, an armature winding inserted into the slots, a commutator provided to the shaft and having a plurality of commutator segments that should have same potential. An equalizer connected at one end to a commutator segment among the commutator segments where the commutator segment is in contact with a brush reaches a rear side of the iron core by passing through a slot positioned at a center of a magnetic pole of the rotating electrical machine and returns to the front side by passing through another slot positioned at a center of another magnetic pole so that the equalizer is connected at the other end to a commutator segment where the commutator segment is in contact with a brush of a same polarity as the firstly-mentioned brush.
    Type: Application
    Filed: January 20, 2010
    Publication date: September 20, 2012
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yuya Tanaka, Masafumi Okazaki, Yuji Takizawa
  • Patent number: 6323752
    Abstract: An electronic instrument having a resettable security code as a way of preventing the burglary of the electronic instrument mounted to a movable device such as a car. When the electronic instrument is mounted to the movable device or a battery is exchanged, the entry of the security code is required by the user. If the user does not know or remember the security code, a random number is automatically generated inside of the electronic instrument and converted into an initializing code according to the predetermined rules. The user reports the generated random number to a service company or the manufacturer. The service company or the manufacturer checks if the user is registered. When the user is certified, the service company or the manufacturer gives the initializing code corresponding to the random number to the user. Then, the user enters the given initializing code for resetting the security code.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: November 27, 2001
    Assignee: Sony Corporation
    Inventors: Yuji Takizawa, Daisaku Matsufuji
  • Patent number: 5515386
    Abstract: A transmission circuit transmits a normal cell data and an idle cell data via a communication line. The idle cell data is transmitted to fill time slots in the communication line at which there is no normal data to be transmitted, each of the normal cell data and idle cell data including first data, second data and third data. The first, second and third data of the normal cell data respectively indicate a destination, an error correcting code of the first data and desired information. The first and second data of the idle cell data have predetermined bit patterns and the third data of the idle cell data may have any arbitrary bit pattern.
    Type: Grant
    Filed: September 23, 1994
    Date of Patent: May 7, 1996
    Assignee: Fujitsu Limited
    Inventors: Yuji Takizawa, Masaaki Kawai, Hidetoshi Naito, Kazuyuki Tajima, Satomi Ikeda
  • Patent number: 5408476
    Abstract: A 1-bit error correction circuit based on CRC calculation is provided with a syndrome generation circuit which determines input parallel data of m bits and which have been converted from n number of m-bit serial data. A 1-bit error detection circuit cyclically supplies a syndrome to a remainder calculation circuit and decodes remainder data obtained from this cyclic supply and detects 1-bit errors. A actual data reproduction circuit calculates the exclusive OR of output data of a predetermined register of a 1'st.about.n'th register of a syndrome generation circuit and data supplied to a predetermined register and obtains parallel data which is the actual data. A correction circuit which calculates a exclusive OR of parallel data obtained from a actual data reproduction circuit and 1-bit error data detected by the 1-bit error detection circuit and outputs corrected data.
    Type: Grant
    Filed: February 11, 1993
    Date of Patent: April 18, 1995
    Assignees: Fujitsu Limited, Nippon Telegraph and Telephone Corporation
    Inventors: Masaaki Kawai, Masayoshi Sekido, Yuji Takizawa, Hidetoshi Naito, Satomi Ikeda, Kazuyuki Tajima, Haruo Yamashita, Hideo Tatsuno
  • Patent number: 5367545
    Abstract: An asynchronous signal extracting circuit for extracting asynchronous signals multiplexed in a synchronization frame, including a demultiplexer unit that demultiplexes asynchronous signals and clock signals which are in synchronism with valid data in the asynchronous signals, a buffer memory that writes valid data in the demultiplexed asynchronous signals using the clock signals as write clock signals, a phase-locked loop circuit that forms read clock signals for the memory, and a control unit that switches the frequency band of a low-pass filter in the circuit periodically or in response to a detection signal of pointer adjustment. The circuit suppresses low-frequency jitter contained in the read clock signals.
    Type: Grant
    Filed: March 4, 1992
    Date of Patent: November 22, 1994
    Assignee: Fujitsu Limited
    Inventors: Haruo Yamashita, Yuji Takizawa
  • Patent number: 5307353
    Abstract: A fault recovery system of a ring network based on a synchronous transport module transmission system, having a fault data writing unit for writing, when an input fault is detected by a node, fault data in a predetermined user byte in an overhead of a frame flowing through both a working line and a protection line running in opposite directions to each other. By detecting the fault data in a supervision node or a node just before the fault position, the supervision node or the node just before the fault position executes a loopback operation.
    Type: Grant
    Filed: May 7, 1991
    Date of Patent: April 26, 1994
    Assignee: Fujitsu Limited
    Inventors: Haruo Yamashita, Yuji Takizawa, Kazuo Yamaguchi
  • Patent number: 5257311
    Abstract: A system for monitoring an ATM cross-connecting apparatus by inputting a test cell through a path for a main signal into the ATM cross-connecting apparatus, and examining the cell after the cell passed through the ATM cross-connecting apparatus. An initial value of a PN sequence and the PN sequence generated based on the initial bit sequence is written in the test cell before inputting to the ATM cross-connecting apparatus. When examining the test cell, the initial bit sequence and the PN sequence are read from the cell, a PN sequence is generated based on the initial bit sequence, and the generated pseudo-noise sequence is then compared with the PN sequence read from the test cell to detect an error in the test cell. In addition, a bit pattern indicating a primitive polynomial to generate the PN sequence may be written in the test cell. In this case, the bit pattern is used for generating the PN sequence when examining the test cell.
    Type: Grant
    Filed: April 30, 1992
    Date of Patent: October 26, 1993
    Assignee: Fujitsu Limited
    Inventors: Hidetoshi Naito, Masaaki Kawai, Hisako Watanabe, Yuji Takizawa, Kazuyuki Tajima, Haruo Yamashita
  • Patent number: RE37401
    Abstract: A fault recovery system of a ring network based on a synchronous transport module transmission system, having a fault data writing unit for writing, when an input fault is detected by a node, fault data in a predetermined user byte in an overhead of a frame flowing through both a working line and a protection line running in opposite directions to each other. By detecting the fault data in a supervision node or a node just before the fault position, the supervision node or the node just before the fault position executes a loopback operation.
    Type: Grant
    Filed: April 25, 1996
    Date of Patent: October 2, 2001
    Assignee: Fujitsu Limited
    Inventors: Haruo Yamashita, Yuji Takizawa, Kazuo Yamaguchi