Patents by Inventor Yuki Yoshioka

Yuki Yoshioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10818630
    Abstract: An object of the present invention is to provide a highly reliable semiconductor device that allows voids remaining in a bonding material to be reduced. The semiconductor device includes a semiconductor chip, an insulation substrate, a metal base plate, a resin section, and a bump. The semiconductor chip is warped into a concave shape. On the insulation substrate, the semiconductor chip is mounted by bonding. The metal base plate has the insulation substrate mounted thereon and has a heat dissipation property. The resin section seals the insulation substrate and the semiconductor chip. The bump is disposed in a joint between the semiconductor chip and the insulation substrate. A warp amount of the semiconductor chip warped into a concave shape is equal to or greater than 1 ?m and less than a height of the bump.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: October 27, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yuki Yoshioka, Taishi Sasaki, Hiroyuki Harada
  • Publication number: 20200194324
    Abstract: An object of the present invention is to suppress a crack in a sealing resin and a warpage in a semiconductor device in a power semiconductor device. A power semiconductor device includes: a semiconductor element; a terminal; a chassis; and a sealing resin sealing the semiconductor element and the terminal in the chassis. The sealing resin includes: a first sealing resin covering at least the semiconductor element; and a second sealing resin formed on an upper portion of the first sealing resin, and in an operation temperature of the semiconductor element, the first sealing resin has a smaller linear expansion coefficient than the second sealing resin, and a difference of a linear expansion coefficient between the first sealing resin and the terminal is smaller than a difference of a linear expansion coefficient between the second sealing resin and the terminal.
    Type: Application
    Filed: August 25, 2017
    Publication date: June 18, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Taishi SASAKI, Yuki YOSHIOKA, Hiroyuki HARADA, Yusuke KAJI
  • Publication number: 20200173443
    Abstract: A scroll compressor includes a flow path that is disposed in a portion of a bearing holder, which corresponds to each formation position of a plurality of stator groove portions, and that penetrates the bearing holder in an axial direction, a first recess portion (72) disposed in a portion of a thrust bearing, which faces the flow path, and recessed from one side in the axial direction to the other side in the axial direction, and a first groove portion (74) disposed in an outer peripheral portion of the first recess portion (72), extending from a bottom surface (72a) of the recess portion (72) to a surface located on a side opposite to a surface having the first recess portion (72) formed thereon, and communicating with the first recess portion (72) in the axial direction.
    Type: Application
    Filed: July 3, 2018
    Publication date: June 4, 2020
    Applicant: MITSUBISHI HEAVY INDUSTRIES THERMAL SYSTEMS, LTD.
    Inventors: Yuki ICHISE, Ichiro YOGO, Akinori YOSHIOKA, Manabu SUZUKI, Takeshi HIRANO
  • Publication number: 20200139851
    Abstract: The time required to complete current-to-target state transitions of a plurality of movable portions constituting a seat is shortened. A seat unit 1 includes an occupant support portion S1, a plurality of movable mechanisms respectively moving a plurality of parts constituting the occupant support portion S1, and an ECU 40 controlling respective operations of the plurality of movable mechanisms. The ECU 40 causes each of the plurality of movable mechanisms to undergo a transition from a current state to a target state and the plurality of movable mechanisms have a first movable mechanism requiring a longest time for the transition. The ECU 40 causes the transitions of the plurality of movable mechanisms other than the first movable mechanism to be completed by completion of the transition of the first movable mechanism from the current state to the target state.
    Type: Application
    Filed: April 26, 2018
    Publication date: May 7, 2020
    Inventors: Yuki OSHIMA, Atsushi KUSANO, Yuki YOSHIOKA
  • Publication number: 20200103185
    Abstract: Provided is a heat transfer device comprising: a housing; a regenerator; a first heat exchanger; and a second heat exchanger.
    Type: Application
    Filed: May 9, 2018
    Publication date: April 2, 2020
    Applicants: National University Corporation Tokyo University of Agriculture and Technology, Shoden Kogyo Co., Ltd.
    Inventors: Yuki Ueda, Kazuyuki Yoshioka
  • Publication number: 20200098701
    Abstract: A semiconductor chip (6) is disposed on the insulation substrate (2). A lead frame (8) is bonded to an upper surface of the semiconductor chip (6). A sealing resin (12) covers the semiconductor chip (6), the insulation substrate (2), and the lead frame (8). A stress mitigation resin (13) having a lower elastic modulus than that of the sealing resin (12) is partially applied to an end of the lead frame (8).
    Type: Application
    Filed: February 9, 2017
    Publication date: March 26, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroyuki HARADA, Naoki YOSHIMATSU, Osamu USUI, Yuji IMOTO, Yuki YOSHIOKA
  • Publication number: 20190378810
    Abstract: An object of the present invention is to provide a highly reliable semiconductor device that allows voids remaining in a bonding material to be reduced. The semiconductor device includes a semiconductor chip, an insulation substrate, a metal base plate, a resin section, and a bump. The semiconductor chip is warped into a concave shape. On the insulation substrate, the semiconductor chip is mounted by bonding. The metal base plate has the insulation substrate mounted thereon and has a heat dissipation property. The resin section seals the insulation substrate and the semiconductor chip. The bump is disposed in a joint between the semiconductor chip and the insulation substrate. A warp amount of the semiconductor chip warped into a concave shape is equal to or greater than 1 ?m and less than a height of the bump.
    Type: Application
    Filed: November 21, 2016
    Publication date: December 12, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yuki YOSHIOKA, Taishi SASAKI, Hiroyuki HARADA
  • Patent number: 10440834
    Abstract: Provided herein is a resin fluxed solder paste that exhibits a desirable solder bump reinforcement effect without requiring an underfill process. The disclosure also provides a mount structure. The resin fluxed solder paste includes a non-resinic powder containing a solder powder and an inorganic powder; and a flux containing a first epoxy resin, a curing agent, and an organic acid. The non-resinic powder accounts for 30 to 90 wt % of the total, and the surface of the inorganic powder is covered with an organic resin.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: October 8, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Hirohisa Hino, Naomichi Ohashi, Yuki Yoshioka, Masato Mori, Yasuhiro Suzuki
  • Patent number: 10429898
    Abstract: An electronic device includes a housing having an opening, a connection terminal located in an opening in the housing, and a terminal cover including a first resin member having a first surface facing the connection terminal and a second surface located opposite to the first surface and a second resin member located on the second surface. At least a portion of the second resin member covers a depression located on an outer peripheral portion of the first surface of the first resin member.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: October 1, 2019
    Assignee: KYOCERA CORPORATION
    Inventors: Yuki Yoshioka, Kengo Suzuki, Shuichi Kutsuzawa, Hiroyuki Fukuhara
  • Patent number: 10424996
    Abstract: Provided is a motor rotor which, without changing an integral fastening structure relying on swage pins, increases resistance to the excessive excitation force of the motor rotor and which can easily prevent decreases in fastening strength; a motor that uses the motor rotor, and an electric compressor are also provided. This motor rotor is provided with a cylindrical rotor core comprising multiple laminated magnetic steel sheets, end plates and balance weights laminated on both ends of the rotor core, and multiple headed swage pins which are inserted from one side and which integrally fasten the rotor core, the end plates and the balance weights. The material of the balance weight arranged to the head of the swage pin is harder than that of the swage pin, and the material of the balance weight arranged to the swage part of the swage pin is softer than that of the swage pin.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: September 24, 2019
    Assignee: MITSUBISHI HEAVY INDUSTRIES THERMAL SYSTEMS, LTD.
    Inventors: Masayuki Ishikawa, Goshi Iketaka, Yuki Ichise, Akinori Yoshioka
  • Publication number: 20190284388
    Abstract: Disclosed is a resin composition that contains conductive particles, a resin component and a curing agent. The conductive particles contain solder, and the resin component contains an epoxy resin and a phenoxy resin. The curing agent contains a first compound having at least one thiol group and a second compound having an amino group.
    Type: Application
    Filed: March 11, 2019
    Publication date: September 19, 2019
    Inventors: Yuki YOSHIOKA, Arata KISHI
  • Patent number: 10256835
    Abstract: A semiconductor device includes: a plurality of input circuits each of which receives one of an analog signal and a digital signal, the input circuits being supplied a power supply; a selector that selects one of the input circuits; and an analog-to-digital (AD) converter that performs AD conversion of an analog signal input to the selected input circuit. After the selector selects one of the input circuits, the selector selects another of the input circuits. When the selector selects one of the input circuits and one digital signal of others of the input circuits is changed, the selector does not select another of the input circuits.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: April 9, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Yuki Yoshioka
  • Patent number: 10237392
    Abstract: A control device includes: a display, at least one processor, and a memory configured to store a parameter and instructions that, when executed by the at least one processor, causes the control device to: determine whether a parameter of a controllable device can be changed, when the parameter of the controllable device is possible to change, display a first screen for manipulating the parameter of the controllable device on the display and update the parameter of the controllable device by user's manipulation, and when the parameter of the controllable device is not possible to change, display the second screen on the display and lock the parameter of the controllable device.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: March 19, 2019
    Assignee: YAMAHA CORPORATION
    Inventors: Kazuya Mushikabe, Tomoyoshi Akutagawa, Yuki Yoshioka
  • Patent number: 10074598
    Abstract: A lead frame includes a plurality of circuit patterns which each have a die pad and an electrode terminal portion and are disposed in a band shape, a tie bar, a frame portion and a suspension lead. Cut are a connection portion between electrode terminals and the frame portion, a connection portion between the frame portion and the tie bar at both end portions in a disposition direction of circuit patterns, and a connection portion from a connection part of the frame portion with the tie bar, between the circuit patterns to a part of the frame portion extending in the disposition direction. The electrode terminal portion is bent to extend to a direction of an upper surface of a semiconductor element. The lead frame is collectively resin-sealed while exposing the tie bar and the electrode terminal portion above the tie bar.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: September 11, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ken Sakamoto, Tetsuya Ueda, Keitaro Ichikawa, Yuki Yoshioka
  • Publication number: 20180234105
    Abstract: A semiconductor device includes: a plurality of input circuits each of which receives one of an analog signal and a digital signal, the input circuits being supplied a power supply; a selector that selects one of the input circuits; and an analog-to-digital (AD) converter that performs AD conversion of an analog signal input to the selected input circuit. After the selector selects one of the input circuits, the selector selects another of the input circuits. When the selector selects one of the input circuits and one digital signal of others of the input circuits is changed, the selector does not select another of the input circuits.
    Type: Application
    Filed: April 17, 2018
    Publication date: August 16, 2018
    Inventor: Yuki YOSHIOKA
  • Patent number: 9973201
    Abstract: According to one aspect, a semiconductor device (1) includes: an input circuit (11_1) configured to receive an analog signal, the analog signal and a digital signal being selectively input; an input circuit (11_4) configured to be driven by a power supply common to the input circuit (11_1) and receive a digital signal, the digital signal and an analog signal being selectively input; an AD converter (15) configured to perform AD conversion of the analog signal input to the input circuit (11_1); an edge detection circuit (12) configured to detect an edge of the digital signal input to the input circuit (11_4); and a control unit (13) configured to execute predetermined processing on a result of the AD conversion by the AD converter (15) based on a result of the detection by the edge detection circuit (12).
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: May 15, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Yuki Yoshioka
  • Publication number: 20180091167
    Abstract: According to one aspect, a semiconductor device (1) includes: an input circuit (11_1) configured to receive an analog signal, the analog signal and a digital signal being selectively input; an input circuit (11_4) configured to be driven by a power supply common to the input circuit (11_1) and receive a digital signal, the digital signal and an analog signal being selectively input; an AD converter (15) configured to perform AD conversion of the analog signal input to the input circuit (11_1); an edge detection circuit (12) configured to detect an edge of the digital signal input to the input circuit (11_4); and a control unit (13) configured to execute predetermined processing on a result of the AD conversion by the AD converter (15) based on a result of the detection by the edge detection circuit (12).
    Type: Application
    Filed: July 19, 2017
    Publication date: March 29, 2018
    Inventor: Yuki YOSHIOKA
  • Publication number: 20180069957
    Abstract: A control device includes: a display, at least one processor, and a memory configured to store a parameter and instructions that, when executed by the at least one processor, causes the control device to: determine whether a parameter of a controllable device can be changed, when the parameter of the controllable device is possible to change, display a first screen for manipulating the parameter of the controllable device on the display and update the parameter of the controllable device by user's manipulation, and when the parameter of the controllable device is not possible to change, display the second screen on the display and lock the parameter of the controllable device.
    Type: Application
    Filed: October 30, 2017
    Publication date: March 8, 2018
    Inventors: Kazuya MUSHIKABE, Tomoyoshi AKUTAGAWA, Yuki YOSHIOKA
  • Patent number: 9887502
    Abstract: A connector structure includes a jack including a receiver, and a plug connectable to the jack. The jack includes a wall located around the receiver and defining a receiving region configured to receive a locking portion. The plug includes a plug body, a plug holder, and the locking portion. The receiving region includes a first region where at least a part of the locking portion is configured to enter and exit by a movement of the locking portion along the first axis, and a second region where at least a part of the locking portion is configured to enter when the locking portion is rotated about the first axis. The second region is covered by the wall when the receiver is seen from the front.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: February 6, 2018
    Assignee: KYOCERA CORPORATION
    Inventors: Yuki Yoshioka, Yasuo Nambu
  • Publication number: 20170345742
    Abstract: A lead frame includes a plurality of circuit patterns which each have a die pad and an electrode terminal portion and are disposed in a band shape, a tie bar, a frame portion and a suspension lead. Cut are a connection portion between electrode terminals and the frame portion, a connection portion between the frame portion and the tie bar at both end portions in a disposition direction of circuit patterns, and a connection portion from a connection part of the frame portion with the tie bar, between the circuit patterns to a part of the frame portion extending in the disposition direction. The electrode terminal portion is bent to extend to a direction of an upper surface of a semiconductor element. The lead frame is collectively resin-sealed while exposing the tie bar and the electrode terminal portion above the tie bar.
    Type: Application
    Filed: December 15, 2016
    Publication date: November 30, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Ken SAKAMOTO, Tetsuya UEDA, Keitaro ICHIKAWA, Yuki YOSHIOKA